Texas Instruments LM20123MHE/NOPB
- Part No.:
- LM20123MHE/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LM20123MHE/NOPB.pdf
- Description:
- IC REG BUCK ADJ 3A 16HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:150
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Product details
Overview
LM20123MHE/NOPB from Texas Instruments is a 3A, 1.5 MHz synchronous buck regulator in HTSSOP-16 with exposed pad, delivering adjustable output down to 0.8V from 2.95–5.5V input. It features peak current mode control, integrated 32 mΩ/36 mΩ FETs, and supports pre-biased startup-used in FPGA core power rails where tight voltage accuracy and transient response are critical.
For engineers reviewing the LM20123MHE/NOPB datasheet, LM20123MHE/NOPB pinout, LM20123MHE/NOPB application, or LM20123MHE/NOPB equivalent, key selection factors include its 96% efficiency at 1.5 MHz, precision enable with 66 mV hysteresis, soft-start/tracking dual-function pin, ±1.5% output voltage accuracy, and integrated OVP/UVLO/thermal shutdown for robust system-level power sequencing.
Technical Context
The LM20123MHE/NOPB implements peak current mode control with nonlinear (parabolic) slope compensation-dynamically adjusted per output voltage to ensure stability across 0.8–5.5V VOUT range. Its error amplifier delivers 510 µmho transconductance and 2000 V/V gain, enabling stable loop compensation with only two external components (RC1, CC1) regardless of output capacitor type.
It integrates dual N-channel MOSFETs (32 mΩ low-side, 36 mΩ high-side), a 2.7V internal sub-regulator (VCC), analog bias supply (AVIN) with RC filtering requirement, and independent AGND/PVIN/PGND domains to isolate noise-sensitive feedback and power paths-critical for low-noise digital load applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 3A continuous-supports FPGA, ASIC, and DSP core rails without external current boosting. |
| Switching Frequency | 1.5 MHz (±10%)-enables compact 1 µH inductors and reduces EMI fundamental frequency. |
| Input Voltage Range | 2.95V to 5.5V-directly compatible with 3.3V and 5V system buses without intermediate regulation. |
| Feedback Reference | 0.8V ±1.5%-sets output as low as 0.8V with RFB1/RFB2 divider; enables precise core voltage scaling. |
| Efficiency | 96% at 1.2V/3A/5V input-minimizes thermal load in space-constrained embedded modules. |
| Current Limit | 4.8A typical-provides margin above 3A rating while allowing smaller inductors with lower saturation current. |
| Soft-Start | Externally adjustable via SS/TRK pin (5 µA source)-ensures monotonic startup into pre-biased loads without sinking current. |
Pinout & Package
LM20123MHE/NOPB uses a 16-pin HTSSOP package (PWP0016A) with exposed thermal pad (EP), optimized for PCB heat dissipation without heatsinks.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SS/TRK (Pin 1) | Soft-start ramp generator / tracking reference input | 5 µA internal current source charges external CSS; when driven <800 mV, overrides FB reference for rail tracking. |
| FB (Pin 2) | Regulated output voltage sense node | Connects to resistor divider; internal 800 mV reference sets closed-loop VOUT = 0.8V × (1 + RFB1/RFB2). |
| PGOOD (Pin 3) | Open-drain power-good status indicator | Pulls low if VOUT deviates >6% from target; requires 10–100 kΩ pull-up for system sequencing. |
| COMP (Pin 4) | Error amplifier output for loop compensation | Connect RC1 and CC1 externally to set crossover frequency and phase margin for stability. |
| NC (Pins 5,16) | No-connect (grounded for operation) | Must be tied to AGND to ensure proper internal biasing and thermal performance. |
| PVIN (Pins 6,7) | Main input power for internal FETs | High-current path; requires low-ESR CIN placed adjacent to minimize switching noise injection. |
| SW (Pins 8,9) | Switch node between internal FETs | Drives external inductor; high dv/dt node requiring careful layout and optional snubber for ringing suppression. |
| PGND (Pins 10,11) | Power ground return for switching FETs | Separate from AGND; must connect to low-impedance PCB plane under EP to limit ground bounce. |
| EN (Pin 12) | Precision enable with hysteresis | Turns on at 1.18V (typ), turns off at 1.11V (typ); allows accurate input-voltage sequencing via resistor divider. |
| VCC (Pin 13) | Internal 2.7V bias supply output | Bypass with 1 µF ceramic capacitor; powers internal logic and gate drivers independently of PVIN. |
| AVIN (Pin 14) | Analog supply input for internal bias | Must connect to PVIN through RC filter (RF, CF) to suppress noise coupling into error amplifier. |
| AGND (Pin 15) | Quiet analog ground reference | Isolated ground for FB, COMP, EN, SS/TRK; connects to PGND only at single point near EP. |
| EP | Exposed thermal pad | Electrically connected to PGND; soldering to large copper area improves θJA from 38°C/W to ≤25°C/W. |
Key Features
| Feature | Design Value |
|---|---|
| Nonlinear slope compensation | Parabolic ramp adapts to VOUT-eliminates need for manual slope tuning and ensures stability across full 0.8–5.5V output range. |
| Pre-biased startup support | SW remains high-impedance until SS/TRK ramp exceeds FB voltage-prevents reverse current into powered loads like FPGAs. |
| Diode emulation mode | Disables low-side FET at zero inductor current-reduces light-load losses and avoids negative current conduction. |
| Integrated OVP and UVLO | OVP triggers at 108% VFB (±3% hysteresis); UVLO activates at 2.7V PVIN with 45 mV hysteresis-enables reliable brown-in/brown-out behavior. |
| Adjustable soft-start & tracking | Single SS/TRK pin configures either monotonic startup (via CSS) or voltage-rail tracking (via resistive divider)-reduces BOM count in multi-rail systems. |
Applications
| FPGA Core Power Supply | DSP I/O Voltage Regulation |
|---|---|
Use Scenario: Powers Xilinx Artix-7 FPGA core (VCCINT) from 5V bus with dynamic load steps up to 2A/µs. IC Role / Device Role / Timing Role: Primary synchronous buck regulator providing tightly regulated 1.0V ±1.5% with <10 µs PGOOD assertion delay. Use Value: Pre-biased startup prevents damage during hot-swap; 96% efficiency limits junction temperature rise to <35°C at full load. | Use Scenario: Supplies TI C66x DSP I/O bank (VDDIO) at 1.8V from shared 3.3V rail in telecom baseband module. IC Role / Device Role / Timing Role: Secondary buck converter tracking main 1.2V core rail using SS/TRK pin for coordinated power-up sequence. Use Value: Tracking accuracy of ±3 mV eliminates timing skew between core and I/O domains; 1.5 MHz switching avoids interference with 122.88 MHz clock domain. |
| ASIC Memory Interface Rail | Industrial PLC Digital I/O Module |
Use Scenario: Generates 1.2V for LPDDR2 memory interface in automotive ADAS controller with -40°C to 125°C ambient. IC Role / Device Role / Timing Role: High-reliability buck regulator with integrated thermal shutdown (160°C) and 16 µs PGOOD deglitching. Use Value: 32 mΩ/36 mΩ FETs reduce conduction loss; HTSSOP-16 EP package achieves 38°C/W θJA for passive cooling in sealed enclosure. | Use Scenario: Provides isolated 3.3V logic rail for microcontroller and optocoupler drivers in DIN-rail mounted PLC I/O card. IC Role / Device Role / Timing Role: Input-filtered buck stage accepting wide 2.95–5.5V input (from 5V DC-DC or battery backup) with precision enable sequencing. Use Value: EN pin hysteresis (66 mV) rejects line noise; 4.8A current limit accommodates 300 ms inrush from 100 µF local capacitance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54332DR | 3A, 1 MHz, 3.5–28V input, no pre-bias startup, higher RDS(on) (110 mΩ HS) | Targeted at industrial 12V/24V inputs-not suitable for 3.3V/5V bus direct conversion. | Select when wider VIN range and lower cost outweigh need for pre-bias support and 1.5 MHz switching. |
| MP2315DJ-LF-Z | 3A, 2 MHz, 4.5–26V input, no SS/TRK tracking, 1.2V fixed VREF | Lacks adjustable soft-start and rail tracking-requires external circuitry for multi-rail coordination. | Choose for higher-frequency designs needing smaller inductors where tracking and pre-bias are not required. |
Compared with TPS54332DR and MP2315DJ-LF-Z, LM20123MHE/NOPB uniquely combines 1.5 MHz operation, pre-biased startup, and SS/TRK tracking in a 2.95–5.5V input range-making it optimal for compact, multi-rail 3.3V/5V systems where sequencing integrity and thermal efficiency are prioritized over ultra-wide VIN.
Availability
LM20123MHE/NOPB is available at Aetrix Electronics and suitable for FPGA core power, DSP I/O regulation, ASIC memory interfaces, and industrial PLC digital I/O modules requiring stable component supply across automotive and industrial temperature ranges.
Supply support for LM20123MHE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC-DC conversion.
The LM20123MHE/NOPB belongs to TI's PowerWise® synchronous buck regulator family-designed specifically for high-current, low-voltage point-of-load applications in FPGA, DSP, and ASIC power systems where efficiency, thermal performance, and sequencing reliability are critical.
FAQ
What is the maximum recommended output current for LM20123MHE/NOPB in continuous operation?
The LM20123MHE/NOPB is rated for 3A continuous output current under standard thermal conditions (θJA = 38°C/W, TA = 25°C). At full load, its integrated 32 mΩ low-side and 36 mΩ high-side FETs generate ~360 mW conduction loss. With proper PCB copper area under the exposed pad, sustained 3A operation remains within 125°C junction limit. Derating is advised above 60°C ambient or with restricted airflow.
Does LM20123MHE/NOPB support startup into a pre-biased output voltage?
Yes, LM20123MHE/NOPB supports pre-biased startup: during initial power-up, the low-side FET remains off until the SS/TRK soft-start ramp exceeds the voltage present at the FB pin. This prevents reverse current flow into an already-powered load-critical for FPGA and ASIC applications where cross-rail parasitic paths exist. No external diode or circuitry is needed.
What is the purpose of the AVIN pin on LM20123MHE/NOPB, and how must it be connected?
The AVIN pin on LM20123MHE/NOPB supplies clean bias voltage to the analog circuitry (error amplifier, reference, comparators). It must be connected to PVIN through an RC filter (typically RF = 10 Ω, CF = 100 nF) to attenuate high-frequency switching noise. Failure to filter AVIN degrades FB accuracy and can cause instability or erratic PGOOD behavior-TI specifies this connection as mandatory in all operating conditions.
Can LM20123MHE/NOPB be used to track another voltage rail, and how is this configured?
Yes, LM20123MHE/NOPB supports voltage tracking via the SS/TRK pin. To track an external rail (e.g., 1.2V master), connect SS/TRK to that rail through a resistive divider that scales it to ≤800 mV. When SS/TRK voltage is below 800 mV, the internal reference is overridden, forcing FB to follow the scaled tracking signal. This enables coordinated power-up of multiple rails without external supervisors.
What are the absolute maximum ratings for PVIN and junction temperature on LM20123MHE/NOPB?
The absolute maximum PVIN rating for LM20123MHE/NOPB is +6V, and the maximum junction temperature is 150°C. Exceeding either risks permanent damage. The device includes thermal shutdown activation at 160°C (with 10°C hysteresis), but this is a fault-protection limit-not an operational rating. For reliable 3A operation, design must maintain TJ ≤125°C using the exposed pad and appropriate PCB copper area per TI's layout guidelines.
LM20123MHE/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- PowerWise®
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.95V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 4.68V
- Current - Output:
- 3A
- Frequency - Switching:
- 1.5MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
LM20123MHE/NOPB FAQ
1.How can I place an order for LM20123MHE/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM20123MHE/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM20123MHE/NOPB reliable?
The price and inventory of LM20123MHE/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM20123MHE/NOPB is usually 5 days.
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5.How can I obtain technical support or documentation for LM20123MHE/NOPB?
For technical support, including LM20123MHE/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM20123MHE/NOPB requirements.
6.How does Aetrix verify that LM20123MHE/NOPB is sourced from the original manufacturer or authorized distributors?
All LM20123MHE/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM20123MHE/NOPB meets industry standards.
7.What is the process for return or replacement of LM20123MHE/NOPB?
All LM20123MHE/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM20123MHE/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM20123MHE/NOPB part is unused and in its original packaging.
Return procedure for LM20123MHE/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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