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Texas Instruments LM20123MHX/NOPB
- Part No.:
- LM20123MHX/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LM20123MHX/NOPB.pdf
- Description:
- IC REG BUCK ADJ 3A 16HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,150
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Product details
Overview
LM20123MHX/NOPB from Texas Instruments is a 3A, 1.5 MHz synchronous buck regulator in HTSSOP-16 with exposed pad, featuring peak current mode control, adjustable 0.8V–5.5V output, integrated 32 mΩ/36 mΩ FETs, and pre-bias startup-designed for FPGA, DSP, and ASIC core power rails from 3.3V/5V buses.
For engineers reviewing the LM20123MHX/NOPB datasheet, LM20123MHX/NOPB pinout, LM20123MHX/NOPB application, or LM20123MHX/NOPB equivalent, key selection considerations include its 1.5 MHz fixed-frequency operation, ±10 mV SS/TRK tracking accuracy, 96% peak efficiency, 4.8 A current limit, and thermal shutdown at 160°C with 10°C hysteresis.
Technical Context
The LM20123MHX/NOPB implements peak current mode control with nonlinear parabolic slope compensation-dynamically adjusted per output voltage to ensure stability across 0.8V–5.5V VOUT range without external tuning. Its error amplifier delivers 510 µmho transconductance and 2000 V/V gain, supporting stable loop compensation with only two external components (RC1, CC1) for most ceramic-capacitor-based designs.
It integrates dual N-channel MOSFETs (32 mΩ low-side, 36 mΩ high-side), precision 0.8V feedback reference (±12 mV over temp), and independent analog/digital ground separation (AGND/PGND) with dedicated AVIN filtering. The SS/TRK pin enables either 1 ms internal soft-start or external voltage tracking with ±10 mV accuracy relative to FB.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 3 A continuous-supports FPGA core rails without external current sharing. |
| Switching Frequency | 1.5 MHz (1350–1650 kHz)-enables sub-2 mm height inductors and reduces EMI fundamental. |
| Input Voltage Range | 2.95 V to 5.5 V-directly compatible with 3.3 V and 5 V system buses. |
| Feedback Reference | 0.8 V ±12 mV-sets output as low as 0.8 V with <0.08%/A load regulation. |
| Current Limit Threshold | 4.8 A typical-provides 60% headroom above 3 A rating for transient overload tolerance. |
| Efficiency | 96% peak at 1.2 V/3 A-minimizes thermal load in space-constrained HTSSOP-16 package. |
| Thermal Shutdown | 160°C with 10°C hysteresis-prevents latch-up during sustained overload or poor PCB heatsinking. |
Pinout & Package
LM20123MHX/NOPB uses a 16-pin HTSSOP package (Package Number PWP0016A) with exposed thermal pad (EP), optimized for PCB copper pour heat dissipation. θJA = 38°C/W enables 2.6 W max power dissipation at 25°C ambient.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SS/TRK (Pin 1) | Soft-start/Tracking control | 5 µA internal current source charges external CSS; tracks external rail within ±10 mV of FB voltage. |
| FB (Pin 2) | Feedback input | Connects to resistor divider; regulates output by comparing against 0.8 V internal reference. |
| PGOOD (Pin 3) | Open-drain power-good flag | Asserts low when VOUT deviates >6% from target; requires 10–100 kΩ pull-up. |
| COMP (Pin 4) | Error amplifier output | Connects RC1/CC1 network to set loop crossover and phase margin for stability. |
| PVIN (Pins 5,6) | Power input to switches | Must be tied together and decoupled with low-ESR capacitor near pins. |
| SW (Pins 7,8) | Switch node | Drives external inductor; high dv/dt node requiring tight layout and optional snubber. |
| PGND (Pins 9,10) | Power ground return | Low-impedance path for switch currents; separate from AGND to avoid noise coupling. |
| EN (Pin 12) | Precision enable input | Turns on at 1.18 V (±66 mV hysteresis); supports precise input-voltage sequencing via resistor divider. |
| VCC (Pin 13) | Internal 2.7 V bias rail | Bypass with 1 µF ceramic capacitor; powers internal logic and gate drivers. |
| AVIN (Pin 14) | Analog supply input | Must connect to PVIN through RC filter to suppress switching noise from bias circuitry. |
| AGND (Pin 15) | Analog ground reference | Quiet ground for error amp, reference, and UVLO; must be isolated from PGND at single point. |
| NC (Pins 11,16) | No-connect | Must be connected to GND for proper operation per TI datasheet. |
| EP | Exposed thermal pad | Electrically connected to GND; solder to PCB ground plane for optimal thermal performance. |
Key Features
| Feature | Design Value |
|---|---|
| Pre-biased startup | Starts into existing VOUT without sinking current-protects FPGA/ASIC I/O from reverse conduction damage. |
| Nonlinear slope compensation | Parabolic ramp adapts to VOUT level-ensures stable CCM/DCM transition across full 0.8–5.5 V range. |
| Diode emulation mode | Disables low-side FET at zero inductor current-eliminates reverse current and improves light-load efficiency. |
| Adjustable soft-start | External capacitor sets ramp time; default 1 ms internal ramp avoids input surge on unbuffered 3.3 V/5 V rails. |
| Integrated OVP/UVP/thermal protection | Trips at 108% VFB overvoltage, 94% VFB undervoltage, and 160°C junction-latches off until cooldown. |
Applications
| Point-of-Load for FPGA Core | DSP Power Sequencing |
|---|---|
Use Scenario: Powers Xilinx Artix-7 or Intel Cyclone V core rail (1.0–1.2 V) from 5 V backplane with strict monotonic startup. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering 3 A with pre-bias startup and PGOOD signaling for FPGA configuration lock. Use Value: Eliminates need for external tracking IC; SS/TRK pin synchronizes ramp with higher-voltage I/O rail to prevent latch-up. | Use Scenario: Supplies TI C6000 DSP core (1.2 V) and memory interface (1.5 V) with controlled power-up order. IC Role / Device Role / Timing Role: Secondary regulated rail generator using EN pin threshold and resistor divider to delay turn-on after main 3.3 V rail stabilizes. Use Value: Precision 1.18 V EN threshold enables accurate sequencing without external supervisors or timers. |
| ASIC Core Supply | Optical Transceiver Bias |
Use Scenario: Delivers 1.8 V @ 2.5 A to Broadcom BCM84891 SerDes ASIC in telecom line card with high thermal density. IC Role / Device Role / Timing Role: High-efficiency, thermally robust DC-DC converter leveraging HTSSOP EP pad and 96% efficiency to minimize board hotspots. Use Value: 32 mΩ/36 mΩ integrated FETs reduce conduction loss; thermal shutdown prevents field failure under airflow-limited conditions. | Use Scenario: Generates stable 2.5 V bias for SFP+ laser driver ICs requiring low-noise, fast-transient response. IC Role / Device Role / Timing Role: Low-ripple point-of-load regulator using ceramic COUT and COMP-loop tuning for <1% output deviation during burst-mode data transmission. Use Value: 0.8 V reference and 510 µmho error amp enable tight regulation; PGOOD confirms rail readiness before laser activation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54331DR | 3 A, 570 kHz, no pre-bias startup, 0.8 V ref, SOIC-8 package | Lacks SS/TRK tracking and pre-bias capability; lower frequency increases inductor size | Choose for cost-sensitive, non-sequenced 12 V input systems where layout area is less constrained. |
| MP2315GJ-Z | 3 A, 1.5 MHz, 0.8 V ref, no PGOOD, QFN-10 package, no pre-bias support | Missing PGOOD flag and tracking-unsuitable for FPGA configuration or multi-rail coordination | Use where compact QFN footprint is critical and system-level monitoring replaces PGOOD functionality. |
Compared with TPS54331DR and MP2315GJ-Z, LM20123MHX/NOPB uniquely combines 1.5 MHz operation, pre-bias startup, SS/TRK tracking, and PGOOD in a thermally enhanced HTSSOP package-making it the only option among the three qualified for automotive-grade LM20123Q derivative applications and strict FPGA power sequencing.
Availability
LM20123MHX/NOPB is available at Aetrix Electronics and suitable for FPGA core power, DSP supply sequencing, ASIC biasing, and optical transceiver regulation requiring stable component supply across industrial temperature range (−40°C to +125°C).
Supply support for LM20123MHX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-reliability power conversion solutions.
The LM20123MHX/NOPB belongs to TI's PowerWise® synchronous buck regulator family, engineered for high-efficiency, low-noise point-of-load conversion in space- and thermal-constrained digital systems like FPGAs, DSPs, and ASICs.
FAQ
What is the maximum output current supported by LM20123MHX/NOPB?
The LM20123MHX/NOPB delivers up to 3 A of continuous output current under typical thermal conditions (θJA = 38°C/W, TA = 25°C). Its 4.8 A typical current limit provides headroom for transient loads. Derating is required above 85°C ambient; full 3 A operation is guaranteed from −40°C to +85°C with adequate PCB copper pour on the exposed pad.
Does LM20123MHX/NOPB support startup into a pre-biased output?
Yes, LM20123MHX/NOPB supports pre-biased startup: it will not sink current from an externally biased output until the internal soft-start ramp exceeds the FB pin voltage. This prevents damage to FPGA or ASIC I/O structures during multi-rail power-up and is confirmed in the datasheet's Operation Description section.
What package type and thermal characteristics does LM20123MHX/NOPB use?
LM20123MHX/NOPB uses a 16-pin HTSSOP package (PWP0016A) with exposed thermal pad. Its junction-to-ambient thermal resistance is 38°C/W, enabling 2.6 W max power dissipation at 25°C ambient. For reliable 3 A operation, the EP pad must be soldered to a minimum 200 mm² PCB ground copper area.
How is output voltage set on LM20123MHX/NOPB?
LM20123MHX/NOPB uses a resistor divider (RFB1/RFB2) from VOUT to FB to set output voltage based on its internal 0.8 V reference. RFB2 is typically 10.2 kΩ; RFB1 is calculated as RFB1 = (VOUT/0.8 − 1) × RFB2. For example, 1.2 V output requires RFB1 = 5.0 kΩ (4.99 kΩ standard value).
What protection features are integrated into LM20123MHX/NOPB?
LM20123MHX/NOPB integrates overvoltage protection (108% VFB trip), undervoltage lockout (2.7 V rising threshold), thermal shutdown (160°C), cycle-by-cycle current limiting (4.8 A typical), and open-drain PGOOD reporting. All protections are fully autonomous-no external components required-and reset automatically after fault clearance.
LM20123MHX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- PowerWise®
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.95V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 4.68V
- Current - Output:
- 3A
- Frequency - Switching:
- 1.5MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
LM20123MHX/NOPB FAQ
1.How can I place an order for LM20123MHX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM20123MHX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM20123MHX/NOPB reliable?
The price and inventory of LM20123MHX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM20123MHX/NOPB is usually 5 days.
3.What payment methods are accepted for LM20123MHX/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM20123MHX/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM20123MHX/NOPB?
LM20123MHX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM20123MHX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM20123MHX/NOPB?
For technical support, including LM20123MHX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM20123MHX/NOPB requirements.
6.How does Aetrix verify that LM20123MHX/NOPB is sourced from the original manufacturer or authorized distributors?
All LM20123MHX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM20123MHX/NOPB meets industry standards.
7.What is the process for return or replacement of LM20123MHX/NOPB?
All LM20123MHX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM20123MHX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM20123MHX/NOPB part is unused and in its original packaging.
Return procedure for LM20123MHX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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