Texas Instruments LM20134MHE/NOPB
- Part No.:
- LM20134MHE/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LM20134MHE/NOPB.pdf
- Description:
- IC REG BUCK ADJ 4A 16HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM20134MHE/NOPB from Texas Instruments is a 4A synchronous buck regulator with peak current mode control, 2.95V–5.5V input range, adjustable 0.8V output, and integrated 32 mΩ/36 mΩ high-side/low-side FETs. It delivers up to 97% efficiency in point-of-load applications for FPGAs, DSPs, and ASICs.
For engineers reviewing the LM20134MHE/NOPB datasheet, LM20134MHE/NOPB pinout, LM20134MHE/NOPB application, or LM20134MHE/NOPB equivalent, key selection considerations include pre-biased start-up capability, frequency synchronization (500 kHz–1.5 MHz), soft-start/tracking dual-function pin, ±10 mV FB accuracy, and thermal shutdown at 160°C.
Technical Context
The LM20134MHE/NOPB implements peak current mode control with nonlinear parabolic slope compensation-dynamically adjusted per output voltage-to ensure stability across 0.8V–VIN−0.5V output range without external compensation complexity. Its internal 2.7V sub-regulator powers bias circuitry via VCC, while AVIN/AGND provide isolated analog supply and ground for error amplifier precision.
Operation includes cycle-by-cycle current limiting (6.4A typical), OVP (108% of VFB), PGOOD with 16 µs deglitching, and UVLO with 2.7V turn-on threshold and 66 mV hysteresis. The SYNC pin accepts TTL-compatible inputs (VIH = 2V, VIL = 0.8V) and locks to rising edges for multi-phase synchronization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 4A continuous; supports FPGA core rails with margin above typical 3A loads. |
| Input Voltage Range | 2.95V to 5.5V; compatible with standard 3.3V and 5V intermediate buses. |
| Feedback Voltage | 0.8V ±12 mV; enables precise 0.8V–3.3V output setting using resistor divider. |
| Switching Frequency | 410 kHz internal or 500 kHz–1.5 MHz synchronized; allows optimized inductor size vs. EMI trade-off. |
| High-Side RDS(on) | 36 mΩ typical at 3.5A; reduces conduction loss and thermal stress at full load. |
| Soft-Start Control | SS/TRK pin with 5 µA internal current source; sets monotonic ramp time via external capacitor. |
| Thermal Shutdown | 160°C activation with 10°C hysteresis; protects against sustained overload or poor PCB thermal design. |
Pinout & Package
LM20134MHE/NOPB uses a 16-pin HTSSOP package with exposed thermal pad (Package Number PWP0016A). The exposed pad must be soldered to PCB ground plane for optimal thermal performance (θJA = 38°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 SS/TRK | Soft-start or tracking control | 5 µA current source charges external capacitor for controlled ramp; also accepts external voltage for rail tracking. |
| 2 FB | Feedback input | Connects to resistor divider; regulates output by comparing to 0.8V internal reference. |
| 3 PGOOD | Open-drain power-good indicator | Sinks current when VOUT is within ±6% of target; requires 10–100 kΩ pull-up. |
| 4 COMP | Compensation node | External RC network sets loop crossover and phase margin for stable transient response. |
| 5 NC | No-connect | Must be tied to AGND for proper operation; not internally connected. |
| 6,7 PVIN | Power input to switches | High-current path for input bus; connect together and decouple with low-ESR capacitor near pins. |
| 8,9 SW | Switch node | Drives external inductor; high dv/dt node requiring careful layout and optional snubber. |
| 10,11 PGND | Power ground return | Low-impedance return for switch currents; separate from AGND to minimize noise coupling. |
| 12 EN | Precision enable input | Turns device on at 1.18V (typical); 66 mV hysteresis prevents chatter during brownout. |
| 13 VCC | Internal 2.7V bias supply | Bypass with 1 µF ceramic capacitor; powers internal logic and gate drivers. |
| 14 AVIN | Analog supply input | Must connect to VIN through RC filter to reduce noise on internal bias generation. |
| 15 AGND | Analog ground reference | Quiet ground for error amplifier and reference; connect to system AGND star point. |
| 16 SYNC | Frequency synchronization input | Accepts external clock; locks switching edge to rising edge for multi-converter phase alignment. |
| EP | Exposed thermal pad | Weakly tied to GND; solder to large PCB copper area for thermal dissipation and EMI reduction. |
Key Features
| Feature | Design Value |
|---|---|
| Pre-biased start-up | Enables safe power sequencing in multi-rail systems without sinking current from already-biased outputs. |
| Nonlinear slope compensation | Parabolic ramp adapts to output voltage, eliminating need for manual compensation tuning across 0.8V–3.3V range. |
| Diode emulation mode | Disables reverse current at light loads (<100 mA), improving efficiency and preventing inductor saturation. |
| Integrated OVP + UVLO + thermal shutdown | Single-chip protection suite eliminates discrete fault-detection components and reduces BOM count. |
| Adjustable soft-start & tracking | Dual-function SS/TRK pin supports both monotonic power-up and dynamic voltage sequencing with external resistors. |
Applications
| Point-of-Load Regulation | FPGA Core Power |
|---|---|
Use Scenario: Stepping down 5V or 3.3V intermediate bus to 1.2V/1.0V for processor I/O or memory interface rails. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering regulated DC output with fast transient response. Use Value: 97% peak efficiency and 4A capability minimize heat generation and simplify thermal management on dense PCBs. | Use Scenario: Supplying configurable logic core voltage (e.g., 0.85V–1.2V) to Xilinx or Intel FPGAs during configuration and operation. IC Role / Device Role / Timing Role: Adjustable-output buck converter with pre-bias start-up and PGOOD signaling for FPGA power sequencing. Use Value: SS/TRK pin enables voltage tracking with auxiliary rails; ±12 mV FB accuracy ensures compliance with FPGA VCCINT tolerance. |
| DSP/ASIC Core Supply | Optical Networking Line Cards |
Use Scenario: Generating low-noise 1.1V or 1.25V supply for TI C6000 DSPs or custom ASICs in telecom baseband processing. IC Role / Device Role / Timing Role: High-efficiency, current-mode-controlled DC-DC converter with tight load regulation (0.08%/A). Use Value: Integrated 32/36 mΩ FETs reduce conduction loss; COMP pin allows loop optimization for <10 µs load-step recovery. | Use Scenario: Powering SerDes, transceivers, and microcontrollers on line cards where EMI-sensitive analog circuits coexist. IC Role / Device Role / Timing Role: Synchronized buck regulator operating at 1 MHz to avoid critical 800–900 MHz EMI bands. Use Value: SYNC pin enables phase-shifted operation with adjacent converters, reducing input ripple current and bulk capacitor requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS544B20RTWR | Higher 4.5A rating, 2.95V–18V input, integrated MOSFETs with lower RDS(on) (1.8 mΩ HS), but requires external compensation. | Supports wider input range and higher current; better suited for 12V intermediate bus designs. | Select TPS544B20RTWR when input exceeds 5.5V or >4A peak load is required; LM20134MHE/NOPB remains optimal for 3.3V/5V bus with minimal external parts. |
| MP2315GJ-Z | 4A rating, 4.5V–28V input, fixed 500 kHz frequency, no SYNC or tracking; smaller QFN-10 package, no exposed pad. | Lacks synchronization, soft-start adjustment, and pre-bias start-up; limited to simpler, cost-sensitive applications. | Choose MP2315GJ-Z for space-constrained, non-sequenced 12V-to-3.3V conversion; LM20134MHE/NOPB preferred where rail tracking, EMI control, or robust fault handling is critical. |
Compared with TPS544B20RTWR and MP2315GJ-Z, LM20134MHE/NOPB uniquely balances wide-input compatibility (2.95V–5.5V), precision sequencing features (SS/TRK, PGOOD), and minimal external component count-making it ideal for compact, multi-rail embedded systems where 5V/3.3V bus regulation dominates.
Availability
LM20134MHE/NOPB is available at Aetrix Electronics and suitable for FPGA power delivery, DSP core supplies, optical networking line cards, and industrial embedded controllers requiring stable component supply and long-term production support.
Supply support for LM20134MHE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability power conversion ICs.
The LM20134MHE/NOPB belongs to TI's PowerWise® synchronous buck regulator family, engineered for high-efficiency, low-voltage point-of-load conversion in space-constrained, thermally sensitive applications such as communications infrastructure and programmable logic.
FAQ
What is the recommended input capacitor for LM20134MHE/NOPB?
A minimum 47 µF low-ESR ceramic capacitor placed directly across PVIN and PGND is recommended for LM20134MHE/NOPB. For best high-frequency noise suppression and transient response, use parallel 10 µF X7R + 1 µF C0G ceramics near pins 6/7 and 10/11. Total effective capacitance should exceed 60 µF with impedance below 10 mΩ at 1 MHz to limit input voltage droop during 4A load steps.
Does LM20134MHE/NOPB support output voltage tracking?
Yes, LM20134MHE/NOPB supports output voltage tracking via its SS/TRK pin. When driven by an external voltage ramp (e.g., from another regulator's soft-start node), the LM20134MHE/NOPB output follows that ramp with ±10 mV accuracy relative to FB. This enables precise power sequencing in multi-rail systems such as FPGA configurations where core and I/O voltages must ramp in defined order.
What is the maximum junction temperature and thermal shutdown behavior of LM20134MHE/NOPB?
The LM20134MHE/NOPB activates thermal shutdown at 160°C junction temperature and holds power FETs tri-stated until junction cools to ~150°C (10°C hysteresis). During shutdown, soft-start resets and PGOOD goes low. This protects against permanent damage under sustained overload or inadequate heatsinking. The HTSSOP package with exposed pad achieves θJA = 38°C/W with 2-in² 2-oz copper pour.
Can LM20134MHE/NOPB start up into a pre-biased output?
Yes, LM20134MHE/NOPB supports pre-biased start-up: when VOUT > 0V at power-on, it does not sink current from the output. Instead, the internal soft-start ramp must exceed the FB voltage before enabling switching. This prevents reverse current flow through load parasitics-critical for powering FPGAs or ASICs sharing supply rails via I/O clamps or body diodes.
What are the key differences between LM20134MHE/NOPB and LM20134Q?
The LM20134Q is the AEC-Q100 qualified automotive-grade variant of LM20134MHE/NOPB, manufactured on an automotive flow with extended temperature testing (−40°C to +125°C junction). Both share identical electrical specs, pinout, and package-but LM20134MHE/NOPB is rated for commercial/industrial use (−40°C to +125°C), while LM20134Q includes additional qualification data for automotive reliability and lot traceability.
LM20134MHE/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- PowerWise®
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.95V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 4.68V
- Current - Output:
- 4A
- Frequency - Switching:
- 410kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
LM20134MHE/NOPB FAQ
1.How can I place an order for LM20134MHE/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM20134MHE/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM20134MHE/NOPB reliable?
The price and inventory of LM20134MHE/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM20134MHE/NOPB is usually 5 days.
3.What payment methods are accepted for LM20134MHE/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM20134MHE/NOPB transactions.
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4.How is shipping managed for LM20134MHE/NOPB?
LM20134MHE/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM20134MHE/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM20134MHE/NOPB?
For technical support, including LM20134MHE/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM20134MHE/NOPB requirements.
6.How does Aetrix verify that LM20134MHE/NOPB is sourced from the original manufacturer or authorized distributors?
All LM20134MHE/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM20134MHE/NOPB meets industry standards.
7.What is the process for return or replacement of LM20134MHE/NOPB?
All LM20134MHE/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM20134MHE/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM20134MHE/NOPB part is unused and in its original packaging.
Return procedure for LM20134MHE/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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