Texas Instruments LM20143QMHE/NOPB
- Part No.:
- LM20143QMHE/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LM20143QMHE/NOPB.pdf
- Description:
- IC REG BUCK ADJ 3A 16HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM20143QMHE/NOPB from Texas Instruments is a 3-A synchronous buck regulator with peak current mode control, adjustable switching frequency (500 kHz–1.5 MHz), 0.8-V minimum output voltage, and integrated 32-mΩ high-side/36-mΩ low-side FETs. It delivers stable point-of-load regulation for FPGA, DSP, and microprocessor core rails from 3.3-V or 5-V input buses.
For engineers reviewing the LM20143QMHE/NOPB datasheet, LM20143QMHE/NOPB pinout, LM20143QMHE/NOPB application, or LM20143QMHE/NOPB equivalent, key selection criteria include pre-bias startup capability, precision enable threshold (1.18 V typ), PGOOD accuracy (±2% hysteresis), and nonlinear slope compensation for wide-output-voltage stability.
Technical Context
The LM20143QMHE/NOPB implements peak current mode control with nonlinear parabolic slope compensation-dynamically adjusted per output voltage-to prevent subharmonic oscillation across 0.8 V to VIN−0.3 V output range. Its transconductance error amplifier (Gm = 510 µmho) interfaces directly with external RC compensation on the COMP pin for flexible loop tuning.
It integrates dual power FETs, internal 2.7-V VCC regulator, analog bias circuitry (AVIN/AGND), and fault protection including OVP (108% VFB), thermal shutdown (160°C), and cycle-by-cycle current limiting (4.8 A typ). The SS/TRK pin supports both soft-start (via external capacitor) and ratiometric voltage tracking of external rails.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 3 A continuous-supports high-current digital loads without external FETs or heatsinks. |
| Input Voltage Range | 2.95 V to 5.5 V-compatible with standard 3.3-V and 5-V system buses. |
| Feedback Reference | 0.80 V ±1.5%-enables precise low-voltage core regulation down to 0.8 V with minimal resistor tolerance impact. |
| Switching Frequency | 500 kHz to 1.5 MHz-adjustable via RT-to-GND resistor; enables compact magnetics and EMI optimization. |
| Peak Efficiency | 97% at 1 A, 5 VIN/1.2 VOUT-minimizes thermal load in space-constrained embedded systems. |
| Current Limit Accuracy | ±10% over −40°C to 125°C-allows reliable inductor sizing with margin for worst-case temperature drift. |
| Soft-Start Control | External capacitor on SS/TRK pin-provides monotonic startup and eliminates inrush-induced rail collapse. |
Pinout & Package
LM20143QMHE/NOPB uses a 16-pin HTSSOP package (4.4 mm × 5.0 mm) with exposed thermal pad (EP) electrically tied to GND for enhanced thermal performance (θJA = 39.3°C/W on 4-layer JEDEC board).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 SS/TRK | Soft-Start/Tracking Input | 5-µA internal current source charges external cap for controlled ramp; also accepts external voltage for rail tracking. |
| 2 FB | Feedback Input | Senses output voltage divider; referenced to 0.8-V internal bandgap-sets regulation point with <1.5% error. |
| 3 PGOOD | Power-Good Output | Open-drain signal asserting when VOUT is within ±2% of target-enables safe sequencing with downstream logic. |
| 4 COMP | Compensation Output | Connects external RC network to stabilize control loop-supports ceramic, polymer, or electrolytic output capacitors. |
| 5 NC | No Connect | Internally unconnected; must be grounded per TI layout guidelines to reduce noise coupling. |
| 6–7 PVIN | Power Switch Input | Dual pins for low-inductance connection to input bulk capacitor-reduces switching node ringing and EMI. |
| 8 SW | Switch Node | Drives external inductor; connects internally to high-side and low-side FETs-requires tight layout to minimize parasitic inductance. |
| 9–10 PGND | Power Ground | Dedicated ground return for power FETs-separated from AGND to avoid noise injection into error amplifier. |
| 11 EN | Enable Input | 1.18-V typical turn-on threshold with 66-mV hysteresis-supports precise input-voltage sequencing via resistor divider. |
| 12 VCC | Internal Regulator Output | 2.7-V supply for gate drivers and logic; bypassed with 1-µF ceramic cap to maintain stable switching under load transients. |
| 13 AVIN | Analog Supply Input | Filtered input for internal bias circuitry-requires RC filter (R=10 Ω, C=1 µF) to suppress noise from power switches. |
| 14 AGND | Analog Ground | Quiet reference for FB, COMP, and error amplifier-must be star-connected to EP ground to preserve PSRR. |
| 15 RT | Frequency Set Input | Resistor-to-GND sets oscillator frequency linearly-49.9 kΩ yields 1.5 MHz; 249 kΩ yields 510 kHz. |
| 16 EP | Exposed Thermal Pad | Thermally critical ground connection-must be soldered to ≥2 cm² PCB copper area with ≥4 thermal vias for θJA compliance. |
Key Features
| Feature | Design Value |
|---|---|
| Nonlinear Slope Compensation | Parabolic ramp adapts to output voltage-ensures stable operation from 0.8 V to 5.2 V without manual compensation re-tuning. |
| Pre-Bias Startup | Zero-sink behavior during startup prevents damage to pre-biased FPGA/DSP cores-no external diode required. |
| Diode Emulation Mode | Disables reverse current at light loads (<100 mA)-eliminates body-diode conduction loss and improves efficiency by >15% at 10 mA. |
| Integrated OVP + UVLO | OVP triggers at 108% VFB with 3% hysteresis; UVLO activates at 2.7 V with 45-mV hysteresis-prevents brownout instability. |
| Tracking Capability | SS/TRK pin accepts external voltage divider-enables simultaneous or ratiometric startup with higher-voltage rails (e.g., I/O before core). |
Applications
| High-Performance FPGA Power | Multi-Rail Microprocessor Core |
|---|---|
|
Use Scenario: Powers Xilinx Artix-7 or Intel Cyclone V core rail (0.9–1.2 V) from 3.3-V bus while tracking I/O rail. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering 3-A continuous current with monotonic startup and PGOOD sequencing. Use Value: Pre-bias startup avoids latch-up during hot-plug; tracking ensures core voltage never exceeds I/O, preventing gate oxide stress. |
Use Scenario: Supplies ARM Cortex-A53 cluster core (0.8–1.1 V) in automotive ADAS domain controller with strict thermal limits. IC Role / Device Role / Timing Role: High-efficiency point-of-load regulator with thermal shutdown (160°C) and accurate current limit for safety-critical operation. Use Value: 97% peak efficiency reduces board-level heat density; integrated OVP protects SoC from overvoltage faults during transient events. |
| Broadband Baseband Processing | Optical Line Card DC/DC |
|
Use Scenario: Generates 1.0-V supply for TI C66x DSP in wireless base station radio unit with 5-V backplane input. IC Role / Device Role / Timing Role: Adjustable-frequency buck converter operating at 1.2 MHz to avoid interference with RF front-end clock harmonics. Use Value: 500 kHz–1.5 MHz frequency tuning enables EMI spread-spectrum alignment; soft-start prevents input bus droop during burst-mode processing. |
Use Scenario: Provides isolated 3.3-V auxiliary rail for SFP+ transceiver modules in telecom line cards powered from 5-V midplane. IC Role / Device Role / Timing Role: Compact, thermally robust buck regulator mounted near optical modules with minimal footprint (4.4 × 5.0 mm). Use Value: Exposed thermal pad dissipates >2 W with 39.3°C/W θJA; PGOOD signal coordinates hot-swap insertion sequence with host controller. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54332DR | Fixed 500-kHz frequency; no RT pin; lower 0.76-V reference; 3.5-A current limit. | Lacks adjustable frequency and tracking-suitable only for fixed-frequency, non-sequencing designs. | Choose TPS54332DR if board space is constrained and frequency flexibility is unnecessary. |
| LM2678SX-3.3/NOPB | Fixed 3.3-V output; 5-A rating; requires external compensation; no PGOOD or tracking. | Not adjustable-only valid where 3.3-V output is mandatory and sequencing is handled externally. | Choose LM2678SX-3.3/NOPB only for legacy 3.3-V-only applications with no voltage scaling needs. |
Compared with TPS54332DR and LM2678SX-3.3/NOPB, LM20143QMHE/NOPB uniquely combines adjustable frequency, output tracking, and pre-bias startup-making it the only option for FPGA/DSP multi-rail sequencing where core voltage must ramp synchronously with I/O.
Availability
LM20143QMHE/NOPB is available at Aetrix Electronics and suitable for high-performance FPGA power, automotive ADAS processors, broadband baseband processing, and optical line card DC/DC applications requiring stable component supply across extended temperature ranges.
Supply support for LM20143QMHE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-reliability power conversion solutions.
The LM20143QMHE/NOPB belongs to TI's PowerWise™ synchronous buck regulator family, engineered for high-efficiency, low-noise point-of-load regulation in FPGA, DSP, and microprocessor applications demanding precise voltage control and robust sequencing.
FAQ
What is the recommended input capacitor for LM20143QMHE/NOPB?
The LM20143QMHE/NOPB requires a low-ESR ceramic input capacitor placed close to the PVIN and PGND pins. TI recommends ≥22 µF X5R/X7R ceramic with ≤5 mΩ ESR, split across multiple 0805 or 1206 devices to minimize loop inductance. This ensures stable switching and reduces input ripple below 50 mVpp at full load.
Does LM20143QMHE/NOPB support forced PWM mode at light loads?
No, LM20143QMHE/NOPB does not support forced PWM mode. It automatically enters diode emulation mode below ~100 mA and may skip pulses at very light loads to maximize efficiency. For constant-frequency operation across all loads, consider TI's TPS543B20 or TPS53355 instead.
Can LM20143QMHE/NOPB start up into a pre-biased output?
Yes, LM20143QMHE/NOPB supports pre-bias startup: it will not sink current from a pre-charged output until the SS/TRK soft-start ramp exceeds the FB voltage. This prevents reverse current flow and protects sensitive FPGA or ASIC core rails during hot-swap or multi-rail power sequencing.
What is the maximum allowable RT resistor value for LM20143QMHE/NOPB?
The maximum RT resistor value for LM20143QMHE/NOPB is 249 kΩ, which sets the minimum switching frequency to 450 kHz (typical). Values above 249 kΩ risk unstable oscillator operation or failure to start; TI's datasheet specifies 450–1650 kHz as the validated range using 249 kΩ to 49.9 kΩ resistors.
How is thermal performance affected if the EP pad is not soldered?
If the exposed thermal pad (EP) of LM20143QMHE/NOPB is not soldered to the PCB ground plane, θJA degrades from 39.3°C/W to >70°C/W-causing junction temperature to exceed 125°C at just 1.5 A load. TI mandates ≥4 thermal vias and ≥2 cm² copper area under EP for reliable 3-A operation across −40°C to 125°C.
LM20143QMHE/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- PowerWise®
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.95V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 4.68V
- Current - Output:
- 3A
- Frequency - Switching:
- 500kHz ~ 1.5MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
LM20143QMHE/NOPB FAQ
1.How can I place an order for LM20143QMHE/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM20143QMHE/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM20143QMHE/NOPB reliable?
The price and inventory of LM20143QMHE/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM20143QMHE/NOPB is usually 5 days.
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Once your LM20143QMHE/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM20143QMHE/NOPB?
For technical support, including LM20143QMHE/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM20143QMHE/NOPB requirements.
6.How does Aetrix verify that LM20143QMHE/NOPB is sourced from the original manufacturer or authorized distributors?
All LM20143QMHE/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM20143QMHE/NOPB meets industry standards.
7.What is the process for return or replacement of LM20143QMHE/NOPB?
All LM20143QMHE/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM20143QMHE/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM20143QMHE/NOPB part is unused and in its original packaging.
Return procedure for LM20143QMHE/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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