Texas Instruments LM20143QMH/NOPB
- Part No.:
- LM20143QMH/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LM20143QMH/NOPB.pdf
- Description:
- IC REG BUCK ADJ 3A 16HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:368
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Product details
Overview
LM20143QMH/NOPB from Texas Instruments is a 3-A synchronous buck regulator with peak current mode control, adjustable switching frequency (500 kHz–1.5 MHz), 0.8-V minimum output voltage, and integrated 32-mΩ high-side/36-mΩ low-side FETs. It delivers stable point-of-load regulation for FPGA, DSP, and microprocessor core rails from 3.3-V or 5-V input buses.
For engineers reviewing the LM20143QMH/NOPB datasheet, LM20143QMH/NOPB pinout, LM20143QMH/NOPB application, or LM20143QMH/NOPB equivalent, key selection criteria include pre-bias startup capability, precision enable threshold (1.18 V typ), PGOOD deglitch time (16 µs), soft-start tracking functionality, and thermal shutdown at 160°C.
Technical Context
The LM20143QMH/NOPB implements peak current mode control with nonlinear parabolic slope compensation-dynamically adjusted per output voltage-to ensure stability across 0.8 V to VIN − 0.5 V output range without external loop tuning complexity. Its internal 2.7-V sub-regulator powers bias circuitry via VCC, while AVIN is filtered through an external RC network to suppress noise on analog references.
It supports diode emulation mode below critical conduction boundary to eliminate reverse inductor current, and enters pulse-skipping at <100 mA load to sustain >85% efficiency. Fault handling includes cycle-by-cycle current limiting (4.8 A typ), overvoltage protection (108% of VFB), and UVLO with 45 mV hysteresis (2.7 V rising threshold).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 3 A continuous-supports core rail loads for mid-tier FPGAs and application processors without external current sharing. |
| Input Voltage Range | 2.95 V to 5.5 V-directly compatible with standard 3.3-V and 5-V system buses; no intermediate LDO required. |
| Feedback Reference | 0.80 V ±1.5%-enables precise low-voltage outputs (e.g., 1.0 V, 1.2 V) using standard resistor dividers with <±0.5% error contribution. |
| Switching Frequency | 500 kHz to 1.5 MHz-adjustable via RT-to-ground resistor; higher frequencies allow smaller inductors (e.g., 1.0 µH at 1 MHz) and reduced output ripple. |
| Peak Efficiency | 97% at 1.2 V/2 A, 5 V input-achieved via low RDS(on) FETs (32/36 mΩ) and optimized gate drive, minimizing conduction and switching losses. |
| Soft-Start Time | Adjustable via external capacitor on SS/TRK-default 1 ms internal ramp; enables monotonic startup and prevents inrush into prebiased loads. |
| Thermal Shutdown | 160°C with 10°C hysteresis-protects against sustained overload or poor PCB thermal design; auto-recovery at ~150°C. |
Pinout & Package
LM20143QMH/NOPB uses a 16-pin HTSSOP package (4.4 mm × 5.0 mm) with exposed thermal pad (EP) electrically tied to PGND-requires soldering to PCB ground plane for optimal θJA = 39.3°C/W performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 SS/TRK | Soft-start or tracking control input | 5-µA internal current source charges external capacitor; overrides FB reference if driven <800 mV-enables ratiometric sequencing with other rails. |
| 2 FB | Feedback input | Connects to resistor divider from VOUT; senses 0.8-V reference-sets output voltage as VOUT = 0.8 × (1 + R1/R2). |
| 3 PGOOD | Open-drain power-good indicator | Sinks current when VOUT is within ±6% of target; 16-µs deglitch prevents false asserts during transients. |
| 4 COMP | Compensation node | Connects external RC network to stabilize control loop-two-component compensation supports ceramic or polymer capacitors. |
| 5 NC | No connect | Internally unconnected; must be grounded per TI recommendation to reduce noise coupling. |
| 6–7 PVIN | Power switch input | Dual pins minimize high-current path inductance; requires local 10-µF low-ESR ceramic capacitor to suppress input ripple. |
| 8 SW | Switch node | Drives external inductor; transitions between PVIN and PGND-requires tight layout to minimize EMI and ringing. |
| 9–10 PGND | Power ground return | Low-impedance return for high-side/low-side FETs; must be isolated from AGND except at single-point star ground. |
| 11 EN | Enable input | 1.18-V typical turn-on threshold with 66-mV hysteresis-allows precise input-voltage sequencing via resistor divider from PVIN. |
| 12 VCC | Internal 2.7-V regulator output | Bypass with 1-µF ceramic capacitor; supplies gate drivers and analog circuitry-decouples noise from PVIN. |
| 13 AVIN | Analog supply input | Filtered via external RC (e.g., 10-Ω + 1-µF) from PVIN-stabilizes internal references and error amplifier bias. |
| 14 AGND | Analog ground | Quiet reference for FB, COMP, and error amplifier-must be routed separately from PGND and joined only at EP or input cap ground. |
| 15 RT | Frequency adjust | Resistor to ground sets oscillator frequency: 49.9 kΩ → 1.5 MHz, 249 kΩ → 510 kHz-enables EMI optimization. |
| 16 EP | Exposed thermal pad | Electrically connected to PGND; mandatory connection to PCB ground plane for thermal reliability and θJA reduction. |
Key Features
| Feature | Design Value |
|---|---|
| Pre-bias startup | Starts without sinking current from precharged output-prevents damage to FPGA I/O or ASIC core during multi-rail power-up sequences. |
| Nonlinear slope compensation | Parabolic ramp adapts to output voltage-ensures stable operation across full 0.8 V–VIN−0.5 V range without manual loop re-tuning. |
| Diode emulation mode | Disables low-side FET at zero inductor current-eliminates reverse conduction loss and improves light-load efficiency (>85% at 100 mA). |
| Integrated OVP & UVLO | OVP triggers immediate low-side turn-on at 108% VFB; UVLO holds disable until PVIN ≥2.7 V with 45-mV hysteresis-prevents erratic startup during brownout. |
| Tracking capability | SS/TRK pin accepts external voltage divider-enables simultaneous or ratiometric startup with higher-voltage rails (e.g., I/O before core). |
Applications
| FPGA Core Power Supply | DSP Point-of-Load Regulation |
|---|---|
Use Scenario: Powers 1.0-V or 1.2-V core rail of Xilinx Artix-7 or Intel Cyclone V FPGA during cold start with prebiased I/O rail at 2.5 V. IC Role / Device Role / Timing Role: Primary synchronous buck converter delivering regulated core voltage; manages soft-start timing and PGOOD assertion to coordinate with I/O rail sequencer. Use Value: Pre-bias startup prevents reverse current flow into core domain; 97% peak efficiency reduces thermal load on dense BGA packages. | Use Scenario: Supplies 1.2-V core and 3.3-V I/O rails for TI C6000 DSP in broadband base station card with strict transient response requirements. IC Role / Device Role / Timing Role: High-efficiency POL regulator with fast load-step response (<50 µs recovery); PGOOD signal gates downstream logic initialization. Use Value: Adjustable 1-MHz switching frequency minimizes inductor size; peak current mode control ensures <1% output deviation under 2-A step load. |
| Optical Transceiver Bias | Industrial PLC CPU Module |
Use Scenario: Generates stable 2.5-V bias for SFP+ laser driver ICs in 10-Gbps optical line cards where EMI-sensitive analog circuits share PCB space. IC Role / Device Role / Timing Role: Low-noise buck regulator operating at 1.5 MHz to shift switching harmonics above sensitive RF bands; AVIN filtering suppresses supply noise. Use Value: 16-µs PGOOD deglitch avoids false fault asserts during hot-plug insertion; 32-mΩ FETs limit thermal rise in confined module space. | Use Scenario: Powers ARM Cortex-A9 CPU core (1.35 V @ 1.5 A) in DIN-rail mounted PLC controller requiring extended temperature operation (−40°C to 105°C). IC Role / Device Role / Timing Role: Industrial-grade DC-DC converter with thermal shutdown (160°C) and wide-input support-replaces discrete buck designs with higher reliability. Use Value: Precision enable (1.18 V threshold) interfaces directly with PLC supervisor IC; HTSSOP-EP package meets IPC-610 Class 2 thermal requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM20143TQMH/NOPB | Automotive-grade (AEC-Q100 Grade 1); identical electrical specs but qualified for −40°C to 125°C junction operation. | Required for automotive infotainment or ADAS ECUs; not necessary for commercial industrial use. | Select LM20143TQMH/NOPB only when automotive qualification is mandated-no performance benefit in non-automotive systems. |
| TPS54332DR | 3-A buck with fixed 570-kHz frequency; no RT pin; lower quiescent current (2.5 mA vs 6 mA) but no SS/TRK tracking function. | Lacks voltage tracking and pre-bias startup-unsuitable for FPGA/DSP sequencing; simpler for fixed-frequency cost-sensitive designs. | Choose TPS54332DR only when tracking and prebias are unnecessary and board space favors SOIC-8 over HTSSOP-16. |
Compared with LM20143TQMH/NOPB, the LM20143QMH/NOPB offers identical regulation performance at lower qualification cost; versus TPS54332DR, it provides critical sequencing features (tracking, prebias) essential for complex SoC power trees but requires more external components.
Availability
LM20143QMH/NOPB is available at Aetrix Electronics and suitable for FPGA core power, DSP point-of-load regulation, optical transceiver bias, and industrial PLC CPU modules requiring stable component supply across production lifecycles.
Supply support for LM20143QMH/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC-DC conversion.
The LM20143QMH/NOPB belongs to TI's PowerWise™ synchronous buck regulator family-designed specifically for compact, high-efficiency point-of-load applications in communications infrastructure, computing, and industrial automation.
FAQ
What is the recommended input capacitor for LM20143QMH/NOPB?
The LM20143QMH/NOPB requires a low-ESR ceramic input capacitor placed near the PVIN pins. TI recommends ≥10 µF X5R/X7R ceramic with ≤5 mΩ ESR, rated for ≥6.3 V. Two 4.7-µF capacitors in parallel improve high-frequency decoupling. This minimizes input voltage ripple and stabilizes the power switches during high di/dt transitions.
Does LM20143QMH/NOPB support output voltage tracking, and how is it implemented?
Yes, LM20143QMH/NOPB supports output voltage tracking via the SS/TRK pin. Connect an external resistor divider from a master rail (e.g., 3.3-V I/O supply) to SS/TRK and AGND. The internal 5-µA current source interacts with the divider to force the LM20143QMH/NOPB output to ramp proportionally-enabling simultaneous or ratiometric startup with other regulators in multi-rail systems.
What is the maximum allowable junction temperature for LM20143QMH/NOPB, and how does thermal shutdown behave?
The LM20143QMH/NOPB triggers thermal shutdown at 160°C junction temperature, with 10°C hysteresis. When activated, it tri-states both FETs and resets the soft-start circuit. Operation resumes automatically once the junction cools to ~150°C. This protects against sustained overload or inadequate heatsinking while allowing recovery without manual reset.
Can LM20143QMH/NOPB start up into a prebiased output, and what happens to the low-side FET?
Yes, LM20143QMH/NOPB supports prebias startup. During startup, it will not sink current from a precharged output-i.e., the low-side FET remains off until the internal soft-start ramp exceeds the FB pin voltage. This prevents reverse current flow through parasitic paths in FPGAs or microprocessors, avoiding potential latch-up or I/O damage.
How does the LM20143QMH/NOPB achieve stability with different output capacitor types?
The LM20143QMH/NOPB achieves stability across ceramic, polymer, and electrolytic capacitors via its peak current mode architecture with nonlinear slope compensation. Compensation is applied at the COMP pin using a simple RC network-TI provides design equations and type-specific component values in SNVS528H Section 8.2, enabling robust loop response regardless of capacitor ESR or ESL characteristics.
LM20143QMH/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- PowerWise®
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.95V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 4.68V
- Current - Output:
- 3A
- Frequency - Switching:
- 500kHz ~ 1.5MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
LM20143QMH/NOPB FAQ
1.How can I place an order for LM20143QMH/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM20143QMH/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM20143QMH/NOPB reliable?
The price and inventory of LM20143QMH/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM20143QMH/NOPB is usually 5 days.
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Once your LM20143QMH/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM20143QMH/NOPB?
For technical support, including LM20143QMH/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM20143QMH/NOPB requirements.
6.How does Aetrix verify that LM20143QMH/NOPB is sourced from the original manufacturer or authorized distributors?
All LM20143QMH/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM20143QMH/NOPB meets industry standards.
7.What is the process for return or replacement of LM20143QMH/NOPB?
All LM20143QMH/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM20143QMH/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM20143QMH/NOPB part is unused and in its original packaging.
Return procedure for LM20143QMH/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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