Texas Instruments LM20145MH/NOPB
- Part No.:
- LM20145MH/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LM20145MH/NOPB.pdf
- Description:
- IC REG BUCK ADJ 5A 16HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,467
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LM20145MH/NOPB from Texas Instruments is a synchronous buck DC-DC regulator delivering up to 5A continuous output current, operating from 2.95V–5.5V input, with adjustable switching frequency (250–750 kHz), integrated 32 mΩ high-side/36 mΩ low-side FETs, and precision 0.8V feedback reference. It serves as a primary point-of-load regulator for FPGA, DSP, and ASIC core supplies.
For engineers reviewing the LM20145MH/NOPB datasheet, LM20145MH/NOPB pinout, LM20145MH/NOPB application, or LM20145MH/NOPB equivalent, key selection considerations include its peak-current-mode control architecture, pre-biased start-up capability, PGOOD open-drain signaling, soft-start/tracking dual-function pin, and HTSSOP-16 exposed-pad thermal performance.
Technical Context
The LM20145MH/NOPB implements peak-current-mode control with nonlinear parabolic slope compensation-dynamically adjusted per output voltage-to ensure stability across 0.8V–5.5V VOUT without external loop tuning complexity. Its internal 2.7V sub-regulator (VCC) powers bias circuitry, while AVIN/AGND provide isolated analog supply and ground for error amplifier integrity.
It integrates overvoltage protection (108% of VFB, ±2% hysteresis), thermal shutdown (160°C trip, 10°C hysteresis), UVLO (2.7V rising threshold), and cycle-by-cycle current limiting with foldback during sustained overload. The SS/TRK pin supports both capacitor-programmed soft-start (≈1 ms internal default) and external voltage tracking for multi-rail sequencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 5A continuous - supports high-current digital loads without external FETs or heatsinks. |
| Input Voltage Range | 2.95V to 5.5V - compatible with standard 3.3V and 5V intermediate bus architectures. |
| Feedback Reference | 0.8V ±1.5% - enables precise low-voltage regulation down to 0.8V with minimal resistor tolerance impact. |
| Switching Frequency | 250 kHz to 750 kHz - adjustable via RT-to-ground resistor; higher frequencies allow smaller inductors. |
| High-Side RDS(on) | 36 mΩ (typ) at 3.5A - reduces conduction loss and improves full-load efficiency up to 97%. |
| PGOOD Accuracy | ±2% window around VFB (94%–96% rising, 92%–94% falling) - ensures reliable power sequencing and fault detection. |
| Soft-Start Current | 4.5 µA (typ) sourced from SS/TRK - enables predictable ramp rate with external capacitor (e.g., 100 nF → ~22 ms). |
| Junction Temp Range | −40°C to +125°C - qualified for industrial and automotive Grade 1 (−40°C to +125°C) operation. |
Pinout & Package
LM20145MH/NOPB uses a 16-pin HTSSOP package with exposed thermal pad (Package Number PWP0016A). The exposed pad must be soldered to PCB ground plane to achieve θJA = 38°C/W and sustain full 5A load under industrial ambient conditions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 SS/TRK | Soft-Start / Tracking Control | 5 µA current source charges external capacitor for controlled startup; also accepts external voltage for rail tracking. |
| 2 FB | Feedback Input | Connects to resistor divider; regulates output by comparing against internal 0.8V reference. |
| 3 PGOOD | Open-Drain Power-Good Flag | Asserts low when VOUT deviates >±2% from target; requires external 10–100 kΩ pull-up. |
| 4 COMP | Compensation Node | Connects RC network to stabilize control loop; supports ceramic, polymer, or electrolytic output caps. |
| 5 NC | No Connect | Internally unconnected; recommended to tie to AGND for noise immunity. |
| 6,7 PVIN | Power Switch Input | Dual pins for low-inductance connection to input bulk capacitor; share same internal node. |
| 8,9 SW | Switch Node | Connects to inductor; carries high di/dt PWM waveform; requires tight layout to minimize EMI. |
| 10,11 PGND | Power Ground | Return path for high-current switch paths; separate from AGND to avoid noise coupling. |
| 12 EN | Enable Input | 1.18V threshold with 66 mV hysteresis; supports precise input-voltage turn-on sequencing via resistor divider. |
| 13 VCC | Internal Sub-Regulator Output | 2.7V supply for gate drivers; bypass with 1 µF ceramic capacitor close to pin. |
| 14 AVIN | Analog Supply Input | Filtered input for internal bias; connect to VIN via RC filter (e.g., 10 Ω + 1 µF) to suppress noise. |
| 15 AGND | Analog Ground | Quiet reference for error amplifier and modulator; must be star-connected to PGND at single point. |
| 16 RT | Frequency Set | Resistor to ground sets oscillator frequency: 49.9 kΩ → 750 kHz, 249 kΩ → 260 kHz. |
| EP | Exposed Pad | Thermal and electrical connection to GND; mandatory for thermal performance and EMI reduction. |
Key Features
| Feature | Design Value |
|---|---|
| Nonlinear Slope Compensation | Parabolic ramp adapts to output voltage-ensures stable current-mode control across 0.8V–5.5V without manual tuning. |
| Pre-Biased Start-Up | Does not sink current at startup if VOUT > 0V-prevents damage to FPGA/ASIC outputs coupled via parasitic paths. |
| Diode Emulation Mode | Disables low-side FET when inductor current reaches zero-eliminates reverse current and improves light-load efficiency. |
| Integrated OVP + UVLO + Thermal Shutdown | Single-chip protection stack eliminates need for external supervisors; OVP trips at 108% VFB with 2% hysteresis. |
| Adjustable Soft-Start & Tracking | One pin (SS/TRK) supports both monotonic startup (via capacitor) and synchronized rail ramping (via external voltage). |
| HTSSOP-16 Exposed Pad | Enables 5A operation at ≤125°C junction without heatsink-reduces board area vs. QFN or SOIC alternatives. |
Applications
| FPGA Core Supply | DSP I/O Rail Regulation |
|---|---|
|
Use Scenario: Powers 1.2V core of Xilinx Artix-7 FPGA during configuration and active logic operation. IC Role / Device Role / Timing Role: Primary synchronous buck regulator providing tightly regulated, low-noise 1.2V at up to 5A with <1% load regulation. Use Value: Pre-biased start-up prevents back-driving of partially powered FPGA banks; PGOOD enables safe configuration sequencing. |
Use Scenario: Generates 3.3V I/O supply for TI C66x DSP with dynamic load steps up to 3A. IC Role / Device Role / Timing Role: Point-of-load regulator with fast transient response (<50 µs recovery) and diode emulation for standby efficiency. Use Value: Adjustable frequency (500 kHz) balances inductor size and efficiency; SS/TRK pin tracks 1.8V core rail for coordinated ramp. |
| Optical Transceiver Bias | Industrial PLC CPU Module |
|
Use Scenario: Supplies 2.5V analog bias to SFP+ laser driver ICs in telecom line cards. IC Role / Device Role / Timing Role: Low-noise, high-PSRR buck converter with minimized switching ripple on sensitive analog rails. Use Value: AVIN/AGND separation and COMP-based Type-II compensation reduce output noise below 10 mVpp at 500 kHz. |
Use Scenario: Delivers 1.8V core voltage to ARM Cortex-A9 processor in DIN-rail mounted PLC controller. IC Role / Device Role / Timing Role: Industrial-grade buck regulator supporting −40°C to +85°C ambient with AEC-Q100 Grade 1 qualification. Use Value: Integrated thermal shutdown (160°C) and wide-input range (2.95–5.5V) ensure reliability across unregulated 24V DC field supplies. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54560QPWPRQ1 | Wider input range (3.5–60V), lower max output current (5A), no pre-bias start-up, fixed 500 kHz frequency. | Better suited for 12V/24V industrial inputs; lacks SS/TRK tracking and soft-start flexibility. | Select when input exceeds 5.5V or automotive transients require >60V abs max rating. |
| MP2315GJ-Z | Smaller 8-pin TSOT23 package, 3A max output, fixed 500 kHz, no PGOOD or tracking pin, lower quiescent current (25 µA). | Targeted at space-constrained consumer apps; missing industrial features like thermal shutdown hysteresis and OVP. | Select for cost-sensitive, low-current (<3A), compact designs where sequencing and fault reporting are non-critical. |
Compared with TPS54560QPWPRQ1 and MP2315GJ-Z, LM20145MH/NOPB uniquely combines 5A capability, pre-biased start-up, dual-function SS/TRK, and AEC-Q100 Grade 1 qualification in a thermally optimized HTSSOP package-making it optimal for FPGA/DSP core rails requiring robust sequencing and reliability.
Availability
LM20145MH/NOPB is available at Aetrix Electronics and suitable for FPGA core supplies, DSP I/O regulation, optical transceiver biasing, and industrial PLC CPU modules requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LM20145MH/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC-DC conversion and automotive-grade reliability.
The LM20145MH/NOPB belongs to TI's PowerWise® synchronous buck regulator family, designed specifically for high-current, low-voltage point-of-load applications in FPGA, DSP, and ASIC systems where thermal performance, sequencing control, and industrial temperature operation are critical.
FAQ
What is the maximum continuous output current supported by the LM20145MH/NOPB?
The LM20145MH/NOPB delivers up to 5A of continuous output current under typical thermal conditions (θJA = 38°C/W, TA = 25°C) with proper PCB layout and exposed pad grounding. At elevated ambient temperatures or reduced airflow, derating applies-e.g., ~4.2A at 60°C ambient. Peak current limit is 7.4A (typ), but sustained operation above 5A risks thermal shutdown.
Does the LM20145MH/NOPB support start-up into a pre-biased output voltage?
Yes, the LM20145MH/NOPB supports pre-biased start-up: when VOUT > 0V at power-on, it will not sink current through the low-side FET until the internal soft-start ramp exceeds the FB pin voltage. This prevents reverse current flow and protects downstream FPGA or ASIC I/O structures from latch-up or damage due to parasitic coupling between power rails.
How is the switching frequency set on the LM20145MH/NOPB?
The LM20145MH/NOPB switching frequency is set by connecting an external resistor (RT) from Pin 16 (RT) to ground. Frequency ranges from 250 kHz (RT = 249 kΩ) to 750 kHz (RT = 49.9 kΩ), with typical values calculated using RT = 78 kΩ / fSW – 55 kΩ. No other components are required-no capacitors or additional biasing needed.
What is the purpose of the AVIN and AGND pins on the LM20145MH/NOPB?
The AVIN and AGND pins on the LM20145MH/NOPB provide a dedicated low-noise analog supply path for the error amplifier and modulation circuitry. AVIN must be filtered from VIN via an RC network (e.g., 10 Ω + 1 µF), and AGND must be star-connected to PGND at one point only-this isolation minimizes switching noise injection into the feedback loop and ensures stable regulation under dynamic load conditions.
Can the LM20145MH/NOPB be used in automotive applications?
Yes-the LM20145MH/NOPB is qualified to AEC-Q100 Temperature Grade 1 (−40°C to +125°C), making it suitable for under-hood and infotainment applications. It includes automotive-grade protections: thermal shutdown with 10°C hysteresis, robust UVLO (2.7V ±45 mV), and integrated OVP (108% VFB). However, system-level validation per ISO 16750 and EMC testing remains the responsibility of the end designer.
LM20145MH/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- PowerWise®
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.95V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 4.68V
- Current - Output:
- 5A
- Frequency - Switching:
- 260kHz ~ 750kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
LM20145MH/NOPB FAQ
1.How can I place an order for LM20145MH/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM20145MH/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM20145MH/NOPB reliable?
The price and inventory of LM20145MH/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM20145MH/NOPB is usually 5 days.
3.What payment methods are accepted for LM20145MH/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM20145MH/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM20145MH/NOPB?
LM20145MH/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM20145MH/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM20145MH/NOPB?
For technical support, including LM20145MH/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM20145MH/NOPB requirements.
6.How does Aetrix verify that LM20145MH/NOPB is sourced from the original manufacturer or authorized distributors?
All LM20145MH/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM20145MH/NOPB meets industry standards.
7.What is the process for return or replacement of LM20145MH/NOPB?
All LM20145MH/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM20145MH/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM20145MH/NOPB part is unused and in its original packaging.
Return procedure for LM20145MH/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LM20145MH/NOPB Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

