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Texas Instruments LM20333MH/NOPB
- Part No.:
- LM20333MH/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LM20333MH/NOPB.pdf
- Description:
- IC REG BUCK ADJ 3A 20HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:312
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Product details
Overview
LM20333MH/NOPB from Texas Instruments is a 36V, 3A synchronous buck regulator with current-mode control, integrated 130 mΩ high-side and 110 mΩ low-side MOSFETs, and frequency synchronization capability (250 kHz–1.5 MHz). It delivers up to 3A continuous output at adjustable voltages down to 0.8V with ±1.5% feedback accuracy, and is used in FPGA/DSP power rails requiring tight regulation and multi-rail sequencing.
For engineers reviewing the LM20333MH/NOPB datasheet, LM20333MH/NOPB pinout, LM20333MH/NOPB application, or LM20333MH/NOPB equivalent, key selection considerations include soft-start/tracking behavior, PGOOD timing (20 µs deglitch), thermal shutdown (170°C), peak current limit (5.2A), and HTSSOP-20 exposed-pad thermal performance (θJA = 27°C/W).
Technical Context
The LM20333MH/NOPB implements peak current-mode control with non-linear parabolic slope compensation-dynamically adjusted per output voltage-to ensure stability across duty cycles >50% without external ramp injection. Its error amplifier features 515 µmho transconductance, 7 MHz GBW, and supports two-component Type II/III compensation via COMP-to-AGND network.
It integrates precision enable (1.25V threshold, 50 mV hysteresis), programmable soft-start via SS/TRK pin (4.5 µA internal current source), and synchronous rectification enabling 94% peak efficiency. The SYNC pin accepts TTL/CMOS-compatible clocks (VIH = 2V, VIL = 0.8V) and defaults to ~200 kHz when floating.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V to 36V - supports wide industrial bus inputs including 12V, 24V, and 32V systems without pre-regulation. |
| Output Current | 3A continuous - sufficient for mid-power FPGA I/O banks or DSP core rails with margin for transient loads. |
| Feedback Accuracy | ±1.5% at TJ = –40°C to +125°C - ensures stable output under full temperature range without calibration. |
| Switching Frequency | 250 kHz to 1.5 MHz (SYNC-controlled); ~200 kHz (internal default) - enables inductor size reduction while maintaining EMI control. |
| Thermal Shutdown | 170°C with 20°C hysteresis - provides robust overtemperature protection with automatic restart at ~150°C. |
| PGOOD Delay | 20 µs - filters noise on power-good assertion/deassertion for reliable system sequencing logic. |
| Quiescent Current | 3 mA typical at VIN = 12V - balances light-load efficiency and fast wake-up response in always-on subsystems. |
Pinout & Package
The LM20333MH/NOPB is housed in a thermally enhanced 20-pin HTSSOP package with exposed pad (PWP0020A), requiring PCB ground plane connection for optimal θJA = 27°C/W performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 SS/TRK | Soft-start/Tracking control | 4.5 µA internal current source sets startup ramp; also accepts external voltage ramp for rail tracking in multi-supply systems. |
| 2 FB | Feedback input | Connects to resistor divider; referenced to precise 0.8V internal bandgap - determines regulated output voltage. |
| 3 PGOOD | Open-drain power-good indicator | Asserts low when VOUT deviates >5% from target; requires external 10–100 kΩ pull-up for logic-level interface. |
| 4 COMP | Error amplifier output | Interface point for external Type II/III compensation network between COMP and AGND. |
| 5,6,15,16 VIN | Main input supply | High-current path for 4.5–36V input; multiple pins reduce trace resistance and improve thermal distribution. |
| 7,8,13,14 SW | Switch node | Drain of high-side NMOS and source of low-side NMOS - connects directly to inductor and bootstrap capacitor. |
| 9,10,11 GND | Power ground | Return path for high-current switching paths; electrically isolated from AGND in internal layout. |
| 12 AGND | Analog ground | Reference for error amplifier, comparators, and bias circuits - must be star-connected to minimize noise coupling. |
| 17 BOOT | Bootstrap capacitor connection | Supplies gate drive voltage for high-side FET; requires ceramic capacitor (typically 0.1 µF) from BOOT to SW. |
| 18 VCC | Internal LDO output | Regulated ~5.5V supply for gate drivers and control logic; outputs only - no external load allowed. |
| 19 EN | Enable/UVLO input | 1.25V enable threshold with 50 mV hysteresis; internal 2 µA pull-up enables default operation if left open. |
| 20 SYNC | Frequency sync input | Accepts external clock (250 kHz–1.5 MHz); logic high >2V, low <0.8V - disables internal oscillator when active. |
| EP | Exposed pad | Internally connected to GND; must be soldered to PCB ground plane for thermal and electrical integrity. |
Key Features
| Feature | Design Value |
|---|---|
| Non-linear slope compensation | Parabolic ramp adapts to output voltage - eliminates need for external compensation components across 0.8V–12V VOUT range. |
| Pre-biased startup support | Does not sink current during startup if output is pre-charged - prevents damage to downstream ASIC/FPGA parasitic paths. |
| Programmable soft-start | External capacitor on SS/TRK pin sets monotonic rise time; avoids inrush-induced input droop in shared bus systems. |
| Integrated OVP/UVP/OTP protection | Auto-recoverable fault handling: OVP triggers low-side FET conduction; thermal shutdown resets soft-start at 150°C. |
| Current-limit foldback management | Gradual PWM skipping during overload - maintains regulation during brief transients while limiting stress during hard shorts. |
Applications
| Point-of-Load FPGA Core Supply | Automotive Infotainment DSP Rail |
|---|---|
Use Scenario: Powers Xilinx Artix-7 FPGA core (VCCINT) from 12V vehicle battery with strict 1.0V ±3% tolerance and <100 mV transient droop. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering 3A continuous current; uses PGOOD for FPGA configuration lock and SS/TRK for voltage ramp alignment with auxiliary I/O rail. Use Value: 94% peak efficiency reduces thermal load in sealed enclosures; 5.2A current limit accommodates FPGA configuration surges without foldback. | Use Scenario: Supplies TI C66x DSP in head-unit design where input varies from 6V (cold crank) to 16V (load dump), requiring UVLO hysteresis and robust EMI control. IC Role / Device Role / Timing Role: Main DC-DC converter with EN pin tied to microcontroller GPIO for controlled power-up; SYNC pin locked to system clock to avoid beat frequencies. Use Value: 4.5V–36V input range covers full automotive transient profile; 350 mV UVLO hysteresis prevents oscillation during cranking events. |
| Industrial PLC I/O Module Supply | Communications Baseband Processor Rail |
Use Scenario: Generates 3.3V for isolated digital I/O banks in DIN-rail mounted PLC, operating continuously at 65°C ambient with no forced airflow. IC Role / Device Role / Timing Role: High-efficiency buck stage with exposed-pad HTSSOP thermally coupled to heatsink; uses PGOOD to signal ready state to host controller. Use Value: Use Value: θJA = 27°C/W enables 3A operation at 65°C ambient without derating; thermal shutdown with 20°C hysteresis prevents cycling in overheated enclosures. | Use Scenario: Provides 1.2V core supply for LTE baseband processor with dynamic voltage scaling and rapid load steps up to 2A/µs. IC Role / Device Role / Timing Role: Fast-transient buck regulator using ceramic output capacitors and optimized COMP network; tracks higher-voltage analog rail via SS/TRK pin. Use Value: Peak current-mode control with 7 MHz GBW error amplifier achieves <50 µs recovery from 80% load step; pre-bias startup avoids brownout during processor warm reset. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM2596S-ADJ | 3A, 40V max input, fixed 150 kHz frequency, no SYNC or PGOOD; larger dropout due to diode rectification. | Lacks soft-start, tracking, and precision enable - unsuitable for multi-rail sequencing or pre-biased loads. | Choose only for cost-sensitive, non-critical 12V-to-5V/3.3V conversion where efficiency >90% is not required. |
| TPS54332DR | 3A, 36V input, 100 kHz–2.5 MHz SYNC range, integrated BOOT diode, but no exposed pad or PGOOD. | Higher minimum frequency limit (100 kHz vs. 250 kHz) limits low-noise operation; lacks rail-tracking capability. | Select when board space is constrained and BOOT diode integration outweighs need for PGOOD monitoring. |
Compared with LM2596S-ADJ and TPS54332DR, the LM20333MH/NOPB uniquely combines PGOOD signaling, SS/TRK-based rail tracking, and non-linear slope compensation - making it the only option among the three qualified for FPGA core supplies requiring monotonic startup and multi-rail coordination.
Availability
LM20333MH/NOPB is available at Aetrix Electronics and suitable for industrial PLCs, automotive infotainment systems, FPGA point-of-load regulation, and communications baseband processor rails requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance.
Supply support for LM20333MH/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-reliability power conversion solutions.
The LM20333MH/NOPB belongs to TI's high-voltage synchronous buck regulator product line, engineered for demanding industrial, automotive, and communications applications where input voltage range, thermal robustness, and system-level sequencing are critical.
FAQ
What is the recommended minimum output capacitance for stable operation of the LM20333MH/NOPB?
The LM20333MH/NOPB requires sufficient output capacitance to maintain loop stability and limit voltage ripple. For a 3.3V/3A design at 750 kHz, TI recommends ≥22 µF ceramic capacitance with low ESR (<5 mΩ). Total COUT must provide adequate transient response - equation (4) in the datasheet shows droop depends on COUT, RESR, L, and load step. Using multiple parallel 10 µF X7R 0805 ceramics meets both stability and EMI goals for most applications. The LM20333MH/NOPB does not require specific ESR zeroing like older voltage-mode controllers.
Can the LM20333MH/NOPB safely start up into a pre-biased output voltage?
Yes, the LM20333MH/NOPB supports pre-biased startup: when the output is already charged above 0V at enable, the device will not sink current through the low-side FET until the soft-start ramp exceeds the FB pin voltage. This prevents reverse current flow that could damage downstream FPGAs or ASICs with parasitic conduction paths. The behavior is confirmed in the datasheet Figure 21 and Operation Description section. No external circuitry is needed - the LM20333MH/NOPB handles this inherently.
How does the non-linear slope compensation in the LM20333MH/NOPB improve stability compared to traditional linear compensation?
The LM20333MH/NOPB uses a parabolic (non-linear) slope compensation ramp that increases with higher output voltages - unlike fixed linear ramps which over-compensate at low VOUT and under-compensate at high VOUT. This ensures optimal sub-harmonic oscillation suppression across the full 0.8V–12V output range without manual tuning. As a result, the same two-component compensation network remains stable for all VOUT settings, reducing design iterations. This feature is explicitly detailed in the Operation Description section of the LM20333MH/NOPB datasheet.
What is the maximum allowable voltage on the SYNC pin of the LM20333MH/NOPB, and what happens if it's left unconnected?
The SYNC pin of the LM20333MH/NOPB accepts logic-high signals up to 5.5V (absolute max 6V) and logic-low down to 0V. If left unconnected (floating), the internal weak pull-down causes the device to operate at its default free-running frequency of approximately 200 kHz, as specified in the Electrical Characteristics table (FOSC = 160–240 kHz). TI recommends tying SYNC to GND if synchronization is unused - this avoids noise coupling and ensures deterministic startup behavior. The LM20333MH/NOPB will not malfunction if SYNC floats, but EMI performance may vary.
Does the LM20333MH/NOPB require an external bootstrap diode, or is it integrated?
The LM20333MH/NOPB integrates a bootstrap diode between VCC and BOOT - no external diode is required. An external ceramic capacitor (typically 0.1 µF) must be placed from BOOT to SW to form the bootstrap tank. The datasheet specifies VF-BOOT = 0.9–1.1V at –100 mA and IBOOT leakage <10 nA at 4V, confirming internal diode functionality. Adding an external diode would disrupt the internal charge path and is explicitly discouraged in the Design Guide. All reference designs for the LM20333MH/NOPB omit external diodes.
LM20333MH/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 32V
- Current - Output:
- 3A
- Frequency - Switching:
- 200kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-HTSSOP
LM20333MH/NOPB FAQ
1.How can I place an order for LM20333MH/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM20333MH/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM20333MH/NOPB reliable?
The price and inventory of LM20333MH/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM20333MH/NOPB is usually 5 days.
3.What payment methods are accepted for LM20333MH/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM20333MH/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM20333MH/NOPB?
LM20333MH/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM20333MH/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM20333MH/NOPB?
For technical support, including LM20333MH/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM20333MH/NOPB requirements.
6.How does Aetrix verify that LM20333MH/NOPB is sourced from the original manufacturer or authorized distributors?
All LM20333MH/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM20333MH/NOPB meets industry standards.
7.What is the process for return or replacement of LM20333MH/NOPB?
All LM20333MH/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM20333MH/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM20333MH/NOPB part is unused and in its original packaging.
Return procedure for LM20333MH/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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