Texas Instruments LM21305SQX/NOPB
- Part No.:
- LM21305SQX/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LM21305SQX/NOPB.pdf
- Description:
- IC REG BUCK ADJ 5A 28WQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM21305SQX/NOPB from Texas Instruments is a monolithic synchronous buck DC-DC converter with integrated high-side (44 mΩ) and low-side (22 mΩ) MOSFETs, supporting 3 V to 18 V input and delivering up to 5 A output current. It features adjustable switching frequency (300 kHz–1.5 MHz), 0.598 V precision feedback reference, and diode emulation mode for light-load efficiency-used in FPGA core supplies and telecom POL modules.
For engineers reviewing the LM21305SQX/NOPB datasheet, LM21305SQX/NOPB pinout, LM21305SQX/NOPB application, or LM21305SQX/NOPB equivalent, key selection considerations include minimum on-time (70 ns), thermal performance in WQFN-28 (θJA = 36.9°C/W), PGOOD status signaling, and external frequency synchronization capability via FREQ pin.
Technical Context
The LM21305SQX/NOPB implements peak current-mode control with adaptive slope compensation scaled to switching frequency, enabling stable operation across 0.598 V–18 V output ranges and duty cycles up to 95%. Its internal architecture integrates dual LDOs (2.5 V and 5.0 V bias rails), cycle-by-cycle overcurrent protection, and thermal shutdown with 10°C hysteresis.
It supports monotonic soft-start into pre-biased loads, uses internal boot diodes and adaptive dead-time control to prevent shoot-through, and delivers ultra-fast transient response via high-bandwidth error amplifier (GM = 2400 µS, AVOL = 65 dB) and programmable COMP network.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3 V to 18 V - supports direct interface to 3.3 V, 5 V, and 12 V intermediate bus rails. |
| Output Current | 5 A continuous - enables single-chip power delivery for DSP/FPGA core rails without external MOSFETs. |
| Feedback Reference | 0.598 V ±1% - allows precise low-VOUT regulation down to sub-1 V with minimal divider error. |
| Switching Frequency | 300 kHz to 1.5 MHz - adjustable via resistor or external sync clock; enables compact magnetics and EMI optimization. |
| Min On/Off Time | TON-MIN = 70 ns, TOFF-MIN = 50 ns - supports high duty-cycle operation at low VOUT (e.g., 0.8 V from 3.3 V input). |
| Quiescent Current | 1–4.1 µA in shutdown - preserves battery life in always-on systems with enable-controlled sequencing. |
| Thermal Resistance | θJA = 36.9°C/W (WQFN-28) - requires ≥4 thermal vias under exposed pad for 125°C junction limit at 5 A load. |
Pinout & Package
LM21305SQX/NOPB is housed in a thermally enhanced 5 mm × 5 mm WQFN-28 package with 0.5-mm pitch and exposed thermal pad (PAD), requiring connection to PGND via ≥4 thermal vias for optimal thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVIN (1,2,27,28) | Power Input | Main input rail connection for high-side/low-side MOSFETs; must be decoupled with ≥10 µF ceramic near pins. |
| SW (3–6) | Switch Node | Drives external inductor; voltage swings between PVIN and PGND; layout critical for EMI and efficiency. |
| PGND (7–10) | Power Ground | Low-impedance return path for MOSFET currents; separate from AGND to avoid noise coupling. |
| AGND (14,17–20,24) | Analog Ground | Reference for FB, COMP, FREQ, and internal LDOs; must be star-connected to minimize offset errors. |
| FB (13) | Voltage Feedback | Connects to output via resistor divider; 0.598 V reference sets VOUT = 0.598 × (1 + R1/R2). |
| COMP (11) | Error Amplifier Output | External RC network here sets loop crossover and phase margin; determines transient response speed. |
| FREQ (16) | Frequency Control | Resistor-to-AGND sets oscillator frequency; AC-coupled external clock synchronizes to 300 kHz–1.5 MHz. |
| EN (15) | Enable Input | Logic-level input with 1.2 V threshold and 200 mV hysteresis; supports programmable UVLO using external divider. |
| PGOOD (12) | Power Good Flag | Open-drain output asserts after VOUT reaches 93% of target; 16 µs deglitch prevents false fault triggers. |
| CBOOT (26) | Bootstrap Supply | Connects 100 nF capacitor to SW; powers high-side gate driver; requires low-ESR ceramic for reliable startup. |
| 2V5 (21), 5V0 (25) | Bias LDO Outputs | Internal 2.5 V / 5.0 V regulators; bypass with 100 nF and 1 µF ceramics respectively; not for external loading. |
| AVIN (22,23) | Analog Power Input | Supplies internal LDOs; can tie to PVIN via RC filter or use separate clean rail to reduce noise sensitivity. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Power Stage | Monolithic 44 mΩ/22 mΩ MOSFET pair eliminates external switch losses and layout complexity for 5 A POL designs. |
| Diode Emulation Mode | Enables DCM operation below ~25% load, eliminating reverse inductor current and boosting light-load efficiency by >10%. |
| Adaptive Slope Compensation | Automatically scales with switching frequency to maintain stability at >50% duty cycle without manual tuning. |
| Pre-Biased Soft-Start | Monotonic ramp from 0% to 100% VOUT even when output is pre-charged; prevents reverse current into downstream circuits. |
| Comprehensive Fault Protection | Includes cycle-by-cycle OCP (7 A HS / 8 A LS), output OVP (109.5% trip), and thermal shutdown (160°C with 10°C hysteresis). |
Applications
| Telecom Point-of-Load | FPGA Core Supply |
|---|---|
Use Scenario: Regulating 12 V backplane to 0.85 V/3 A for Xilinx Kintex-7 FPGA core rail in 4G/LTE base station card. IC Role / Device Role / Timing Role: Primary synchronous buck regulator with fast transient response to handle dynamic logic switching currents. Use Value: 70 ns minimum on-time enables stable 0.85 V output from 12 V input; PGOOD enables safe power-rail sequencing with DDR memory controller. |
Use Scenario: Generating 1.2 V/4 A for Intel Arria 10 FPGA I/O bank supply in industrial PLC module. IC Role / Device Role / Timing Role: Adjustable-frequency buck converter synchronized to system clock to avoid beat-frequency interference. Use Value: External FREQ sync eliminates switching noise coupling into sensitive analog sensor interfaces on same PCB. |
| Server VR12-Compatible POL | Embedded Computing Power |
Use Scenario: Providing 1.8 V/5 A for ARM Cortex-A72 SoC in edge AI inference server blade. IC Role / Device Role / Timing Role: High-density POL regulator with integrated LDOs eliminating need for auxiliary bias supplies. Use Value: Internal 2.5 V and 5.0 V LDOs power internal circuitry and simplify BOM; 5 mm × 5 mm WQFN fits tight board space. |
Use Scenario: Converting 5 V USB-C PD input to 3.3 V/3 A for Raspberry Pi Compute Module 4 carrier board. IC Role / Device Role / Timing Role: Wide-input buck converter supporting variable upstream source while maintaining regulated output. Use Value: 3 V–18 V input range accommodates 5 V ±10% USB-C PD tolerance and brownout conditions without dropout. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2315DJ-LF-Z | 4.5 V–28 V input, 3 A max, fixed 500 kHz fSW, no FREQ sync, no PGOOD, smaller 3 mm × 3 mm QFN. | Lacks frequency synchronization and power-good signaling; unsuitable for multi-rail sequenced systems. | Select when cost-sensitive, lower-current (≤3 A), and timing-critical sync is unnecessary. |
| TPS54560QDGQRQ1 | 3.5 V–60 V input, 5 A, adjustable 100 kHz–2.5 MHz fSW, integrated BOOT diode, automotive-grade (-40°C to 125°C). | Higher VIN range and AEC-Q100 qualification; larger 10-pin MSOP-PowerPAD package increases footprint. | Select for automotive or wide-input industrial applications where extended temperature and reliability are mandatory. |
Compared with MP2315DJ-LF-Z and TPS54560QDGQRQ1, LM21305SQX/NOPB uniquely balances 5 A capability, 300 kHz–1.5 MHz programmability, PGOOD signaling, and compact WQFN-28 packaging-making it optimal for space-constrained telecom and computing POL designs requiring precise sequencing and EMI control.
Availability
LM21305SQX/NOPB is available at Aetrix Electronics and suitable for telecom infrastructure, FPGA power delivery, and embedded computing applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LM21305SQX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC-DC conversion.
The LM21305SQX/NOPB belongs to TI's high-density synchronous buck converter product line, designed specifically for point-of-load regulation in space-constrained telecom, computing, and industrial systems demanding high efficiency across full load range.
FAQ
What is the minimum output voltage supported by the LM21305SQX/NOPB?
The LM21305SQX/NOPB supports output voltages as low as 0.598 V, set by its internal precision feedback reference. This enables direct regulation for modern low-voltage FPGA and ASIC cores without external reference components. The 70 ns minimum on-time ensures stable operation even at very low duty cycles required for sub-1 V outputs from common input rails like 3.3 V or 5 V.
Does the LM21305SQX/NOPB require external bootstrap diodes?
No, the LM21305SQX/NOPB integrates bootstrap diodes internally. A 100 nF ceramic capacitor must be placed between CBOOT and SW pins to provide gate drive voltage for the high-side MOSFET. External diodes are unnecessary and would degrade efficiency due to forward voltage drop and added parasitics.
How does the LM21305SQX/NOPB handle pre-biased outputs during startup?
The LM21305SQX/NOPB implements monotonic soft-start that safely ramps output voltage from 0% to 100% even when the output is pre-charged. This prevents reverse current flow into the output capacitor or downstream circuitry. Startup time from EN assertion to 90% VFB is 1.41–4.15 ms, confirmed in Figure 15 of the datasheet.
Can the LM21305SQX/NOPB synchronize to an external clock outside its nominal frequency range?
No-the LM21305SQX/NOPB only accepts external synchronization signals within ±10% to +50% of the free-running frequency set by the RFRQ resistor. For example, if RFRQ sets 500 kHz, the external clock must be 450 kHz–750 kHz. Clocks outside this window cause fallback to the RFRQ-determined frequency after timeout.
What thermal design practices are required for full 5 A operation of the LM21305SQX/NOPB?
For continuous 5 A operation, the LM21305SQX/NOPB requires ≥4 thermal vias (0.3 mm diameter) connecting the exposed PAD directly to an internal PGND plane, plus ≥2 cm² of 2-oz copper on inner layers. With this layout, θJA drops from 36.9°C/W to ≤25°C/W, keeping junction temperature below 125°C at 85°C ambient per TI's layout guidelines in Section 11.2.
LM21305SQX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.598V
- Voltage - Output (Max):
- 18V
- Current - Output:
- 5A
- Frequency - Switching:
- 300kHz ~ 1.5MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-WQFN (5x5)
LM21305SQX/NOPB FAQ
1.How can I place an order for LM21305SQX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM21305SQX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM21305SQX/NOPB reliable?
The price and inventory of LM21305SQX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM21305SQX/NOPB is usually 5 days.
3.What payment methods are accepted for LM21305SQX/NOPB?
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4.How is shipping managed for LM21305SQX/NOPB?
LM21305SQX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM21305SQX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM21305SQX/NOPB?
For technical support, including LM21305SQX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM21305SQX/NOPB requirements.
6.How does Aetrix verify that LM21305SQX/NOPB is sourced from the original manufacturer or authorized distributors?
All LM21305SQX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM21305SQX/NOPB meets industry standards.
7.What is the process for return or replacement of LM21305SQX/NOPB?
All LM21305SQX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM21305SQX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM21305SQX/NOPB part is unused and in its original packaging.
Return procedure for LM21305SQX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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