Texas Instruments LM25115SDX/NOPB
- Part No.:
- LM25115SDX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Power Supply Controllers, Monitors
- Package:
- 16-WFDFN Exposed Pad
- Datasheet:
-
LM25115SDX/NOPB.pdf
- Description:
- IC CTLR SSPR 42V LDO REG 16WSON
- Quantity:
- Payment:

- Shipping:

Inventory:1,431
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Product details
Overview
LM25115SDX/NOPB from Texas Instruments is a secondary-side post-regulator (SSPR) controller for isolated DC/DC converters, implementing leading-edge PWM to regulate auxiliary outputs using the main converter's phase signal. It features voltage-mode control with current injection, 4.5V–30V VBIAS input, 0.75V–13.5V output range, and integrated 7V LDO bias regulator. Used in multi-output telecom and industrial power supplies where auxiliary rail regulation must track main output stability without optical feedback.
For engineers reviewing the LM25115SDX/NOPB datasheet, LM25115SDX/NOPB pinout, LM25115SDX/NOPB application, or LM25115SDX/NOPB equivalent, key selection criteria include SSPR synchronization capability, adaptive dead-time control, wide common-mode current sense range (0V–13.5V), and compatibility with both voltage- and current-mode main controllers.
Technical Context
The LM25115SDX/NOPB operates in two modes: SSPR mode (synchronized to main channel phase signal via SYNC pin) and free-run mode (using internal oscillator for DC-input applications). Its leading-edge PWM architecture avoids instability when paired with peak-current-mode main controllers by shifting auxiliary load current to the trailing portion of the phase pulse.
It integrates a 16× current sense amplifier (CS–VOUT differential input), 4 MHz error amplifier, programmable RAMP slope (via external capacitor), and adaptive gate driver dead-time control. The 7V VCC LDO powers internal logic and drivers, while CO/COMP interconnection enables seamless current-limit override of the voltage loop.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VBIAS Range | 4.5V to 30V - supports wide-input isolated supplies; minimum 3V above regulated VOUT required for stable current sensing. |
| Output Voltage Range | 0.75V to 13.5V - set via FB resistor divider; reference voltage is 0.75V ±13 mV at FB pin. |
| Current Sense Threshold | 45 mV (typical) - triggers current limit when CS–VOUT differential exceeds this; foldback reduces threshold to 38 mV at VOUT = 0V. |
| Gate Driver Peak Current | 2.5 A sink / 2 A source - drives high- and low-side NMOS switches directly; HO/LO rise/fall times ≤15 ns (1 nF load). |
| Error Amplifier GBW | 4 MHz - enables fast transient response for auxiliary rail regulation; open-loop gain ≥60 dB. |
| RAMP Amplitude | 1.0 V to 1.75 V - externally set via CRAMP; determines PWM duty resolution and line feed-forward fidelity. |
| Thermal Shutdown | 150°C to 165°C - protects against sustained overload; hysteresis of 25°C prevents cycling. |
Pinout & Package
LM25115SDX/NOPB is housed in a thermally enhanced 16-pin WSON package (NHQ0016A), featuring an exposed pad bonded to system ground for low thermal impedance (θJA = 32°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Current sense amplifier positive input | Connects to high side of sense resistor; senses inductor current with 16× gain and 1.27V offset. |
| VOUT | Current sense amplifier negative input | Connects to low side of sense resistor and output node; supports 0V–13.5V common-mode range. |
| AGND | Analog ground reference | Must be tied directly to PGND to minimize noise coupling into error amplifier and current sense paths. |
| CO | Current limit amplifier output | Open-drain sink; connected to COMP to override voltage loop during overcurrent events. |
| COMP | Error amplifier output / PWM comparator input | Internal 300 µA pull-up; sets CRMIX level; interfaced with CO for current limiting and RAMP for PWM threshold. |
| FB | Error amplifier inverting input | Connected to output divider; reference is internally tied to SS pin (0.75V target); sets final regulated voltage. |
| SS | Soft-start control | Charged by internal 60 kΩ divider; external capacitor sets exponential ramp time constant (t = 4.6 × 60kΩ × CSS). |
| RAMP | PWM ramp generator node | External capacitor sets sawtooth amplitude (1–1.75 V); charge current proportional to SYNC input current (×3). |
| SYNC | Synchronization input | Low-impedance (2.5 kΩ) current input; detects main converter phase signal edges to synchronize RAMP and gate drivers. |
| PGND | Power ground return | High-current return path for LO, HS, and bootstrap circuitry; must be shorted to AGND at single point. |
| LO | Low-side gate driver output | Drives NMOS source-to-ground switch; 2.5 A sink capability ensures fast turn-off under heavy load. |
| VCC | LDO bias regulator output | Nominally 7 V (6.65–7.15 V); powers internal logic/drivers; requires local 0.1–10 µF bypass capacitor. |
| HS | High-side MOSFET source connection | Return node for bootstrap capacitor; ties to source of high-side NMOS; referenced to HB for gate drive. |
| HO | High-side gate driver output | Drives NMOS gate referenced to HS; 2 A source/2.5 A sink ensures robust switching at up to 200 kHz. |
| HB | Bootstrap rail supply | Supplies gate drive voltage for HO; connected to cathode of bootstrap diode and + terminal of bootstrap capacitor (≥0.047 µF). |
| VBIAS | Bias regulator input | Primary supply input (4.5–30 V); powers internal LDO and current sense amplifier; UVLO active below 4.5 V. |
Key Features
| Feature | Design Value |
|---|---|
| Secondary-side post regulation (SSPR) | Eliminates optocoupler and TL431 in isolated multi-output designs by synchronizing auxiliary regulation to main transformer phase signal. |
| Leading-edge PWM modulation | Prevents instability with peak-current-mode main controllers by applying auxiliary load during trailing edge of phase pulse. |
| Voltage-mode control with current injection | Uses sensed inductor current to modulate PWM threshold (CV), improving loop bandwidth and eliminating need for lead compensation network. |
| Adaptive gate driver dead-time control | Automatically adjusts HO/LO overlap timing to prevent shoot-through across varying load and temperature conditions. |
| Wide common-mode current sense range | Operates from 0 V to 13.5 V at CS/VOUT pins, enabling direct sensing on low-side or high-side configurations without level-shifting. |
| Programmable soft-start and RAMP slope | SS capacitor sets startup slew rate; RAMP capacitor and SYNC current jointly define PWM resolution and line feed-forward accuracy. |
Applications
| Telecom Power Supply | Industrial PLC Power Module |
|---|---|
|
Use Scenario: Isolated 48V input DC/DC converter delivering 3.3V main output and 2.5V auxiliary rail for FPGA I/O banks and monitoring circuitry. IC Role / Device Role / Timing Role: LM25115SDX/NOPB acts as secondary-side post-regulator, synchronizing its PWM to the main converter's transformer secondary waveform to tightly regulate the 2.5V rail without optocoupler feedback. Use Value: Achieves ±1% auxiliary output regulation across line and load, eliminates optocoupler aging drift, and reduces BOM count by 3 components per rail. |
Use Scenario: DIN-rail mounted 24V input power module generating 5V for CPU, 3.3V for communication interface, and 12V for analog sensors. IC Role / Device Role / Timing Role: LM25115SDX/NOPB regulates the 12V auxiliary output using leading-edge modulation synchronized to the 5V main converter's phase signal, maintaining tight cross-regulation. Use Value: Enables <100 mV cross-regulation deviation between rails under dynamic load steps, improves thermal margin by avoiding discrete LDOs, and supports EN 61000-4-5 surge immunity via isolated topology. |
| Medical Imaging Power System | Server PSU Auxiliary Rail |
|
Use Scenario: High-reliability 28V input isolated converter powering CCD sensor bias (±15V) and digital logic (1.8V, 3.3V) in portable ultrasound units. IC Role / Device Role / Timing Role: LM25115SDX/NOPB implements SSPR for the 3.3V rail, deriving timing and regulation directly from the main 1.8V converter's secondary waveform. Use Value: Reduces EMI by eliminating high-frequency optocoupler signals, meets IEC 60601-1 creepage requirements via isolation barrier, and achieves <20 µs transient recovery for sensor bias stability. |
Use Scenario: 12V intermediate bus architecture with primary LLC stage and multiple synchronous buck post-regulators for memory, GPU, and management ICs. IC Role / Device Role / Timing Role: LM25115SDX/NOPB controls the 5V standby rail using free-run mode (DC input), while other rails use SSPR mode synchronized to the 12V main output phase signal. Use Value: Supports dual-mode operation (SSPR/free-run) in same design, enables precise sequencing via SS pin, and maintains <±2% output accuracy over –40°C to +125°C junction temperature. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar secondary-side post-regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5115MTCX/NOPB | Same SSPR architecture but TSSOP-16 package (θJA = 125°C/W); lacks WSON thermal performance and has lower gate drive current (1.5 A sink). | Preferred for prototyping or low-power auxiliary rails (<5 A) where thermal constraints are relaxed and PCB space allows larger footprint. | Select LM5115MTCX/NOPB only if WSON thermal limitations cannot be met and layout permits TSSOP; verify RAMP/COMP loop stability with reduced drive strength. |
| UCC28950PW | Phase-shifted full-bridge controller with integrated SSPR capability; includes digital programmability, higher integration (gate drivers, protection), and 400 kHz max frequency. | Targets high-efficiency, high-power (>200 W) isolated supplies where primary-side control and auxiliary regulation are co-located. | Choose UCC28950PW when redesigning primary controller and requiring digital configuration, soft-start sequencing, or >150 kHz operation; not drop-in compatible with LM25115SDX/NOPB. |
Compared with LM5115MTCX/NOPB, LM25115SDX/NOPB delivers superior thermal performance and higher gate drive strength for compact, high-density auxiliary regulators; versus UCC28950PW, it offers simpler analog implementation and lower cost for dedicated SSPR-only functions without primary control integration.
Availability
LM25115SDX/NOPB is available at Aetrix Electronics and suitable for telecom power supplies, industrial PLC modules, medical imaging systems, and server auxiliary rails requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for LM25115SDX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability power conversion ICs.
The LM25115SDX/NOPB belongs to TI's isolated power controller product line, designed specifically to simplify multi-output DC/DC architectures by replacing optocoupler-based feedback with synchronized secondary-side regulation.
FAQ
What is the primary function of the LM25115SDX/NOPB in an isolated power supply?
The LM25115SDX/NOPB serves as a secondary-side post-regulator (SSPR) controller that uses the main converter's transformer secondary phase signal to precisely regulate an auxiliary output voltage-eliminating the need for optocouplers and TL431 references. It implements leading-edge PWM modulation synchronized to the phase signal, enabling tight cross-regulation and high efficiency in multi-rail isolated topologies. This function is explicitly defined in the SNVS418A datasheet Section 1 and Figure 1.
Can the LM25115SDX/NOPB operate without a main converter phase signal?
Yes, the LM25115SDX/NOPB supports free-run mode when powered from a DC input: in this configuration, the SYNC pin is used to set an internal oscillator frequency (via current injection), allowing standalone buck regulation independent of any external phase signal. The datasheet specifies a recommended SYNC current range of 50–150 µA for stable free-run operation, and the RAMP capacitor value is adjusted accordingly to maintain proper PWM resolution.
How does the current sense architecture of the LM25115SDX/NOPB differ from standard current-mode controllers?
The LM25115SDX/NOPB employs a voltage-mode controller enhanced with current injection: its 16× current sense amplifier (CS–VOUT) generates a CV reference signal offset by 1.27V, which directly modulates the PWM comparator threshold. This differs from traditional current-mode control by preserving voltage-mode stability while adding current-derived feed-forward-eliminating the need for external lead compensation networks and improving transient response. This architecture is detailed in Figures 15 and 16 of the SNVS418A datasheet.
What is the role of the CO pin in the LM25115SDX/NOPB current limiting scheme?
The CO pin is the open-drain output of the current limit amplifier. During overcurrent events, when the CS–VOUT differential exceeds 45 mV, the CO pin pulls down the COMP node-overriding the error amplifier's output and reducing the CRMIX voltage below the CV threshold to inhibit PWM pulses. This provides cycle-by-cycle current limiting with foldback behavior at low VOUT. The datasheet confirms CO-to-COMP connection as the default configuration for active current protection.
Is the LM25115SDX/NOPB compatible with both voltage-mode and current-mode main converters?
Yes, the LM25115SDX/NOPB is explicitly designed for compatibility with either voltage-mode or peak-current-mode main controllers due to its leading-edge PWM architecture. Unlike trailing-edge modulators, leading-edge modulation applies auxiliary load during the latter portion of the main phase pulse-avoiding destabilizing negative current steps in peak-current-mode systems. This interoperability is a core feature highlighted in the "DESCRIPTION" section and Figure 14 of the SNVS418A datasheet.
LM25115SDX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Applications:
- Secondary-Side Controller
- Voltage - Input:
- 0V ~ 42V
- Voltage - Supply:
- 4.5V ~ 30V
- Current - Supply:
- 4 mA
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-WSON (5x5)
LM25115SDX/NOPB FAQ
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6.How does Aetrix verify that LM25115SDX/NOPB is sourced from the original manufacturer or authorized distributors?
All LM25115SDX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM25115SDX/NOPB meets industry standards.
7.What is the process for return or replacement of LM25115SDX/NOPB?
All LM25115SDX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM25115SDX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM25115SDX/NOPB part is unused and in its original packaging.
Return procedure for LM25115SDX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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