Texas Instruments LM2687LDX/NOPB
- Part No.:
- LM2687LDX/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
LM2687LDX/NOPB.pdf
- Description:
- IC REG CHARG PUMP ADJ 10MA 8WSON
- Quantity:
- Payment:

- Shipping:

Inventory:4,706
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Product details
Overview
LM2687LDX/NOPB from Texas Instruments is a low-noise, regulated switched-capacitor voltage inverter IC that converts +2.7V to +5.5V input into an adjustable negative output (−1.5V to −5.2V) with 1 mV typical ripple, 100 kHz switching frequency, and 91% typical charge-pump efficiency at 10 mA - used for GaAsFET power amplifier biasing in cellular handsets.
For engineers reviewing the LM2687LDX/NOPB datasheet, LM2687LDX/NOPB pinout, LM2687LDX/NOPB application, or LM2687LDX/NOPB equivalent, key selection considerations include regulated negative output adjustability via external resistor divider, shutdown quiescent current of 0.05 µA, MSOP-8/LLP-8 package compatibility, and PSRR-enabled noise suppression for RF-sensitive bias rails.
Technical Context
The LM2687LDX/NOPB integrates a fixed-frequency (100 kHz typ.) switched-capacitor inverter stage followed by a low-dropout linear regulator - enabling ripple reduction via high PSRR and precise output regulation independent of load or input variation. Its feedback architecture requires external resistors between VOUT, VFB, and VADJ (0 V to VIN) to set output voltage.
It operates with four external capacitors (C1–C3 + bypass), where C1/C2 define charge-pump output resistance and C3 filters final regulated output. The DAP (Die Attach Pad) in the LLP-8 package must be connected to VNEG for thermal and electrical integrity - a design requirement absent in MSOP variants.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | +2.7 V to +5.5 V - supports single-cell Li-ion and 3.3 V/5 V system rails without pre-regulation. |
| Output Voltage Range | −1.5 V to −5.2 V - adjustable via external resistor divider on VFB pin; enables flexible biasing for diverse GaAsFET thresholds. |
| Max Output Current | 10 mA - sufficient for RF power amplifier biasing in portable wireless transceivers. |
| Output Ripple | 1 mV (typ.) - achieved via PSRR filtering of charge-pump ripple; critical for low-phase-noise RF stages. |
| Shutdown Current | 0.05 µA (typ.) - enables ultra-low-power sleep modes in battery-operated handheld devices. |
| Switching Frequency | 100 kHz (typ.) - balances capacitor size, EMI, and efficiency; internal oscillator requires no external components. |
| Power Efficiency | 91% (typ. at 10 mA) - minimizes heat generation and extends battery life in space-constrained portable designs. |
Pinout & Package
LM2687LDX/NOPB is housed in an 8-pin Leadless Leadframe Package (LLP-8, NS package code LDA08A), measuring 3.0 mm × 3.0 mm × 0.8 mm, with exposed Die Attach Pad (DAP) thermally and electrically tied to VNEG.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - Cap+ | Charge-pump flying capacitor positive terminal | Connects to C1+; forms half of charge-transfer path during inversion cycle. |
| 2 - GND | Ground reference | Primary return for logic, regulator, and charge-pump circuits; must be low-impedance. |
| 3 - Cap− | Charge-pump flying capacitor negative terminal | Connects to C1−; completes flying capacitor connection for voltage inversion. |
| 4 - SD | Active-low shutdown control | Drives internal circuitry into ultra-low-IQ state when pulled ≤0.5 V; open-drain compatible. |
| 5 - VNEG | Unregulated negative charge-pump output | Feeds linear regulator input; connects directly to DAP for thermal dissipation in LLP package. |
| 6 - VFB | Feedback input for output regulation | Senses divided output voltage; internal reference is −1.20 V; requires external R-divider to VADJ. |
| 7 - VOUT | Regulated negative output | Final filtered, low-noise output; PSRR attenuates charge-pump ripple before delivery. |
| 8 - VIN | Positive input supply | Accepts 2.7–5.5 V; powers both charge-pump and LDO stages; bypass capacitor required. |
Key Features
| Feature | Design Value |
|---|---|
| Regulated negative output via integrated LDO | Combines charge-pump inversion with linear regulation to deliver stable, low-noise VOUT unaffected by load or input drift. |
| 1 mV typical output ripple | PSRR of internal LDO reduces raw charge-pump ripple by >40 dB - essential for RF amplifier bias stability. |
| 0.05 µA shutdown current | Enables true power-gating in sleep states; preserves battery capacity over weeks of standby in handheld instrumentation. |
| LLP-8 package with thermal DAP | Exposed pad connected to VNEG improves thermal resistance (θJA = 250°C/W) and stabilizes bias point under transient loads. |
| Adjustable output using two external resistors | VOUT set precisely across −1.5 V to −5.2 V without trimming; supports multiple FET types on same PCB layout. |
Applications
| Cellular Phone Power Amplifier Biasing | Wireless Communication Systems |
|---|---|
Use Scenario: Biasing GaAsFET power amplifiers in GSM/UMTS/LTE handset front-ends requiring clean, stable negative gate voltage. IC Role / Device Role / Timing Role: Provides regulated, low-noise negative supply to FET gate while rejecting supply ripple and load transients. Use Value: Enables consistent amplifier gain and linearity across battery discharge cycles; eliminates need for discrete LDO + inverter solutions. |
Use Scenario: Generating isolated negative bias for RF switches, mixers, and IF amplifiers in portable baseband and transceiver modules. IC Role / Device Role / Timing Role: Delivers tightly regulated VOUT with minimal added phase noise - critical for adjacent-channel rejection and EVM performance. Use Value: Achieves <1 mV ripple without ferrite beads or LC filters, reducing BOM count and board area in compact RF layouts. |
| Interface Power Supplies | Handheld Instrumentation |
Use Scenario: Supplying negative rail for RS-232 transceivers, op-amp dual supplies, or analog switch bias in portable test equipment. IC Role / Device Role / Timing Role: Generates clean, programmable negative voltage from single positive rail - eliminating need for dual-output DC/DC converters. Use Value: Supports rail-to-rail analog signal swing and wide common-mode range in battery-powered interfaces with minimal quiescent draw. |
Use Scenario: Providing precision negative bias for sensor signal conditioning, ADC reference buffers, and low-noise front-end amplifiers in field meters. IC Role / Device Role / Timing Role: Acts as low-power, low-drift negative source with shutdown capability synchronized to measurement cycles. Use Value: Extends battery life via 0.05 µA shutdown mode while maintaining output accuracy within ±1% over −40°C to +85°C. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar regulated negative voltage inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX680ESA+ | Unregulated inverter; no LDO stage; 120 kHz switching; 15 mA max output; no VFB pin or adjustable output. | Lacks regulation and ripple suppression - suitable only where output tolerance >±5% and noise immunity is secondary. | Select MAX680ESA+ only if cost sensitivity outweighs need for stable bias voltage and low-noise operation. |
| TPS60403DBVR | Regulated inverter with 1.5% output accuracy; 1.2 MHz switching; 60 mA output; requires different capacitor values and layout due to higher frequency. | Higher output current and tighter regulation, but increased EMI risk near sensitive RF sections without shielding. | Choose TPS60403DBVR when >10 mA load or ±1.5% output accuracy is mandatory - verify layout EMI mitigation in RF-dense environments. |
Compared with MAX680ESA+ and TPS60403DBVR, LM2687LDX/NOPB uniquely balances ultra-low ripple (1 mV), 0.05 µA shutdown, and 100 kHz operation - making it optimal for RF bias where noise, power, and frequency co-design constraints intersect.
Availability
LM2687LDX/NOPB is available at Aetrix Electronics and suitable for cellular phone power amplifier biasing, handheld instrumentation, and interface power supplies requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for LM2687LDX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in power management, signal chain, and high-reliability ICs.
The LM2687LDX/NOPB belongs to TI's regulated charge-pump inverter product line, designed specifically for low-noise, low-power negative bias generation in portable RF and precision analog systems.
FAQ
What is the function of the DAP (Die Attach Pad) on the LM2687LDX/NOPB LLP-8 package?
The DAP on the LM2687LDX/NOPB is an exposed thermal pad located beneath the die, which must be soldered to the PCB and connected to the VNEG net. It provides enhanced thermal conduction to reduce junction temperature and improves electrical stability of the unregulated charge-pump output node - a requirement not present in MSOP-8 variants.
Can the LM2687LDX/NOPB generate −5.0 V output from a 3.3 V input?
Yes, the LM2687LDX/NOPB can generate −5.0 V output from a 3.3 V input. Its output range spans −1.5 V to −5.2 V, and the datasheet confirms operation down to VIN = 3.0 V at full 10 mA load. At 3.3 V input, −5.0 V is within specification and achievable using appropriate feedback resistors per the VFB = −1.20 V reference.
How does the LM2687LDX/NOPB achieve 1 mV typical output ripple despite using a switched-capacitor topology?
The LM2687LDX/NOPB achieves 1 mV typical output ripple by cascading a switched-capacitor inverter with a high-PSRR linear regulator. The charge-pump generates VNEG, then the integrated LDO filters its ripple - leveraging >40 dB PSRR to suppress switching artifacts before delivering VOUT. This dual-stage architecture is explicitly validated in Figures 13–14 of the SNVS060D datasheet.
What is the minimum recommended capacitor ESR for stable operation of the LM2687LDX/NOPB?
The LM2687LDX/NOPB specifies a maximum ESR of 0.3 Ω for C1, C2, and C3 to ensure low output resistance, minimal ripple, and optimal efficiency. Ceramic, surface-mount tantalum, or polymer electrolytic capacitors meeting this ESR limit are recommended - exceeding 0.3 Ω increases dropout voltage and degrades ripple performance per Note 8 in the Electrical Characteristics table.
Is the LM2687LDX/NOPB pin-compatible with the LM2687MMX MSOP-8 variant?
No, the LM2687LDX/NOPB (LLP-8) is not pin-compatible with the LM2687MMX (MSOP-8). While both share identical pin functions and numbering (Cap+, GND, Cap−, SD, VNEG, VFB, VOUT, VIN), the LLP-8 includes an exposed DAP requiring dedicated PCB copper connection to VNEG - a mechanical and thermal difference that mandates separate footprint design and layout validation.
LM2687LDX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Step-Down
- Output Configuration:
- Negative
- Topology:
- Charge Pump
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- -1.5V
- Voltage - Output (Max):
- -5.2V
- Current - Output:
- 10mA
- Frequency - Switching:
- 110kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WSON (3x3)
LM2687LDX/NOPB FAQ
1.How can I place an order for LM2687LDX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM2687LDX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM2687LDX/NOPB reliable?
The price and inventory of LM2687LDX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM2687LDX/NOPB is usually 5 days.
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Once your LM2687LDX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM2687LDX/NOPB?
For technical support, including LM2687LDX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM2687LDX/NOPB requirements.
6.How does Aetrix verify that LM2687LDX/NOPB is sourced from the original manufacturer or authorized distributors?
All LM2687LDX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM2687LDX/NOPB meets industry standards.
7.What is the process for return or replacement of LM2687LDX/NOPB?
All LM2687LDX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM2687LDX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM2687LDX/NOPB part is unused and in its original packaging.
Return procedure for LM2687LDX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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