Texas Instruments LM26LVCISD-115/NOPB
- Part No.:
- LM26LVCISD-115/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Thermostats - Solid State
- Package:
- 6-WDFN Exposed Pad
- Datasheet:
-
LM26LVCISD-115/NOPB.pdf
- Description:
- THERMOSTAT 115DEGC OPN DRN 6WSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM26LVCISD-115/NOPB from Texas Instruments is a factory-preset, dual-output temperature monitoring IC with active-high push-pull and active-low open-drain overtemperature switch outputs plus a linear NTC analog voltage output (VTEMP). It operates from 1.6 V to 5.5 V, features ±2.3°C trip point accuracy across –50°C to 150°C, and delivers 5°C hysteresis for stable switching in thermally noisy environments. It is used in battery management systems to prevent thermal runaway during charging.
For engineers reviewing the LM26LVCISD-115/NOPB datasheet, LM26LVCISD-115/NOPB pinout, LM26LVCISD-115/NOPB application, or LM26LVCISD-115/NOPB equivalent, key selection criteria include factory-set 115°C trip point, WSON-6 package thermal performance, VTEMP gain configuration (Gain 4), and compatibility with low-voltage microcontroller GPIO and ADC interfaces.
Technical Context
The LM26LVCISD-115/NOPB integrates an internal reference DAC, analog temperature sensor, and comparator to generate two independent digital switch outputs and one analog voltage output. Its trip point is fixed at 115°C (±2.3°C) with 5°C hysteresis, and its VTEMP output uses Gain 4 (–12.8 mV/°C) calibrated for the 130°C–150°C range - confirmed by TI's conversion table and electrical characteristics.
TRIP_TEST enables in-situ functional verification: asserting it high forces both OVERTEMP outputs active and routes VTRIP (trip-reference voltage) to VTEMP, allowing system-level validation without external thermal stimulus. The device supports latching behavior when OVERTEMP is tied to TRIP_TEST, and includes short-circuit protection on VTEMP.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Temperature Trip Point | Factory preset to 115°C ±2.3°C - defines thermal shutdown threshold for battery packs or power stages. |
| Hysteresis | Fixed 5°C - prevents output oscillation near trip point in marginally unstable thermal environments. |
| VTEMP Gain | –12.8 mV/°C (Gain 4) - optimized for high-temperature accuracy above 130°C; linear NTC response referenced to die temperature. |
| Supply Voltage Range | 1.6 V to 5.5 V - enables direct interface with 1.8-V and 3.3-V microcontrollers without level-shifting. |
| Quiescent Current | 8 µA typical - minimizes standby power draw in always-on thermal monitoring circuits. |
| Digital Output Types | OVERTEMP: active-high push-pull; OVERTEMP: active-low open-drain - provides flexible logic interface options for MCU interrupt or latch control. |
| Accuracy Range | ±2.3°C from –50°C to 150°C - ensures reliable thermal protection across automotive and industrial ambient extremes. |
Pinout & Package
LM26LVCISD-115/NOPB is housed in a 2.2 mm × 2.5 mm WSON-6 package with exposed thermal pad (DAP) for enhanced PCB heat dissipation. Thermal pad must be soldered to GND for optimal noise immunity and thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| TRIP_TEST (Pin 1) | Digital input | Active-high test enable: forces digital outputs active and routes VTRIP to VTEMP for production verification. |
| VDD (Pin 4) | Power supply | Positive supply input (1.6 V–5.5 V); powers internal reference, sensor, and output drivers. |
| GND (Pin 2) | Ground reference | Primary ground return; thermal pad should be connected directly to this node for EMI suppression. |
| OVERTEMP (Pin 5) | Digital output | Active-high push-pull output; asserts when die temperature ≥115°C; drives MCU interrupt directly. |
| OVERTEMP (Pin 3) | Digital output | Active-low open-drain output; requires external pull-up; enables wired-OR fault-bus architectures. |
| VTEMP (Pin 6) | Analog output | NTC voltage output (Gain 4); delivers calibrated millivolt-per-degree signal for precision temperature readback. |
Key Features
| Feature | Design Value |
|---|---|
| Latching function via TRIP_TEST tie | Enables persistent fault indication after trip event until MCU clears TRIP_TEST or power cycles. |
| VTEMP short-circuit protection | Prevents damage during accidental probe contact or PCB trace shorts; maintains reliability in field service. |
| Excellent supply noise rejection | –82 dB PSRR at 1 kHz - ensures stable operation in noisy DC/DC converter environments. |
| Low-voltage operation down to 1.6 V | Supports integration into energy-harvesting or single-cell Li-ion systems without auxiliary LDO. |
| Factory-trimmed trip accuracy | Eliminates need for external calibration components or firmware compensation tables in production. |
Applications
| Battery Pack Thermal Protection | Industrial Motor Drive Monitoring |
|---|---|
Use Scenario: Monitors cell stack temperature during fast charging to prevent thermal runaway in portable power tools. IC Role / Device Role / Timing Role: Dual-output thermal switch triggers immediate charge termination and logs fault via VTEMP analog readback. Use Value: Factory-set 115°C trip point aligns with Li-ion safety thresholds; 5°C hysteresis avoids nuisance trips during transient heating. | Use Scenario: Detects IGBT junction overheating in servo drive inverters operating under variable load conditions. IC Role / Device Role / Timing Role: Direct die-temperature sensing enables faster response than board-mounted thermistors; VTEMP feeds closed-loop thermal derating algorithm. Use Value: Gain 4 (–12.8 mV/°C) provides highest resolution in critical >130°C region where silicon reliability degrades rapidly. |
| Automotive Cabin Electronics | Server Power Supply Fan Control |
Use Scenario: Protects infotainment SoC and display driver ICs from ambient heat buildup inside sealed dashboard enclosures. IC Role / Device Role / Timing Role: OVERTEMP (push-pull) signals MCU to throttle CPU clocks; OVERTEMP (open-drain) pulls shared fault bus low for system-wide thermal alert. Use Value: 1.6-V minimum supply allows direct connection to 1.8-V domain rails; ±2.3°C accuracy meets AEC-Q100 Grade 0 requirements. | Use Scenario: Regulates cooling fan speed based on real-time PSU MOSFET temperature in 1U rack servers. IC Role / Device Role / Timing Role: VTEMP analog output feeds ADC of PMBus controller; digital outputs trigger emergency fan ramp-up or shutdown if threshold exceeded. Use Value: 8 µA quiescent current minimizes impact on standby power budget; WSON-6 footprint saves space on dense PSU PCBs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar temperature switch and sensor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM26LVISD-115/NOPB | No Q1 qualification; lower ESD ratings (HBM ±4500 V vs Q1's ±4500 V but CDM ±1000 V only). | Not qualified for automotive Grade 0 (–40°C to 150°C); suitable for commercial/industrial use only. | Select when AEC-Q100 compliance is not required and cost sensitivity outweighs automotive qualification. |
| MAX6505UTP+T | Single-output (active-low open-drain only); no analog VTEMP output; 115°C trip with 10°C hysteresis. | Lacks analog readback capability; cannot support closed-loop thermal management or diagnostics. | Select when only simple overtemperature flag is needed and board space or BOM count is constrained. |
Compared with LM26LVCISD-115/NOPB, LM26LVISD-115/NOPB offers identical functionality but lacks automotive qualification, while MAX6505UTP+T reduces feature set to basic switching only - making LM26LVCISD-115/NOPB the only choice requiring dual digital outputs plus precision analog temperature feedback in a single WSON-6 package.
Availability
LM26LVCISD-115/NOPB is available at Aetrix Electronics and suitable for battery management systems, industrial motor drives, automotive cabin electronics, and server power supply thermal monitoring requiring stable component supply and guaranteed long-term manufacturability.
Supply support for LM26LVCISD-115/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in precision analog ICs and automotive-grade solutions.
The LM26LV family was designed for compact, low-power thermal monitoring in space-constrained systems requiring both digital fault signaling and analog temperature telemetry - targeting battery, computing, and industrial power applications.
FAQ
What is the factory-set trip temperature of the LM26LVCISD-115/NOPB?
The LM26LVCISD-115/NOPB has a factory-preset overtemperature trip point of 115°C, with a tolerance of ±2.3°C across the full operating temperature range (–50°C to 150°C). This value is laser-trimmed during manufacturing and cannot be adjusted externally. The device also incorporates 5°C of built-in hysteresis to ensure stable switching behavior near the trip threshold. LM26LVCISD-115/NOPB is specifically ordered for this 115°C variant within the LM26LV family.
How does the VTEMP output behave when TRIP_TEST is asserted high?
When TRIP_TEST is driven high, the LM26LVCISD-115/NOPB routes the internal trip-reference voltage (VTRIP) to the VTEMP pin instead of the normal temperature-sensor voltage (VTS). Simultaneously, both OVERTEMP and OVERTEMP digital outputs are forced active. This allows system-level verification of comparator and output circuitry without thermal stimulus. LM26LVCISD-115/NOPB maintains this state until TRIP_TEST is returned low or power is cycled.
What package type and thermal characteristics does the LM26LVCISD-115/NOPB use?
The LM26LVCISD-115/NOPB uses a 6-pin WSON package measuring 2.2 mm × 2.5 mm with an exposed thermal pad (DAP). Its junction-to-board thermal resistance (RθJB) is 70°C/W, and junction-to-ambient (RθJA) is 100.7°C/W. For optimal thermal performance and noise immunity, the DAP must be soldered to a PCB thermal pad connected directly to GND - matching the pin 2 ground connection. LM26LVCISD-115/NOPB's small footprint supports high-density layouts in portable and automotive modules.
Can the LM26LVCISD-115/NOPB operate from a 1.8-V supply?
Yes, the LM26LVCISD-115/NOPB operates reliably from 1.6 V to 5.5 V, making it fully compatible with 1.8-V systems. At 1.8 V, all specifications remain valid: quiescent current stays at 8 µA typical, digital output VOH/VOL meet logic thresholds, and VTEMP accuracy holds within ±2.3°C. Its low-voltage capability eliminates the need for level shifters when interfacing with 1.8-V microcontrollers or FPGAs. LM26LVCISD-115/NOPB is explicitly characterized and guaranteed across this entire supply range.
Does the LM26LVCISD-115/NOPB support latching behavior after an overtemperature event?
Yes, the LM26LVCISD-115/NOPB supports hardware latching: tying the OVERTEMP output to the TRIP_TEST input causes the device to latch its active state after tripping. Once latched, the outputs remain asserted until TRIP_TEST is forced low (e.g., by MCU GPIO) or power is removed. This eliminates the need for continuous software polling and ensures fault persistence across brief thermal transients. LM26LVCISD-115/NOPB implements this behavior using internal logic without external components.
LM26LVCISD-115/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Trip Temperature Threshold:
- Hot
- Switching Temperature:
- 115°C
- Accuracy:
- ±2.2°C
- Current - Output (Max):
- 7mA
- Output Type:
- Open Drain, Push-Pull
- Output:
- Active High, Active Low
- Output Function:
- OverTemp, /OverTemp, VTemp
- Selectable Hysteresis:
- No
- Features:
- Trip Test
- Voltage - Supply:
- 1.6 V ~ 5.5 V
- Current - Supply:
- 8µA
- Operating Temperature:
- -50°C ~ 150°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 6-WSON (2.2x2.5)
LM26LVCISD-115/NOPB FAQ
1.How can I place an order for LM26LVCISD-115/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM26LVCISD-115/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM26LVCISD-115/NOPB reliable?
The price and inventory of LM26LVCISD-115/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM26LVCISD-115/NOPB is usually 5 days.
3.What payment methods are accepted for LM26LVCISD-115/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM26LVCISD-115/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM26LVCISD-115/NOPB?
LM26LVCISD-115/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM26LVCISD-115/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM26LVCISD-115/NOPB?
For technical support, including LM26LVCISD-115/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM26LVCISD-115/NOPB requirements.
6.How does Aetrix verify that LM26LVCISD-115/NOPB is sourced from the original manufacturer or authorized distributors?
All LM26LVCISD-115/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM26LVCISD-115/NOPB meets industry standards.
7.What is the process for return or replacement of LM26LVCISD-115/NOPB?
All LM26LVCISD-115/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM26LVCISD-115/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM26LVCISD-115/NOPB part is unused and in its original packaging.
Return procedure for LM26LVCISD-115/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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