Texas Instruments LM27762DSST

Overview

LM27762DSST from Texas Instruments is a dual-rail, low-noise integrated charge pump plus dual LDO IC generating independently adjustable ±1.5V to ±5V outputs with ±250mA capability, 2MHz fixed-frequency operation, and 390µA quiescent current - deployed in high-fidelity audio biasing, precision DAC power, and op-amp dual-supply systems.

For engineers reviewing the LM27762DSST datasheet, LM27762DSST pinout, LM27762DSST application, or LM27762DSST equivalent, this page delivers verified electrical specs, validated pin functions, confirmed thermal metrics, real-world sequencing behavior for positive/negative rail enable control, and documented PGOOD logic states under load and shutdown conditions.

Technical Context

The LM27762DSST integrates an inverting charge pump (2MHz switching, 2.5Ω output impedance at VIN=5V) followed by a negative LDO and a separate positive LDO - each with dedicated enable inputs (EN+, EN−) enabling independent power sequencing. Its architecture decouples regulation paths to minimize cross-rail noise coupling and supports simultaneous or staggered rail activation.

Feedback pins FB+ (1.20V ref) and FB− (−1.22V ref) allow precise external resistor-based voltage setting; PGOOD is an open-drain flag monitoring both OUT+ and OUT− against 95% of target voltage thresholds. Undervoltage lockout activates below 2.4V VIN, and thermal shutdown engages at 150°C junction temperature.

Key Specifications

Pinout & Package

LM27762DSST uses a 12-pin WSON package (DSS), 3mm × 2mm body with exposed thermal pad - optimized for compact, thermally efficient PCB layouts in space-constrained portable designs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-rail charge pump + LDO applications.

Compared with MAX1759EUT+T and TPS60403DBVR, LM27762DSST uniquely delivers fully adjustable dual-rail outputs with integrated LDOs, 22µVRMS noise, and independent enable control - making it the sole option for new designs requiring matched low-noise ±V bias with flexible sequencing.

Availability

LM27762DSST is available at Aetrix Electronics and suitable for high-fidelity audio systems, precision data acquisition modules, and wireless communication front-ends requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for LM27762DSST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader designing analog, embedded processing, and connectivity technologies for industrial, automotive, and consumer markets.

LM27762DSST belongs to TI's precision power management portfolio - engineered specifically for low-noise, dual-rail bias generation in audio, measurement, and signal-chain applications where PSRR, sequencing, and thermal reliability are critical.

FAQ

What is the minimum input voltage required for stable operation of the LM27762DSST?

The LM27762DSST features undervoltage lockout (UVLO) that disables operation below 2.4V VIN and re-enables above 2.6V. For guaranteed regulation across full load and temperature, the recommended minimum operating input voltage is 2.7V - matching its specified range in the datasheet. At 2.7V VIN, the device sustains ±250mA output only when VOUT+ and VOUT− are set near ±1.5V to maintain LDO headroom.

How does the PGOOD pin behave during power-up and fault conditions for the LM27762DSST?

The PGOOD pin on the LM27762DSST is an open-drain output that pulls low only when both OUT+ and OUT− exceed 95% of their respective target voltages. During power-up, PGOOD remains high until both rails settle; if either rail drops below threshold (e.g., due to overload or thermal shutdown), PGOOD goes high. When unused, PGOOD must be tied to GND - not left floating - to avoid false system resets.

Can the LM27762DSST generate asymmetric output voltages such as +3.3V and −5.0V simultaneously?

Yes, the LM27762DSST supports independent voltage setting: VOUT+ is configured via FB+ and a resistor divider referenced to 1.20V, while VOUT− is set via FB− referenced to −1.22V. This allows asymmetric outputs like +3.3V and −5.0V - provided VIN ≥ |VOUT−| + |VLDO− dropout| + VOUT+ headroom (e.g., 5.5V min for this combination). The datasheet confirms operation across ±1.5V to ±5V per rail.

What thermal considerations apply to the LM27762DSST at maximum load?

At ±250mA output and 5.5V VIN, the LM27762DSST dissipates ~1.2W. With RθJA = 62.2°C/W, junction temperature rise exceeds 75°C - triggering thermal shutdown (150°C TJ) without proper heatsinking. The exposed thermal pad must be soldered to a ≥100mm² copper pour connected to GND; RθJB = 25.6°C/W enables safe operation up to 85°C ambient under full load when layout guidelines are followed.

Which external capacitors are mandatory for stable operation of the LM27762DSST?

The LM27762DSST requires five mandatory ceramic capacitors: CIN (2.2µF), COUT+ (2.2µF), COUT− (2.2µF), C1 (1µF flying cap), and CCP (4.7µF charge-pump output cap). All must be X7R/X5R dielectric, ≤15mΩ ESR, and rated ≥6.3V. Y5V/Z5U types are prohibited - their capacitance collapse under DC bias causes startup failure and excessive ripple.