Texas Instruments LM2852YMXAX-3.3/NOPB
- Part No.:
- LM2852YMXAX-3.3/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LM2852YMXAX-3.3/NOPB.pdf
- Description:
- IC REG BUCK 3.3V 2A 14HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM2852YMXAX-3.3/NOPB from Texas Instruments is a 2A synchronous buck regulator with factory-programmed 3.3 V output, 500 kHz switching frequency, input voltage range of 2.85 V to 5.5 V, internal 60 mΩ PMOS/NMOS power switches, and voltage-mode control architecture. It delivers point-of-load regulation for FPGA core supplies in portable computing systems.
For engineers reviewing the LM2852YMXAX-3.3/NOPB datasheet, LM2852YMXAX-3.3/NOPB pinout, LM2852YMXAX-3.3/NOPB application, or LM2852YMXAX-3.3/NOPB equivalent, key selection criteria include its fixed 3.3 V output, HTSSOP-14 thermal performance (RθJA = 39.2 °C/W), soft-start programmability via external capacitor, and split-rail AVIN/PVIN operation supporting optimized power stage design.
Technical Context
The LM2852YMXAX-3.3/NOPB implements voltage-mode PWM control with integrated type-three compensation, eliminating external compensation components. Its dual-rail architecture separates AVIN (logic bias) from PVIN (power FET supply), enabling independent optimization of control stability and power efficiency.
Switch node protection logic disables switching under no-load or light-load conditions until load current exceeds threshold-ensuring safe startup and preventing erratic behavior. The device features internal UVLO (2.85 V rising), thermal shutdown at 165 °C with 10 °C hysteresis, and peak current limiting (2.25–3.65 A over temperature).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.3 V ±1.5% (3.226–3.374 V) at TJ = –40°C to 125°C; factory EEPROM-programmed, not adjustable. |
| Max Output Current | 2 A continuous; limited by internal 75 mΩ (25°C) PMOS and 55 mΩ (25°C) NMOS switches and thermal derating. |
| Switching Frequency | 500 kHz ±22.5% (325–625 kHz); enables compact magnetics and balances EMI vs. efficiency trade-offs. |
| Input Voltage Range | 2.85 V to 5.5 V on AVIN; PVIN must be ≤ AVIN and ≥ 1.5 V-supports Li-ion, USB, and regulated 3.3/5 V rails. |
| Quiescent Current | 0.85 mA typical (non-switching, TJ = 25°C); 10 µA shutdown current enables battery-sensitive applications. |
| Efficiency @ 1 A | 94% typical at VIN = 5 V, VOUT = 3.3 V, TJ = 25°C-achieved via synchronous rectification and low RDS(on). |
| Thermal Resistance | RθJA = 39.2 °C/W (HTSSOP-14); requires exposed pad soldered to PCB ground plane for full 2 A capability. |
Pinout & Package
LM2852YMXAX-3.3/NOPB uses a 14-pin HTSSOP package (5.00 mm × 4.40 mm) with exposed thermal pad connected to PGND. The package supports high-power density layouts with low junction-to-board thermal resistance (RθJB = 20.1 °C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AVIN (Pin 1) | Chip bias supply | Provides power to internal logic; must be ≥2.85 V; can be separate from PVIN for optimal noise isolation. |
| EN (Pin 2) | Enable control | Internally pulled up; tie to GND to disable; VIH = 75% AVIN, VIL = 25% AVIN-supports simple microcontroller control. |
| SGND (Pin 3) | Signal ground reference | Separate from PGND to minimize noise coupling into feedback path; connects to SNS divider ground. |
| SS (Pin 4) | Soft-start timing | Connects to external capacitor (1–50 nF); sets output ramp time; internal 400 kΩ resistor forms RC time constant. |
| NC (Pins 5, 12, 13) | No connect | Must be left floating or tied to GND; no internal connection-no routing or thermal impact required. |
| PVIN (Pins 6, 7) | Power FET supply | Drives internal high-side/low-side MOSFETs; must be ≤ AVIN; determines inductor/capacitor voltage ratings. |
| SNS (Pin 14) | Output voltage sense | High-impedance feedback node; connect directly to load for accurate regulation; internal 400 kΩ resistor to SGND. |
| PGND (Pins 10, 11) | Power ground return | Low-impedance return path for switch currents; must be tied to exposed pad and large copper area. |
| SW (Pins 8, 9) | Switch node | Connects to inductor; carries high di/dt; requires short, wide trace to minimize EMI and voltage spikes. |
Key Features
| Feature | Design Value |
|---|---|
| Factory-programmed output | 3.3 V set permanently in EEPROM-eliminates external resistor divider, reduces BOM count and layout sensitivity. |
| Split-rail AVIN/PVIN operation | Enables independent optimization: AVIN powers control circuitry (lower noise), PVIN powers power stage (higher efficiency). |
| Integrated type-three compensation | Removes need for external compensation network-reduces component count and design iteration time for stable loop response. |
| Internal 60 mΩ power switches | Reduces conduction losses and eliminates external MOSFET drivers; supports 2 A continuous without heatsink at 25°C ambient. |
| Switch node protection | Prevents false triggering during no-load startup by disabling switching until load current exceeds detection threshold. |
Applications
| Portable Computing Power | FPGA Core Supply |
|---|---|
|
Use Scenario: Regulating 3.3 V rail for I/O banks and auxiliary logic in ultrabooks and tablets powered by single-cell Li-ion (3.0–4.2 V). IC Role / Device Role / Timing Role: Primary DC-DC step-down converter delivering stable 3.3 V at up to 2 A with fast transient response to CPU/FPGA activity bursts. Use Value: Achieves >94% efficiency at 1 A load from 3.3 V input-minimizing heat generation and extending battery runtime. |
Use Scenario: Providing clean, tightly regulated 3.3 V to FPGA configuration I/O banks and transceivers in industrial edge compute modules. IC Role / Device Role / Timing Role: Point-of-load regulator placed adjacent to FPGA package; senses voltage directly at connector pins via SNS trace. Use Value: ±1.5% output tolerance and <8 mV/A load regulation ensure signal integrity across temperature and load variation. |
| Networking PHY Interface | Industrial Sensor Hub |
|
Use Scenario: Powering Ethernet PHY ICs (e.g., DP83848) requiring 3.3 V at ≤1.5 A in compact 10/100BASE-TX switch designs. IC Role / Device Role / Timing Role: Secondary regulator fed from system 5 V rail; operates at 500 kHz to avoid interference with 125 MHz Ethernet clock harmonics. Use Value: Low 10 µA shutdown current allows complete PHY power gating during link-down states-reducing idle power by >90%. |
Use Scenario: Supplying 3.3 V to mixed-signal sensor interface circuits (ADCs, op-amps, digital isolators) in IP67-rated environmental monitors. IC Role / Device Role / Timing Role: Main power source for analog front-end; leverages AVIN/PVIN separation to isolate noisy digital switching from precision analog ground. Use Value: Internal UVLO (2.85 V) and thermal shutdown (165 °C) provide robust fault handling in unventilated enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54202DDCR | 2 A, 4.5–17 V input, adjustable output (0.6–7 V), 500 kHz, integrated compensation, but no factory-programmed fixed 3.3 V option. | Requires external resistor divider; better suited for multi-voltage systems where flexibility outweighs BOM simplicity. | Select when output voltage may change across product variants or when wider input range (up to 17 V) is needed. |
| MP2143GJ-Z | 2 A, 2.5–5.5 V input, fixed 3.3 V option, 2 MHz switching, smaller QFN-10 package, but no split-rail AVIN/PVIN or internal soft-start capacitor resistor. | Lacks AVIN/PVIN separation and integrated SS timing resistor-requires external RC network for controlled startup. | Select when board space is constrained and higher frequency enables smaller inductors, accepting added design complexity. |
Compared with TPS54202DDCR and MP2143GJ-Z, LM2852YMXAX-3.3/NOPB uniquely combines factory-fixed 3.3 V, split-rail operation, and integrated soft-start timing-reducing component count and layout sensitivity for cost-optimized, high-volume 3.3 V point-of-load designs.
Availability
LM2852YMXAX-3.3/NOPB is available at Aetrix Electronics and suitable for portable computing, FPGA power delivery, networking PHY interfaces, and industrial sensor hubs requiring stable component supply and long-term production continuity.
Supply support for LM2852YMXAX-3.3/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-efficiency DC-DC conversion.
The LM2852 product line delivers compact, thermally robust synchronous buck regulators targeting space-constrained, high-current point-of-load applications in portable and industrial electronics.
FAQ
What is the output voltage tolerance of the LM2852YMXAX-3.3/NOPB over temperature?
The LM2852YMXAX-3.3/NOPB has a guaranteed output voltage tolerance of ±1.5% (3.226 V to 3.374 V) across the full operating junction temperature range of –40°C to 125°C, as specified in the Electrical Characteristics table for the 3.3 V option. This tolerance includes initial accuracy, line regulation, and load regulation effects.
Can the LM2852YMXAX-3.3/NOPB operate with PVIN lower than AVIN?
Yes-the LM2852YMXAX-3.3/NOPB is explicitly designed for split-rail operation where PVIN must be ≤ AVIN. PVIN powers the internal power FETs and can be as low as 1.5 V, while AVIN (minimum 2.85 V) supplies the control logic. This separation improves noise immunity and thermal performance.
What soft-start capacitor value is recommended for the LM2852YMXAX-3.3/NOPB?
A 2.7 nF ceramic capacitor is recommended for the LM2852YMXAX-3.3/NOPB's SS pin to achieve approximately 3 ms startup time. The internal 400 kΩ soft-start resistor forms an RC network with this capacitor; values between 1 nF and 50 nF are supported per datasheet Section 8.2.2.3.
Does the LM2852YMXAX-3.3/NOPB require external compensation components?
No-the LM2852YMXAX-3.3/NOPB integrates a complete type-three compensation network internally. This eliminates the need for external resistors or capacitors in the feedback loop, reducing component count and simplifying layout while ensuring stable operation with recommended output filter components.
How is thermal performance affected by the exposed pad on the LM2852YMXAX-3.3/NOPB package?
The exposed thermal pad on the LM2852YMXAX-3.3/NOPB's HTSSOP-14 package must be soldered to a PCB ground plane to achieve the rated RθJA of 39.2 °C/W. Without proper thermal vias and copper area, junction temperature rise increases significantly-derating maximum load current below 2 A in high-ambient environments.
LM2852YMXAX-3.3/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SIMPLE SWITCHER®
- Package/Case:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.85V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Current - Output:
- 2A
- Frequency - Switching:
- 500kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-HTSSOP
LM2852YMXAX-3.3/NOPB FAQ
1.How can I place an order for LM2852YMXAX-3.3/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM2852YMXAX-3.3/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM2852YMXAX-3.3/NOPB reliable?
The price and inventory of LM2852YMXAX-3.3/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM2852YMXAX-3.3/NOPB is usually 5 days.
3.What payment methods are accepted for LM2852YMXAX-3.3/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM2852YMXAX-3.3/NOPB transactions.
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Once your LM2852YMXAX-3.3/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM2852YMXAX-3.3/NOPB?
For technical support, including LM2852YMXAX-3.3/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM2852YMXAX-3.3/NOPB requirements.
6.How does Aetrix verify that LM2852YMXAX-3.3/NOPB is sourced from the original manufacturer or authorized distributors?
All LM2852YMXAX-3.3/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM2852YMXAX-3.3/NOPB meets industry standards.
7.What is the process for return or replacement of LM2852YMXAX-3.3/NOPB?
All LM2852YMXAX-3.3/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM2852YMXAX-3.3/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM2852YMXAX-3.3/NOPB part is unused and in its original packaging.
Return procedure for LM2852YMXAX-3.3/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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