Texas Instruments LM3310SQ/NOPB
- Part No.:
- LM3310SQ/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LM3310SQ/NOPB.pdf
- Description:
- IC REG BOOST ADJ 2A 24WQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM3310SQ/NOPB from Texas Instruments is a step-up PWM DC/DC converter with integrated op-amp and gate pulse modulation (GPM) switch, designed for TFT-LCD bias supply generation. It features a 2 A, 0.18 Ω internal NMOS switch, adjustable boost output up to 20 V, 660 kHz / 1.28 MHz selectable switching frequency, and operates from 2.5 V to 7 V input.
For engineers reviewing the LM3310SQ/NOPB datasheet, LM3310SQ/NOPB pinout, LM3310SQ/NOPB application, or LM3310SQ/NOPB equivalent, this device supports high-efficiency TFT panel power sequencing, programmable soft-start control, input undervoltage protection, overtemperature shutdown, and rail-to-rail op-amp operation with ±135 mA output drive capability.
Technical Context
The LM3310SQ/NOPB integrates three functional blocks: a current-mode PWM boost regulator with internal 2 A/0.18 Ω switch, a rail-to-rail op-amp (AVIN = 4–14 V, ±135 mA output), and a gate pulse modulation (GPM) circuit supporting VGH inputs from 5 V to 30 V. The GPM block uses VDPM as enable and VFLK as timing control to modulate VGHM output for TFT gate driver sequencing.
Switching frequency is selected via FREQ pin (AGND = 660 kHz, VIN = 1.28 MHz), and soft-start is externally programmable via SS pin current (11 µA typ.) and clamp voltage (1.24 V). Feedback regulation targets 1.263 V at FB pin, enabling output adjustment using resistor dividers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Boost Output Range | Adjustable up to 20 V - enables single-chip TFT VGH/VGL bias generation without external charge pumps. |
| Internal Switch | 2 A, 0.18 Ω NMOS - supports high-current, high-efficiency boost conversion with minimal external components. |
| Switching Frequency | 660 kHz or 1.28 MHz (pin-selectable) - allows optimization of inductor size and efficiency for portable applications. |
| Op-Amp Output Drive | ±135 mA (sink/source) - sufficient to directly drive TFT panel analog bias lines without external buffers. |
| VGH Input Range | 5 V to 30 V - compatible with discrete 2×/3× charge pump outputs used in LCD timing controllers. |
| Feedback Voltage | 1.263 V (±0.03 V) - precise reference enabling stable output regulation across temperature and load. |
| Operating Input Range | 2.5 V to 7 V - matches Li-ion battery and USB-powered portable system rails. |
Pinout & Package
LM3310SQ/NOPB is housed in a thermally enhanced 24-lead WQFN package (RTW0024A, 4 mm × 4 mm, 0.5 mm pitch) with exposed die attach pad (DAP) connected internally to AGND/PGND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 11–13 | NC | No internal connection - must be left floating or tied to AGND per layout best practice. |
| 2 | VGHM | GPM output driving gate driver supply - directly sourced from internal PMOS switches P2/P3. |
| 3 | VFLK | TFT timing controller signal input - controls VGHM on/off state transitions with 1.4 V/0.4 V thresholds. |
| 4 | VDPM | GPM enable/disable control - high = active GPM, low = disables P2/P3 and discharges VGHM via 1 kΩ. |
| 5 | VDD | GPM reference input - sets lower VGHM voltage level; connect to VIN if GPM unused. |
| 6 | AVIN | Op-amp analog supply - independent 4–14 V rail decoupled separately from digital/boost supplies. |
| 7 | OUT | Op-amp output - rail-to-rail capable, ±135 mA drive, requires external RC compensation for stability. |
| 8–9 | NEG / POS | Op-amp differential inputs - high-impedance (IB < 550 nA), require local bypass and short trace routing. |
| 10, 21 | AGND / PGND | Separate analog and power grounds - must be connected directly to DAP under package for thermal and noise integrity. |
| 14 | SS | Soft-start capacitor node - ISS = 11 µA typ. charges CSS to 1.24 V; TSS ≈ CSS × 1.24 V / 11 µA. |
| 15 | VC | Boost error amplifier output - connects to external compensation network (R-C across VC-FB). |
| 16 | FREQ | Frequency select - AGND = 660 kHz, VIN = 1.28 MHz; determines minimum off-time and inductor sizing. |
| 17 | VIN | Main boost input supply - powers boost regulator, GPM logic, and SHDN/FREQ/SS circuits (2.5–7 V). |
| 18 | SW | Switch node - connects to external inductor and catch diode; max 20 V swing, 2 A peak current. |
| 19 | SHDN | Active-low enable - pulls internal regulators and GPM block into ultra-low IQ state (< 8.5 µA). |
| 20 | FB | Feedback input - senses output divider; regulated to 1.263 V; IB < 160 nA ensures accuracy. |
| 22–23 | CE / RE | GPM timing network - CE capacitor and RE resistor set VGHM rise/fall delay (tDELAY ≈ CE × RE × 1.94 V). |
| 24 | VGH | GPM high-voltage supply - powers internal PMOS switches; 5–30 V range supports discrete charge pumps. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated GPM block | Enables direct TFT gate driver voltage modulation (VGHM) using VFLK/VDPM timing signals - eliminates discrete MOSFETs and logic. |
| Programmable soft-start | External CSS sets inrush current limit during startup - prevents input rail collapse and extends capacitor life. |
| Rail-to-rail op-amp | Drives ±135 mA with AVIN = 4–14 V - supports direct analog bias generation for source/gate drivers without external amplifiers. |
| Input undervoltage lockout | UVP On = 2.4 V, Off = 2.1 V - prevents erratic switching during battery brownout or cold start conditions. |
| Thermal shutdown | Activates at 145°C with ~20°C hysteresis - protects silicon during overload or poor PCB thermal design. |
Applications
| TFT-LCD Gate Driver Bias | Portable Display Power Management |
|---|---|
|
Use Scenario: Generating VGH (15–25 V) and VGL (−5 to −10 V) for active-matrix LCD panels in handheld devices. IC Role / Device Role / Timing Role: LM3310SQ/NOPB acts as primary boost converter + GPM sequencer, synchronizing VGHM pulses with display timing controller via VFLK/VDPM. Use Value: Reduces BOM count by integrating boost, op-amp, and GPM functions - eliminates 3–4 discrete ICs and associated passives. |
Use Scenario: Powering analog front-end circuits (gamma correction, source driver bias) in battery-operated tablets and e-readers. IC Role / Device Role / Timing Role: LM3310SQ/NOPB delivers stable, low-noise analog rails using its rail-to-rail op-amp and dedicated AVIN supply. Use Value: AVIN decoupling and layout guidance minimize switching ripple coupling - achieves < 5 mVpp output noise at full load. |
| Multi-Rail TFT Panel Sequencing | USB-Powered Display Modules |
|
Use Scenario: Coordinating power-up/down sequences for VCOM, VGH, VGL, and AVDD rails in industrial LCD modules. IC Role / Device Role / Timing Role: LM3310SQ/NOPB's SHDN, SS, and GPM enable precise inter-rail timing control via microcontroller GPIOs. Use Value: Programmable soft-start and GPM delay (via CE/RE) ensure safe voltage ramp rates - prevents panel latch-up or ESD damage. |
Use Scenario: Compact display subsystems powered directly from 5 V USB sources in kiosks, medical monitors, or point-of-sale terminals. IC Role / Device Role / Timing Role: LM3310SQ/NOPB boosts 5 V USB input to 12–18 V for VGH while maintaining >85% efficiency at 300 mA load. Use Value: 1.28 MHz option enables use of 2.2 µH inductors - reduces solution footprint by >30% vs. 660 kHz designs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar TFT bias supply applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65136RGTR | Dual-output (VPOS/VNEG) charge pump with integrated LDOs; no integrated op-amp or GPM; 3.3–5.5 V input only. | Lacks GPM timing control and analog bias drive - requires external op-amps for gamma correction or VCOM tuning. | Select when only dual-rail charge-pump bias is needed and GPM sequencing is handled externally. |
| LM2733YMF/NOPB | Single-output boost converter (no op-amp, no GPM); 2.5–5.5 V input; 1.6 MHz fixed frequency; 1.2 A switch. | Cannot replace GPM or op-amp functions - necessitates adding separate op-amp (e.g., OPA350) and logic-level MOSFETs for VGHM control. | Select for cost-sensitive, non-TFT applications where only basic boost functionality is required. |
Compared with TPS65136RGTR and LM2733YMF/NOPB, the LM3310SQ/NOPB uniquely integrates boost, op-amp, and GPM in one WQFN package - reducing total solution size by ≥40% and eliminating 7+ external components in TFT bias designs.
Availability
LM3310SQ/NOPB is available at Aetrix Electronics and suitable for TFT-LCD bias supplies, portable display power management, and multi-rail panel sequencing requiring stable component supply, long-term lifecycle support, and production-ready qualification.
Supply support for LM3310SQ/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions, with decades of expertise in power management ICs for display, automotive, and industrial markets.
The LM3310SQ/NOPB belongs to TI's TFT-LCD power management product line, engineered specifically to consolidate boost conversion, analog bias generation, and gate pulse timing into a single IC for next-generation display subsystems.
FAQ
What is the maximum output voltage achievable with the LM3310SQ/NOPB boost converter?
The LM3310SQ/NOPB boost converter supports an adjustable output voltage up to 20 V, set via a resistor divider from VOUT to FB. The feedback reference is precisely 1.263 V, and the maximum output is limited by internal switch voltage rating (20 V SW pin max) and external component selection. Operation beyond 20 V risks violating absolute maximum ratings and is not supported.
How does the GPM function in the LM3310SQ/NOPB interact with the VFLK and VDPM pins?
In the LM3310SQ/NOPB, VDPM enables or disables the entire GPM block (high = active, low = disabled), while VFLK provides the timing signal that controls VGHM output state transitions. When VDPM is high and VFLK goes high, PMOS P2 turns on to pull VGHM toward VGH; when VFLK goes low, P3 turns on to discharge VGHM. This enables precise synchronization with TFT display timing controllers.
Can the op-amp in the LM3310SQ/NOPB drive capacitive loads without external compensation?
The op-amp in the LM3310SQ/NOPB can drive capacitive loads ≥ 4.7 nF in series with ≤ 50 Ω without oscillation - matching typical TFT-LCD panel distributed capacitance. For smaller or resistive-dominant loads, external compensation (e.g., 50 Ω + 4.7 nF to AGND) is mandatory to maintain phase margin and prevent instability, as confirmed in the datasheet's Layout and Filtering section.
What is the purpose of the SS pin on the LM3310SQ/NOPB, and how is soft-start time calculated?
The SS pin on the LM3310SQ/NOPB controls soft-start duration by charging an external capacitor (CSS) with a 11 µA (typical) current source until it reaches 1.24 V. Soft-start time is calculated as TSS ≈ CSS × 1.24 V / 11 µA. For example, a 100 nF capacitor yields ~11.3 ms startup, limiting inrush current and preventing input rail sag during power-up.
Does the LM3310SQ/NOPB support both 660 kHz and 1.28 MHz switching frequencies simultaneously?
No - the LM3310SQ/NOPB supports only one switching frequency at a time, selected by the FREQ pin: connecting FREQ to AGND configures 660 kHz operation, while connecting FREQ to VIN selects 1.28 MHz. These are mutually exclusive modes; the device does not auto-switch or support dual-frequency operation within a single configuration.
LM3310SQ/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Up
- Output Configuration:
- Positive
- Topology:
- Boost
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 7V
- Voltage - Output (Min/Fixed):
- 1.263V
- Voltage - Output (Max):
- 20V
- Current - Output:
- 2A (Switch)
- Frequency - Switching:
- 660kHz, 1.28MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-WQFN (4x4)
LM3310SQ/NOPB FAQ
1.How can I place an order for LM3310SQ/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM3310SQ/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM3310SQ/NOPB reliable?
The price and inventory of LM3310SQ/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM3310SQ/NOPB is usually 5 days.
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Once your LM3310SQ/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM3310SQ/NOPB?
For technical support, including LM3310SQ/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM3310SQ/NOPB requirements.
6.How does Aetrix verify that LM3310SQ/NOPB is sourced from the original manufacturer or authorized distributors?
All LM3310SQ/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM3310SQ/NOPB meets industry standards.
7.What is the process for return or replacement of LM3310SQ/NOPB?
All LM3310SQ/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM3310SQ/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM3310SQ/NOPB part is unused and in its original packaging.
Return procedure for LM3310SQ/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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