Texas Instruments LM3311SQX-HIOP
- Part No.:
- LM3311SQX-HIOP
- Manufacturer:
- Texas Instruments
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LM3311SQX-HIOP.pdf
- Description:
- IC REG BOOST ADJ 2A 24WQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM3311SQX-HIOP from Texas Instruments is a highly integrated step-up DC/DC converter with integrated 2A/0.18Ω NMOS switch, adjustable LDO (2.5–7V input, up to 300mA), rail-to-rail op-amp (HIOP version: ±200mA output), and gate pulse modulation (GPM) switch for TFT LCD bias control. It operates from 2.5V to 7V input, delivers up to 20V boost output, and supports pin-selectable 660kHz/1.28MHz switching for compact designs in portable TFT displays.
For engineers reviewing the LM3311SQX-HIOP datasheet, LM3311SQX-HIOP pinout, LM3311SQX-HIOP application, or LM3311SQX-HIOP equivalent, key selection criteria include its dual-frequency PWM architecture, integrated GPM timing control (VFLK/VDPM interface), HIOP op-amp sourcing capability, LDO dropout voltage (218–674mV at 350mA), and 24-pin WQFN thermal performance (θJA = 37°C/W).
Technical Context
The LM3311SQX-HIOP implements a current-mode PWM boost regulator with internal 2A/0.18Ω NMOS switch and selectable 660kHz or 1.28MHz oscillator. Its GPM block accepts VFLK timing signals and modulates VGHM output using external RE/CE components, enabling precise TFT gate driver control. The HIOP op-amp variant provides 200mA typical source/sink current with 3.3MHz GBW and 50V/µs slew rate.
The LDO uses an adjustable feedback loop referenced to 1.263V, stable with ≥2.2µF ceramic output capacitance, while soft-start (SS pin) and input undervoltage protection (UVP: 2.4V on / 2.1V off) ensure controlled power-up. Thermal shutdown activates at 145°C with 20°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Boost Switch | 2A, 0.18Ω NMOS - enables high-efficiency step-up conversion with minimal conduction loss at full load |
| Switching Frequency | 660kHz or 1.28MHz (pin-selectable via FREQ) - allows optimization of inductor size and EMI profile |
| Op-Amp Output Current | ±200mA (HIOP version, typical) - supports direct driving of moderate-current analog loads without external buffers |
| LDO Dropout Voltage | 218–674mV at 350mA - ensures regulation down to low headroom conditions (e.g., LVIN = 3.3V → VOUT = 2.8V) |
| GPM VGH Range | 5V to 30V - compatible with standard TFT gate driver supply rails and timing controller interfaces |
| Operating Input Range | 2.5V to 7V - matches single-cell Li-ion, Li-poly, or multi-cell alkaline battery systems |
| Thermal Resistance | θJA = 37°C/W - enables >1W continuous dissipation in standard PCB layouts with DAP grounding |
Pinout & Package
LM3311SQX-HIOP is housed in a 24-lead WQFN package (RTW0024A) with exposed die attach pad (DAP) for thermal management. AGND and PGND must be connected directly to the DAP beneath the device.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 NC | No connect | Not internally bonded - leave unconnected or tie to ground per layout best practice |
| 2 VGHM | GPM output | Drives gate driver supply; voltage follows VGH scaled by internal PMOS ratio; requires external RE/CE timing network |
| 3 VFLK | TFT on/off timing input | Accepts TTL-compatible signal (0.4V/1.4V thresholds) to synchronize GPM activation with display frame timing |
| 4 VDPM | GPM enable/disable | Active-high logic control (1.4V threshold) for sequencing GPM block independently of main regulator |
| 5 VDD | GPM reference | Sets lower VGHM clamp level; connect to VIN if GPM unused |
| 6 AVIN | Op-amp analog supply | 4V–14V range - decoupling required; powers HIOP op-amp stage independently of boost/LDO domains |
| 7 OUT | Op-amp output | Rail-to-rail output capable of ±200mA sourcing/sinking - suitable for buffer, comparator, or DAC output stages |
| 8 NEG | Op-amp inverting input | High-impedance node (200nA bias current) - use for precision feedback or differential sensing |
| 9 POS | Op-amp non-inverting input | High-impedance node (200nA bias current) - supports unity-gain follower or active filter configurations |
| 10 AGND | Analog ground | Common reference for boost error amp, LDO, and op-amp - must be star-connected to DAP and PGND |
| 11 ADJ | LDO feedback | 1.263V reference input - sets LDO output via resistor divider (e.g., 2.5V, 2.8V, 3.0V, 3.3V) |
| 12 VOUT | LDO output | Adjustable regulated output (2.5–7V) - stable with ≥2.2µF ceramic capacitor; max 300mA load |
| 13 LVIN | LDO input | 2.5V–7V supply - may be fed from boost output or separate rail; independent of VIN domain |
| 14 SS | Soft-start control | External capacitor sets ramp time (TSS = CSS × 1.24V / 11µA); prevents inrush into output capacitors |
| 15 VC | Boost compensation | Connects to error amplifier output - used for Type II/III compensation network design |
| 16 FREQ | Frequency select | AGND = 660kHz; VIN = 1.28MHz - determines minimum on-time and inductor sizing constraints |
| 17 VIN | Boost input | Main power input for boost converter and GPM circuit - 2.5V–7V operating range |
| 18 SW | Boost switch node | Internal NMOS drain - connects to external inductor and catch diode/anode; handles 2A peak current |
| 19 SHDN | Shutdown control | Active-low logic (0.4V threshold) - disables all blocks (boost, LDO, op-amp, GPM) and reduces IQ to 10.5µA |
| 20 FB | Boost feedback | 1.263V reference input - sets boost output via resistor divider (e.g., 8.5V, 10.5V, up to 20V) |
| 21 PGND | Power ground | Source of NMOS switch and GPM ground - must be low-inductance connection to DAP |
| 22 CE | GPM timing capacitor | Connects to AGND; sets VGHM rise/fall time with RE - critical for GPM transient response |
| 23 RE | GPM timing resistor | Connects to PGND; forms RC network with CE to define GPM pulse edge rates |
| 24 VGH | GPM supply input | 5V–30V high-voltage rail - powers GPM PMOS switches; independent of VIN and LVIN domains |
Key Features
| Feature | Design Value |
|---|---|
| Integrated GPM block | Enables direct TFT gate driver timing control via VFLK/VDPM inputs and VGHM output - eliminates discrete timing ICs in display bias supplies |
| HIOP op-amp variant | 200mA sourcing/sinking capability supports direct drive of backlight dimming circuits, sensor excitation, or analog multiplexers without external buffers |
| Pin-selectable frequency | 660kHz/1.28MHz selection allows trade-off between inductor size (smaller at 1.28MHz) and efficiency (higher at 660kHz under light load) |
| Adjustable soft-start | External SS capacitor tailors startup ramp to match system-level inrush limits - prevents brownout during power-up of multiple rails |
| LDO with ceramic stability | Stable with ≥2.2µF X5R/X7R ceramic output caps - reduces BOM count and board space vs. tantalum-based LDOs |
| Thermal + UVP protection | 145°C thermal shutdown with 20°C hysteresis and 2.4V/2.1V UVP thresholds prevent damage during fault conditions or battery depletion |
Applications
| TFT LCD Bias Supply | Portable Display Power Management |
|---|---|
Use Scenario: Generating VGH (15–25V) and VGL (−5 to −10V) rails for active-matrix TFT LCD panels in handheld medical devices. IC Role / Device Role / Timing Role: LM3311SQX-HIOP serves as primary boost converter for VGH, LDO for AVDD, HIOP op-amp for gamma correction buffering, and GPM block for precise VGH timing synchronization with display controller. Use Value: Single-chip integration reduces component count by ≥7 discrete parts (boost IC, LDO, op-amp, GPM driver) and eliminates inter-rail timing skew. | Use Scenario: Powering dual-rail analog front-end (AFE) and digital core in battery-powered industrial handheld scanners. IC Role / Device Role / Timing Role: LM3311SQX-HIOP delivers 8.5V boost for AFE op-amps, 2.8V LDO for microcontroller I/O, HIOP op-amp for sensor signal conditioning, and GPM for synchronized LED strobe control. Use Value: 200mA op-amp output drives 100Ω load directly; 1.28MHz mode enables 1.5µH inductor, reducing solution size by 35% vs. 660kHz designs. |
| Automotive Instrument Cluster Display | Smart Wearable Display Module |
Use Scenario: Providing regulated bias voltages and timing control for TFT cluster displays in automotive dashboards (−40°C to +125°C ambient). IC Role / Device Role / Timing Role: LM3311SQX-HIOP operates as temperature-stable boost+LDO+GPM subsystem - VIN supplied from 5V buck converter, VGHM synchronized to MCU SPI-controlled VFLK signal. Use Value: Guaranteed operation across full −40°C to +125°C junction range; VFLK/VDPM thresholds remain stable over temperature (±0.1V variation). | Use Scenario: Compact power solution for round OLED smartwatch display with integrated touch controller and ambient light sensor. IC Role / Device Role / Timing Role: LM3311SQX-HIOP generates 10.5V VDD for OLED panel, 3.0V LDO for touch IC, HIOP op-amp for ALS photodiode transimpedance stage, and GPM for display refresh sync. Use Value: 24-pin WQFN (4mm × 4mm) fits tight wearable form factor; 37°C/W θJA enables full 1.2W output without heatsink in constrained airflow. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail display power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM3311SQX | Standard op-amp (±135mA), same pinout and GPM/LDO/boost functionality | Lower analog drive capability - insufficient for high-current gamma buffers or LED drivers | Select LM3311SQX-HIOP when op-amp sourcing >150mA is required; LM3311SQX suffices for low-power signal conditioning |
| TPS65136RGER | Dual-output (VPOS/VNEG) charge pump + LDO; no integrated op-amp or GPM; 16-pin QFN | Lacks timing control and analog processing - requires external op-amp and MCU-driven timing logic | Choose TPS65136RGER for cost-sensitive, space-constrained designs where GPM and HIOP op-amp are unnecessary |
Compared with LM3311SQX (standard op-amp) and TPS65136RGER (charge-pump-only), LM3311SQX-HIOP uniquely integrates high-current analog drive, programmable timing, and triple-rail generation in one 24-pin WQFN - eliminating four ICs and reducing PCB area by 42% in TFT bias designs.
Availability
LM3311SQX-HIOP is available at Aetrix Electronics and suitable for TFT LCD bias supplies, portable display power management, automotive instrument clusters, and smart wearable display modules requiring stable component supply and long-term production continuity.
Supply support for LM3311SQX-HIOP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and personal electronics markets.
The LM3311 product line targets integrated power management for TFT-LCD display systems, combining boost conversion, LDO regulation, analog signal conditioning, and display-specific timing control in a single IC.
FAQ
What is the maximum output voltage achievable with LM3311SQX-HIOP's boost converter?
The LM3311SQX-HIOP boost converter supports an adjustable output voltage up to 20V, set by the resistor divider on the FB pin with a 1.263V internal reference. This is confirmed in the datasheet's "Features" section and validated across operating conditions (−40°C to +125°C). The 20V limit ensures safe operation of internal 21V-rated SW node and maintains reliability of the 0.18Ω NMOS switch under full-load conditions.
How does the HIOP designation differentiate LM3311SQX-HIOP from other LM3311 variants?
The HIOP suffix identifies the high-output-current op-amp variant of the LM3311 family, specifying ±200mA typical sourcing/sinking capability (vs. ±135mA for standard LM3311SQX). This is explicitly documented in the "Electrical Characteristics" table under "IOUT Source (HIOP version)" and "Sink (HIOP version)", and defines the part's suitability for driving higher-current analog loads without external buffers.
Can LM3311SQX-HIOP operate without connecting the GPM-related pins (VFLK, VDPM, VGHM, etc.)?
Yes, LM3311SQX-HIOP can operate with GPM functionality disabled: tie VDPM low, connect VDD to VIN, and leave VFLK, CE, and RE unconnected. The boost converter, LDO, and HIOP op-amp remain fully functional. This configuration is supported in the datasheet's "Pin Descriptions" and "Typical Application Circuit", confirming standalone use in non-TFT applications like general-purpose multi-rail power supplies.
What thermal derating applies to LM3311SQX-HIOP at 125°C junction temperature?
At 125°C junction temperature, LM3311SQX-HIOP maintains full specification compliance per the "Operating Conditions" table, including 2A switch current limit, 660kHz/1.28MHz frequency accuracy, and 200mA op-amp output. Thermal shutdown activates only above 145°C, providing 20°C safety margin. The 37°C/W θJA rating enables sustained operation at rated load with appropriate PCB copper area and DAP grounding.
Is LM3311SQX-HIOP compatible with ceramic output capacitors on both boost and LDO outputs?
Yes, LM3311SQX-HIOP is explicitly designed for ceramic output capacitors: the LDO requires ≥2.2µF (X5R/X7R), and the boost output is stable with standard 10–22µF ceramic capacitors, as verified in the "Typical Application Circuit" and "LINEAR REGULATOR (LDO)" section. This eliminates need for larger, less reliable tantalum or electrolytic capacitors in space-constrained designs.
LM3311SQX-HIOP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Step-Up
- Output Configuration:
- Positive
- Topology:
- Boost
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 7V
- Voltage - Output (Min/Fixed):
- 1.263V
- Voltage - Output (Max):
- 20V
- Current - Output:
- 2A (Switch)
- Frequency - Switching:
- 660kHz, 1.28MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-WQFN (4x4)
LM3311SQX-HIOP FAQ
1.How can I place an order for LM3311SQX-HIOP through Aetrix?
Please submit a Request for Quotation (RFQ) for LM3311SQX-HIOP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM3311SQX-HIOP reliable?
The price and inventory of LM3311SQX-HIOP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM3311SQX-HIOP is usually 5 days.
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM3311SQX-HIOP?
For technical support, including LM3311SQX-HIOP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM3311SQX-HIOP requirements.
6.How does Aetrix verify that LM3311SQX-HIOP is sourced from the original manufacturer or authorized distributors?
All LM3311SQX-HIOP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM3311SQX-HIOP meets industry standards.
7.What is the process for return or replacement of LM3311SQX-HIOP?
All LM3311SQX-HIOP units undergo pre-shipment inspection (PSI). If there is an issue with LM3311SQX-HIOP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM3311SQX-HIOP part is unused and in its original packaging.
Return procedure for LM3311SQX-HIOP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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