Texas Instruments LM3370SD-3013/NOPB
- Part No.:
- LM3370SD-3013/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 16-WFDFN Exposed Pad
- Datasheet:
-
LM3370SD-3013/NOPB.pdf
- Description:
- IC REG BUCK 1.2V/2.5V DL 16WSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM3370SD-3013/NOPB from Texas Instruments is a dual synchronous step-down DC-DC converter optimized for ultra-low-voltage processor power domains, delivering 600 mA per channel with I²C-controlled dynamic voltage scaling (DVS), 2 MHz fixed-frequency PWM operation, and automatic PFM/PWM mode switching. It supports input range 2.7V–5.5V and provides factory-configured outputs of 1.2 V (Buck1) and 2.5 V (Buck2) - ideal for baseband and application processor core/I/O rail sequencing in portable Li-ion-powered systems.
For engineers reviewing the LM3370SD-3013/NOPB datasheet, LM3370SD-3013/NOPB pinout, LM3370SD-3013/NOPB application, or LM3370SD-3013/NOPB equivalent, key selection criteria include verified I²C register mapping for DVS, confirmed 180° out-of-phase buck timing for input ripple reduction, validated thermal performance in WSON-16 (θJA = 26°C/W), and documented spread-spectrum noise abatement capability.
Technical Context
The LM3370SD-3013/NOPB implements voltage-mode control with input-voltage feed-forward for stable line regulation across 2.7V–5.5V input, and uses internal synchronous rectification (PFET + NFET per channel) to eliminate external diode losses. Its dual-buck architecture operates 180° out-of-phase to minimize input capacitor RMS current and reduce EMI.
I²C interface (400 kHz max) enables real-time adjustment of output voltages (VOUT1: 1.0–2.0 V in 50 mV steps; VOUT2: 1.8–3.3 V in 100 mV steps), forced PWM/automatic mode selection, and spread-spectrum modulation - all without requiring external configuration resistors or jumpers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Channels | Dual independent buck regulators - enables discrete core/I/O rail control with independent enable and POR signals. |
| Max Output Current | 600 mA per channel - sufficient for modern low-power application processors and FPGA I/O banks. |
| Switching Frequency | 2.0 MHz (typ.) - allows use of compact 2.2 µH inductors and reduces size of input/output filtering components. |
| Input Voltage Range | 2.7 V to 5.5 V - compatible with single-cell Li-ion (2.7–4.2 V), 3-cell NiMH (3.6 V nominal), and fixed 3.3 V/5 V rails. |
| Fixed Output Voltages | VOUT1 = 1.2 V, VOUT2 = 2.5 V - factory-trimmed for immediate use in baseband processor core and memory interface applications. |
| I²C Interface Speed | 400 kHz - supports fast DVS transitions during CPU frequency scaling without bus contention or timing margin violations. |
| Thermal Resistance θJA | 26 °C/W (WSON-16 package) - enables >1.5 W continuous dissipation on standard 4-layer PCBs at TA = 60 °C. |
Pinout & Package
LM3370SD-3013/NOPB is packaged in a 4 mm × 5 mm × 0.8 mm, 16-lead non-pullback WSON (package code NHR0016B), with exposed thermal pad for enhanced heat transfer. Pin numbering follows standard counter-clockwise layout starting from top-left corner (Pin 1 = VIN2).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN2 | Buck2 input supply | Accepts 2.7–5.5 V; must be ≥ VDD and may differ from VIN1 for rail isolation. |
| SW2 | Buck2 switch node | Connects to 2.2 µH inductor and bootstrap capacitor; high dv/dt node requiring tight layout. |
| PGND2 | Buck2 power ground | Separate return path for Buck2 high-side/lower-FET currents; must tie to thermal pad and input cap ground. |
| VDD | Signal supply | Must be ≥ max(VIN1, VIN2); powers internal logic, POR, and I²C interface - not derived from switching nodes. |
| SGND | Signal ground | Analog reference for FB1/FB2, SDA/SCL, EN, and POR; isolated from PGND1/PGND2 to prevent noise coupling. |
| PGND1 | Buck1 power ground | Separate return for Buck1; avoids interference between buck channels' high-current paths. |
| SW1 | Buck1 switch node | Connects to Buck1 inductor; phase-shifted 180° from SW2 to reduce input ripple amplitude. |
| VIN1 | Buck1 input supply | Independent input rail - supports asymmetric input configurations (e.g., dedicated battery vs. system rail). |
| FB1 | Buck1 feedback input | Resistor-divider input for closed-loop regulation; 0.8 V reference internally - sets VOUT1 = 1.2 V by default. |
| SDA | I²C data line | Open-drain, requires 2 kΩ pull-up to VDD; supports read/write of 8-bit registers for DVS and mode control. |
| SCL | I²C clock line | Open-drain, requires 2 kΩ pull-up to VDD; 400 kHz max clock ensures <2.5 µs timing margins. |
| nPOR1 | Buck1 power-on reset | Open-drain active-low signal asserting when VOUT1 falls below 94% of target - used for processor reset coordination. |
| nPOR2 | Buck2 power-on reset | Open-drain active-low signal asserting when VOUT2 falls below 94% of target - enables independent power sequencing. |
| EN1 | Buck1 enable | Active-high logic input; controls startup timing and supports staggered enable for inrush current management. |
| EN2 | Buck2 enable | Active-high logic input; allows independent channel disable for dynamic power gating. |
| FB2 | Buck2 feedback input | Resistor-divider input; 0.8 V reference - sets VOUT2 = 2.5 V by default; adjustable via I²C or external resistor network. |
Key Features
| Feature | Design Value |
|---|---|
| Dynamic Voltage Scaling (DVS) | I²C-programmable VOUT1 (1.0–2.0 V, 50 mV steps) and VOUT2 (1.8–3.3 V, 100 mV steps) - enables real-time CPU DVFS without hardware changes. |
| 180° Out-of-Phase Operation | Reduces input capacitor RMS current by ~30% versus in-phase dual bucks - lowers required CIN rating and EMI filter size. |
| Spread-Spectrum Modulation | I²C-enabled frequency dithering ±10% around 2 MHz - suppresses narrowband EMI peaks without sacrificing regulation accuracy. |
| Auto PFM/PWM Mode Switching | Seamless transition at ~70 mA load per channel - maintains >85% efficiency down to 100 µA load while drawing only 34 µA quiescent current. |
| Independent Power-On Reset | Dedicated nPOR1/nPOR2 open-drain outputs with 94% threshold - supports safe processor boot sequence and fault detection per rail. |
| Internal Soft-Start | Programmed 1.5 ms ramp time - limits inrush current during EN assertion, eliminating need for external soft-start circuitry. |
Applications
| Baseband Processor Core Power | Application Processor I/O Rail |
|---|---|
|
Use Scenario: Powers ARM-based baseband ICs (e.g., Qualcomm MDM series) requiring dynamically scaled core voltage (1.0–1.4 V) during sleep/active modes. IC Role / Device Role / Timing Role: Dual-buck regulator providing independently sequenced, I²C-adjustable Vcore and Vmem rails with synchronized 180° switching. Use Value: Enables >40% reduction in active-mode power vs. fixed-output LDOs while maintaining sub-10 mV output ripple under 600 mA transient load. |
Use Scenario: Supplies configurable I/O voltage (1.8–3.3 V) to application processors interfacing with LPDDR2/3, eMMC, and display interfaces. IC Role / Device Role / Timing Role: Secondary buck channel delivering stable, low-noise I/O rail with programmable POR delay and spread-spectrum EMI suppression. Use Value: Eliminates need for discrete level shifters and reduces board area by 35% compared to dual-single-channel converters. |
| FPGA Configuration & I/O Banks | Portable Audio SoC Power |
|
Use Scenario: Powers Spartan-7 or iCE40 FPGA core (1.2 V) and bank-selectable I/O (1.8/2.5/3.3 V) in handheld test equipment. IC Role / Device Role / Timing Role: Dual-channel converter with independent EN1/EN2 and nPOR1/nPOR2 for safe configuration sequence and bank isolation. Use Value: Guarantees <50 µs POR assertion delay matching FPGA configuration timing requirements and prevents latch-up during hot-plug events. |
Use Scenario: Supplies DSP core (1.2 V) and audio codec interface (2.5 V) in Bluetooth headphones with battery life optimization. IC Role / Device Role / Timing Role: Ultra-low-IQ PFM mode (34 µA total) extends standby time; I²C DVS adapts voltage to codec operating mode (play/rec). Use Value: Achieves 22-hour playback runtime on 120 mAh cell by reducing no-load power by 6× versus legacy buck+LDO solutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62400DRVR | Fixed 1.2 V / 2.5 V outputs; no I²C interface; 3 MHz switching frequency; 1.2 A per channel. | Lacks dynamic voltage scaling - suitable only for static-rail applications like fixed-function peripherals. | Select when higher current (>600 mA) and smaller inductors are needed, and DVS is unnecessary. |
| RTQ2132B-QA | Automotive-grade AEC-Q100; I²C-compatible; 1.2 V / 2.5 V default; 2.5 MHz switching; integrated FETs rated for 1.5 A. | Qualified for automotive cabin electronics (−40°C to +125°C); includes watchdog timer and fault reporting registers. | Choose for infotainment or ADAS modules requiring extended temperature range and functional safety features. |
Compared with LM3370SD-3013/NOPB, TPS62400DRVR offers higher current and frequency but forfeits DVS flexibility, while RTQ2132B-QA adds automotive qualification and fault diagnostics at the cost of larger footprint and higher unit price - making LM3370SD-3013/NOPB optimal for cost-sensitive, space-constrained consumer portable designs requiring real-time voltage adaptation.
Availability
LM3370SD-3013/NOPB is available at Aetrix Electronics and suitable for portable computing, wireless communications, and embedded audio applications requiring stable component supply, consistent parametric performance, and long-term production continuity.
Supply support for LM3370SD-3013/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC-DC conversion for battery-powered systems.
The LM3370SD-3013/NOPB belongs to TI's portable power management portfolio, designed specifically for dynamic voltage scaling in ultra-low-power mobile processors, enabling energy-efficient operation across varying computational loads.
FAQ
What are the default output voltages configured for LM3370SD-3013/NOPB?
The LM3370SD-3013/NOPB is factory-configured with VOUT1 = 1.2 V and VOUT2 = 2.5 V, achieved via internal resistor-divider trimming. These values are set at wafer test and cannot be altered by external feedback resistors alone - I²C commands are required to adjust them within the supported ranges (1.0–2.0 V and 1.8–3.3 V respectively). The LM3370SD-3013/NOPB maintains these defaults at power-up unless reprogrammed via its I²C interface.
Does LM3370SD-3013/NOPB support true 100% duty-cycle operation for low-dropout mode?
Yes, the LM3370SD-3013/NOPB supports 100% duty-cycle operation where the PFET remains fully on and the NFET is off, enabling LDO-like regulation when input voltage approaches the output level. This mode activates automatically when required by load and input conditions, with minimum input voltage calculated as VIN,MIN = ILOAD × (RDS_ON,PFET + RINDUCTOR) + VOUT. The LM3370SD-3013/NOPB sustains regulation down to VIN = VOUT + 100 mV under light loads.
How does the 180° out-of-phase timing between Buck1 and Buck2 benefit system design?
The 180° phase offset between LM3370SD-3013/NOPB's two buck channels reduces input capacitor RMS current by approximately 30% compared to in-phase operation, allowing smaller CIN (4.7 µF) and lower ESR ratings. This directly lowers conducted EMI, eases input filtering requirements, and improves overall power stage efficiency - especially critical in space-constrained portable devices. The LM3370SD-3013/NOPB implements this timing inherently; no external synchronization is needed.
Can LM3370SD-3013/NOPB operate with only one output enabled?
Yes, LM3370SD-3013/NOPB supports independent channel control: EN1 and EN2 are separate logic inputs, allowing Buck1 or Buck2 to be disabled while the other remains active. When one channel is disabled, its associated nPOR output goes high-impedance, and its quiescent current drops to ≤3 µA. The enabled channel continues full regulation, including PFM/PWM auto-switching and I²C accessibility - making LM3370SD-3013/NOPB suitable for partial-power-down system states.
What thermal performance can be expected from LM3370SD-3013/NOPB in the WSON-16 package?
In the WSON-16 package (NHR0016B), LM3370SD-3013/NOPB achieves θJA = 26°C/W on a standard 4-layer FR-4 PCB with thermal vias under the exposed pad. At TA = 60°C, it supports up to 1.538 W total power dissipation before thermal shutdown (TJ = 150°C). Derating is required above 60°C ambient; at TA = 85°C, maximum usable power drops to ~800 mW. The LM3370SD-3013/NOPB includes internal thermal shutdown that disengages at TJ = 140°C, ensuring robust reliability.
LM3370SD-3013/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.2V, 2.5V
- Voltage - Output (Max):
- -
- Current - Output:
- 600mA
- Frequency - Switching:
- 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -30°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-WSON (5x4)
LM3370SD-3013/NOPB FAQ
1.How can I place an order for LM3370SD-3013/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM3370SD-3013/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM3370SD-3013/NOPB reliable?
The price and inventory of LM3370SD-3013/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM3370SD-3013/NOPB is usually 5 days.
3.What payment methods are accepted for LM3370SD-3013/NOPB?
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LM3370SD-3013/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM3370SD-3013/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM3370SD-3013/NOPB?
For technical support, including LM3370SD-3013/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM3370SD-3013/NOPB requirements.
6.How does Aetrix verify that LM3370SD-3013/NOPB is sourced from the original manufacturer or authorized distributors?
All LM3370SD-3013/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM3370SD-3013/NOPB meets industry standards.
7.What is the process for return or replacement of LM3370SD-3013/NOPB?
All LM3370SD-3013/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM3370SD-3013/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM3370SD-3013/NOPB part is unused and in its original packaging.
Return procedure for LM3370SD-3013/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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