Texas Instruments LM361N/NOPB
- Part No.:
- LM361N/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Comparators
- Package:
- 14-DIP (0.300", 7.62mm)
- Datasheet:
-
LM361N/NOPB.pdf
- Description:
- IC COMPARATOR 2 DIFF 14DIP
- Quantity:
- Payment:

- Shipping:

Inventory:900
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LM361N/NOPB from Texas Instruments is a high-speed differential comparator with complementary TTL outputs, ±15V dual-supply operation, 20 ns max propagation delay, and tight 5 ns max output skew-designed for zero-crossing detection in disk file systems and high-speed analog-to-digital converter front-ends.
For engineers reviewing the LM361N/NOPB datasheet, LM361N/NOPB pinout, LM361N/NOPB application, or LM361N/NOPB equivalent, key selection criteria include guaranteed 20 ns timing performance across 0°C to +70°C, independent strobe control, low 1 mV typical input offset voltage, and PDIP-14 package compatibility with legacy through-hole layouts.
Technical Context
The LM361N/NOPB implements a fully differential input stage with separate strobe-enabled output control logic, enabling precise timing synchronization in high-speed sampling systems. Its complementary TTL outputs drive fanout-1 loads with matched propagation delays (tpd(0)/tpd(1) ≤ 20 ns) and sub-5 ns inter-output skew.
It operates from split supplies (±15 V) and a dedicated 5 V TTL logic supply (VCC), supporting independent enable/disable via the strobe pin-drawing −1.6 mA when disabled and 200 μA when enabled-while maintaining stable performance over its full 0°C to +70°C industrial temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Propagation Delay | 20 ns max (tpd(0)/tpd(1)) ensures deterministic timing in ADC sampling clocks and pulse-width discriminators. |
| Output Skew | 5 ns max between complementary outputs enables accurate edge-aligned signal generation without external deskew circuitry. |
| Input Offset Voltage | 1 mV typical (5 mV max) supports reliable detection of small differential signals near zero-crossing points. |
| Supply Range | ±15 V analog supplies + 4.75–5.25 V TTL logic supply allows integration into mixed-signal systems with op-amp rails. |
| Strobe Control | Active-low strobe pin disables outputs with −1.6 mA sink current, enabling synchronized gating in time-multiplexed systems. |
| Operating Temperature | 0°C to +70°C ambient range confirms suitability for commercial-grade embedded storage and instrumentation applications. |
| Package | PDIP-14 (N package) with 0.300″ wide body and through-hole mounting-compatible with legacy PCB tooling and manual assembly. |
Pinout & Package
LM361N/NOPB uses a 14-pin plastic dual in-line package (PDIP-N), 0.300″ wide, with standard DIP pin spacing (0.100″). Pin 1 is marked by a notch or dot at the top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Inverting Input (−) | Differential input terminal; referenced to common-mode range of ±6 V with respect to V−. |
| 2 | Non-Inverting Input (+) | Differential input terminal; accepts fast-rising/falling analog signals up to ±5 V differential swing. |
| 3 | Strobe Input | Active-low enable: pulls output low when driven <0.8 V; draws −1.6 mA to disable both outputs. |
| 4 | V− (Negative Supply) | Analog negative rail connection; rated −16 V absolute max; typically −15 V for symmetric operation. |
| 5 | Output B (Complementary) | TTL-compatible low-side output; sinks 6.4 mA at 0.4 V max for driving standard logic loads. |
| 6 | Output A (True) | TTL-compatible low-side output; complements Output B with ≤5 ns skew for balanced edge generation. |
| 7 | GND | Logic ground reference for VCC; isolated from analog ground but tied internally to substrate. |
| 8 | VCC (TTL Logic Supply) | +5 V logic rail (4.75–5.25 V); powers output stage and strobe interface independently of analog supplies. |
| 9 | V+ (Positive Supply) | Analog positive rail connection; rated +16 V absolute max; typically +15 V for symmetric operation. |
| 10 | Compensation | Internal compensation node; no external connection required-device is unity-gain stable. |
| 11 | Offset Null | Adjustment terminal for fine-tuning input offset; connected to external potentiometer (10 kΩ) between Pins 11 and 12. |
| 12 | Offset Null | Second offset null terminal; used with Pin 11 for trimming input offset voltage to <0.5 mV. |
| 13 | NC | No internal connection; left unconnected per TI datasheet guidance. |
| 14 | NC | No internal connection; left unconnected per TI datasheet guidance. |
Key Features
| Feature | Design Value |
|---|---|
| Independent strobe control | Enables synchronous output gating without affecting analog input path-critical for time-division multiplexed comparators. |
| Tight delay matching | ≤5 ns skew between complementary outputs eliminates need for external delay calibration in edge-sensitive circuits. |
| Low input offset voltage | 1 mV typical offset supports accurate zero-crossing detection in precision motor commutation and phase-locked loops. |
| Operates from op amp supplies | ±15 V dual analog rails allow direct interfacing with legacy op-amp signal chains without level-shifting circuitry. |
| Complementary TTL outputs | True/complement pair drives standard 74LS logic directly-reducing component count in digital sampling and latch interfaces. |
Applications
| Disk Drive Zero-Crossing Detection | High-Speed ADC Front-End |
|---|---|
|
Use Scenario: Detecting magnetic flux reversals in read/write heads of hard disk drives to generate timing references for sector synchronization. IC Role / Device Role / Timing Role: Differential comparator converting analog head signal into clean, skew-matched TTL edges aligned to zero crossings. Use Value: 20 ns propagation delay and ≤5 ns output skew ensure precise sampling window placement relative to rotating platter position. |
Use Scenario: Converting analog sensor outputs (e.g., high-bandwidth accelerometers or RF envelope detectors) into digital decision levels prior to flash ADC sampling. IC Role / Device Role / Timing Role: High-speed threshold detector providing strobed, jitter-minimized decision signals to ADC sample-and-hold control logic. Use Value: Independent strobe input allows external clock-synchronized latching, preventing metastability in multi-channel acquisition systems. |
| Motor Commutation Timing | Phase-Locked Loop Edge Discriminator |
|
Use Scenario: Monitoring back-EMF zero crossings in brushless DC motors to determine rotor position for electronic commutation. IC Role / Device Role / Timing Role: Precision differential comparator detecting polarity reversals in motor winding voltages with minimal delay variation. Use Value: Low 1 mV typical input offset and stable 20 ns delay across temperature reduce commutation timing error to <1° electrical. |
Use Scenario: Extracting clean reference edges from noisy VCO outputs in PLL-based clock recovery circuits for serial data links. IC Role / Device Role / Timing Role: Noise-immune differential comparator generating jitter-controlled edges for phase-frequency detector inputs. Use Value: Tight 5 ns max output skew preserves phase relationship between reference and feedback paths, improving loop stability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed differential comparator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM361M/NOPB | Same electrical specs but SOIC-14 surface-mount package; no through-hole mounting capability. | Suitable for automated SMT production but requires PCB redesign versus LM361N/NOPB's PDIP footprint. | Select LM361M/NOPB only if board space constraints or assembly process mandate surface-mount packaging. |
| LM161H/NOPB | Military-grade version with −55°C to +125°C operating range; otherwise identical AC/DC specs and pinout. | Required for aerospace or extended-temperature industrial deployments where LM361N/NOPB's 0°C–70°C range is insufficient. | Choose LM161H/NOPB when environmental qualification beyond commercial temperature limits is mandatory. |
Compared with LM361M/NOPB and LM161H/NOPB, the LM361N/NOPB provides identical high-speed comparator functionality in a through-hole PDIP-14 package optimized for prototyping, repair, and legacy system upgrades-without requiring layout changes or extended-temperature certification.
Availability
LM361N/NOPB is available at Aetrix Electronics and suitable for disk drive controllers, high-speed data acquisition systems, and motor control electronics requiring stable component supply and long-term obsolescence management.
Supply support for LM361N/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with emphasis on reliability, longevity, and industrial-grade performance.
The LM361 series belongs to TI's legacy high-speed comparator product line, engineered specifically for precision timing-critical applications including zero-crossing detection, ADC interfacing, and motor control-where deterministic nanosecond-scale response is essential.
FAQ
What is the maximum operating supply voltage for LM361N/NOPB?
The LM361N/NOPB supports a maximum positive supply voltage (V+) of +16 V and a maximum negative supply voltage (V−) of −16 V, with a dedicated TTL logic supply (VCC) rated up to +7 V. For reliable operation, TI specifies ±15 V analog supplies and 4.75–5.25 V for VCC. Exceeding these limits risks permanent damage per the Absolute Maximum Ratings table in the SNOSBJ5C datasheet.
Does LM361N/NOPB support independent output disabling via the strobe pin?
Yes, the LM361N/NOPB features an active-low strobe input (Pin 3) that fully disables both complementary TTL outputs when pulled below 0.8 V. In this state, the outputs go low and draw −1.6 mA from the strobe pin-enabling synchronized blanking in time-multiplexed systems without affecting the analog input stage or propagation delay characteristics of the LM361N/NOPB.
What is the purpose of Pins 11 and 12 on LM361N/NOPB?
Pins 11 and 12 on the LM361N/NOPB are offset null terminals used to minimize input offset voltage via an external 10 kΩ potentiometer. Connecting the potentiometer wiper to Pin 11 and its ends to Pins 11 and 12 allows trimming the LM361N/NOPB's input offset to under 0.5 mV-critical for precision zero-crossing detection where even small offsets cause timing errors.
Is LM361N/NOPB pin-compatible with older NE529 or SE529 comparators?
Yes, the LM361N/NOPB is explicitly specified as a pin-for-pin replacement for the SE529 and NE529 high-speed comparators. It retains identical PDIP-14 pinout, supply connections, and output configuration while improving speed (20 ns vs. ~25 ns), reducing input offset voltage, and tightening output skew-making it a direct drop-in upgrade for legacy designs using those parts.
What does "NOPB" signify in the LM361N/NOPB part number?
"NOPB" in LM361N/NOPB indicates "No Lead (Pb)-Free" - confirming the device meets RoHS Directive 2011/65/EU requirements with lead-free terminations (NIPDAU finish) and halogen-free packaging. This designation applies to the PDIP-14 package variant and is verified in TI's official PACKAGE OPTION ADDENDUM, where LM361N/NOPB is listed as RoHS-compliant and active for production.
LM361N/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 14-DIP (0.300", 7.62mm)
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Type:
- Differential
- Number of Elements:
- 2
- Output Type:
- Complementary, TTL
- Voltage - Supply, Single/Dual (±):
- ±5V ~ 15V
- :
- 5mV @ 5V
- Voltage - Input Offset (Max):
- 10µA @ 5V
- Current - Input Bias (Max):
- -
- Current - Output (Typ):
- 5mA, 10mA, 20mA
- Current - Quiescent (Max):
- -
- CMRR, PSRR (Typ):
- 20ns
- Propagation Delay (Max):
- -
- Hysteresis:
- 0°C ~ 70°C
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- Through Hole
- :
- 14-PDIP
LM361N/NOPB FAQ
1.How can I place an order for LM361N/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM361N/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM361N/NOPB reliable?
The price and inventory of LM361N/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM361N/NOPB is usually 5 days.
3.What payment methods are accepted for LM361N/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM361N/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM361N/NOPB?
LM361N/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM361N/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM361N/NOPB?
For technical support, including LM361N/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM361N/NOPB requirements.
6.How does Aetrix verify that LM361N/NOPB is sourced from the original manufacturer or authorized distributors?
All LM361N/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM361N/NOPB meets industry standards.
7.What is the process for return or replacement of LM361N/NOPB?
All LM361N/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM361N/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM361N/NOPB part is unused and in its original packaging.
Return procedure for LM361N/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LM361N/NOPB Tags

-
LM2903DR
Texas Instruments
-
LM339DR
Texas Instruments

-
LM339PWR
Texas Instruments

-
LM393DT
STMicroelectronics

-
LM2901PWR
Texas Instruments

-
LM2903DT
STMicroelectronics

-
LM393DR
Texas Instruments
-
LM239DR
Texas Instruments

-
LM339APWR
Texas Instruments

-
LM2903P
Texas Instruments

-
LM393ADR
Texas Instruments

-
NCX2200GMAZ
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

