Texas Instruments LM3686TLX-AADW/NOPB
- Part No.:
- LM3686TLX-AADW/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 12-WFBGA
- Datasheet:
-
LM3686TLX-AADW/NOPB.pdf
- Description:
- IC REG TRPL BCK/LNR SYNC 12DSBGA
- Quantity:
- Payment:

- Shipping:

Inventory:3,979
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LM3686TLX-AADW/NOPB from Texas Instruments is a highly integrated power management IC combining a synchronous step-down DC-DC converter, a low-input linear regulator (LILO), and an ultra-low-noise LDO in a single 12-pin DSBGA package. It delivers three regulated outputs - VOUT_DCDC (1.2–2.5 V, up to 600 mA), VOUT_LILO (0.7–2.0 V, up to 350 mA), and VOUT_LDO (1.5–3.3 V, up to 300 mA) - with 3 MHz fixed-frequency PWM operation, automatic PFM/PWM mode switching, and <2.5 µA shutdown current. It powers core logic and analog rails in space-constrained portable electronics such as mobile TVs and PDAs.
For engineers reviewing the LM3686TLX-AADW/NOPB datasheet, LM3686TLX-AADW/NOPB pinout, LM3686TLX-AADW/NOPB application, or LM3686TLX-AADW/NOPB equivalent, key selection considerations include its triple-output architecture, independent enable control per rail (EN_DCDC/EN_LILO/EN_LDO), 2.7–5.5 V input range compatible with single Li-ion cells, 166 µVRMS LILO output noise, and 6.7 µVRMS LDO output noise - all critical for noise-sensitive RF and high-speed digital subsystems.
Technical Context
The LM3686TLX-AADW/NOPB integrates three independent regulation stages: a voltage-mode synchronous buck converter with internal 350 mΩ PFET and 150 mΩ NFET, a post-regulated LILO stage optimized for ultra-low noise and fast transient response (<±30 mV load step), and a standalone LDO with 85 dB PSRR at 1 kHz. All three outputs share global thermal shutdown (150°C) and undervoltage lockout (2.65 V turn-on).
Its functional architecture supports flexible power sequencing via three dedicated enable pins - EN_DCDC controls the buck, EN_LILO enables the LILO (which can operate from VBATT directly or from VOUT_DCDC), and EN_LDO activates the low-noise LDO. The device transitions automatically between PWM (≥70 mA load) and hysteretic PFM (≤70 mA) modes to maintain efficiency across load ranges while delivering 28 µA quiescent current in light-load PFM mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports direct connection to single Li-ion or 3-cell NiMH/NiCd batteries without external pre-regulation. |
| DC-DC Output Range | 1.2 V to 2.5 V - programmable via external feedback divider; typical 1.8 V output used for core logic rails. |
| LILO Output Range | 0.7 V to 2.0 V - digitally selectable in 50-mV steps; optimized for low-voltage I/O and memory interfaces. |
| LDO Output Range | 1.5 V to 3.3 V - independently adjustable; delivers ultra-low-noise supply for RF transceivers and ADCs. |
| Switching Frequency | 3 MHz (typical) - enables use of tiny 0603/0402 ceramic capacitors and sub-1 µH inductors for minimal PCB footprint. |
| Shutdown Current | 2.5 µA (typical) - ensures battery longevity during system sleep states in portable devices. |
| Output Noise (LDO) | 6.7 µVRMS (10 Hz–100 kHz) - meets stringent noise requirements for sensitive analog signal chains. |
| PSRR (LDO @ 1 kHz) | 85 dB - suppresses switching ripple from upstream DC-DC or noisy battery sources before reaching analog loads. |
Pinout & Package
LM3686TLX-AADW/NOPB is housed in a 12-pin DSBGA (YZR) package measuring 2.435 mm × 1.687 mm with 0.4 mm pitch. The package uses bottom-side ball terminations and requires standard wafer-level chip-scale assembly practices per AN-1112.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VBATT | Power Input | Main input supply for DC-DC switcher; must be decoupled with ≥4.7 µF ceramic capacitor. |
| SW | Switch Node | Connection to internal PFET drain and NFET source; drives external inductor and catch diode (synchronous rectification). |
| PGND | Power Ground | High-current return path for DC-DC switching loop; must be routed separately from quiet ground planes. |
| QGND | Quiet Ground | Dedicated low-noise reference ground for LDO and LILO error amplifiers; isolated from PGND to minimize coupling. |
| FB_DCDC | Feedback Input | Analog input for DC-DC output voltage sensing; connects to resistor divider from VOUT_DCDC to set regulated output. |
| EN_DCDC | Enable Input | Active-high logic control (VIH ≥1.1 V) for DC-DC stage; floating not allowed - tie to VBATT or MCU GPIO. |
| EN_LILO | Enable Input | Independent enable for LILO stage; allows post-regulation only when DC-DC is off (up to 50 mA) or on (up to 350 mA). |
| EN_LDO | Enable Input | Separate enable for ultra-low-noise LDO; operates from VIN_LDO (tied to VBATT) regardless of DC-DC status. |
| VIN_LDO | LDO Input | Direct connection to VBATT required for internal biasing; no external filtering needed beyond input decoupling. |
| VOUT_LDO | LDO Output | Regulated low-noise output (1.5–3.3 V); supplies noise-critical analog circuits with 6.7 µVRMS noise floor. |
| VOUT_LILO | LILO Output | Low-input, low-noise output (0.7–2.0 V); supports dynamic voltage scaling for processors and memory I/O. |
| VIN_LILO | LILO Input | Accepts either VBATT (standalone mode) or VOUT_DCDC (post-regulation mode); determines LILO current capability. |
Key Features
| Feature | Design Value |
|---|---|
| Triple-output architecture | Single-chip solution replaces three discrete regulators - reduces BOM count, layout area, and design validation effort. |
| Independent enable control | Three dedicated EN pins allow precise power sequencing and dynamic rail activation - essential for multi-core SoC boot-up and sleep/wake cycles. |
| Automatic PFM/PWM mode switching | Maintains >85% efficiency from 1 mA to full load without firmware intervention - extends battery life in always-on portable applications. |
| Ultra-low-noise LDO | 6.7 µVRMS output noise and 85 dB PSRR at 1 kHz enable clean power delivery to RF front-ends and precision ADCs. |
| Post-regulated LILO stage | Supports 350 mA from DC-DC output or 50 mA directly from VBATT - provides flexible voltage scaling for memory and I/O domains. |
| Thermal and protection circuitry | Integrated overtemperature shutdown (150°C), current limiting (1.22 A peak), and UVLO (2.65 V start) ensure robust operation in uncontrolled environments. |
Applications
| Mobile TV Power Management | Handheld Radio RF Subsystem |
|---|---|
|
Use Scenario: Powers baseband processor, display driver, and audio codec from a single Li-ion cell in compact handheld TV units. IC Role / Device Role / Timing Role: LM3686TLX-AADW/NOPB delivers three synchronized, low-noise rails: 1.8 V for CPU core, 1.2 V for DDR I/O, and 2.8 V for audio DAC - all with independent enable sequencing. Use Value: Eliminates need for external discrete regulators and reduces total solution size to 15.66 mm² - critical for sub-5-inch form factors. |
Use Scenario: Supplies clean, sequenced power to RF transceiver, IF amplifier, and crystal oscillator in battery-powered handheld radios. IC Role / Device Role / Timing Role: LM3686TLX-AADW/NOPB provides 2.8 V LDO output (6.7 µVRMS) for RF synth and 1.2 V LILO output (<±30 mV transient) for baseband logic. Use Value: Achieves >85 dB carrier suppression by rejecting DC-DC switching noise - directly improving receiver sensitivity and adjacent channel rejection. |
| PDA Application Processor Core | Portable Instrument Sensor Interface |
|
Use Scenario: Powers ARM-based application processor with dynamic voltage/frequency scaling (DVFS) in palm-top PCs. IC Role / Device Role / Timing Role: LM3686TLX-AADW/NOPB's LILO output (0.7–2.0 V, 50-mV steps) adjusts core voltage in real time; DC-DC supplies intermediate rail; LDO powers PLL. Use Value: Enables fine-grained DVFS without external DAC or PMIC firmware - reducing software complexity and boot latency. |
Use Scenario: Delivers stable, low-noise bias to precision op-amps, sigma-delta ADCs, and MEMS sensors in handheld test equipment. IC Role / Device Role / Timing Role: LM3686TLX-AADW/NOPB's LDO output (2.5 V, 6.7 µVRMS) powers ADC reference and analog front-end; LILO (1.8 V) supplies digital interface. Use Value: Maintains 16-bit effective resolution by limiting power-supply-induced noise contribution to <0.5 LSB - verified per TI SNVS520F test data. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65132A1YFFT | Single-inductor dual-output (SIMO) architecture; delivers only two rails (not three); lacks dedicated ultra-low-noise LDO stage. | Suitable for simpler dual-rail systems (e.g., LCD bias + core); cannot replace LM3686TLX-AADW/NOPB where independent LDO noise performance is required. | Select when board space is extremely constrained and only two regulated outputs are needed - but verify PSRR and noise specs against RF/analog load requirements. |
| TPS62742DSSR | Single-output buck with integrated LDO; supports only one post-regulated rail (not dual LILO+LDO); max LDO output 300 mA at 1.8 V only. | Applicable for basic microcontroller + sensor nodes; does not support simultaneous LILO+LDO operation or independent enable sequencing. | Choose for cost-sensitive, low-complexity designs where triple-rail flexibility and noise isolation are not mandatory. |
Compared with TPS65132A1YFFT and TPS62742DSSR, LM3686TLX-AADW/NOPB uniquely provides three independently enabled, functionally distinct outputs - including a dedicated ultra-low-noise LDO and a post-regulated LILO - enabling higher integration density and superior noise isolation in advanced portable systems.
Availability
LM3686TLX-AADW/NOPB is available at Aetrix Electronics and suitable for mobile TV power management, handheld radio RF subsystems, PDA application processor core supplies, portable instrument sensor interfaces, and battery-powered portable instrumentation requiring stable component supply across extended production lifecycles.
Supply support for LM3686TLX-AADW/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management IC design for portable and industrial applications.
The LM3686TLX-AADW/NOPB belongs to TI's portable power management product line, engineered specifically to consolidate multiple voltage rails into a single chip for space- and noise-constrained battery-powered devices like PDAs, mobile TVs, and handheld radios.
FAQ
What is the maximum output current capability of each rail in LM3686TLX-AADW/NOPB?
The LM3686TLX-AADW/NOPB supports up to 600 mA from its DC-DC converter (when not powering LILO), up to 350 mA from the LILO regulator (when enabled with EN_LILO and powered from VOUT_DCDC), and up to 300 mA from the LDO regulator. These values are confirmed in Section 7.7 and 7.6 of the SNVS520F datasheet under recommended operating conditions and thermal limits.
Does LM3686TLX-AADW/NOPB support independent power sequencing between its three outputs?
Yes. LM3686TLX-AADW/NOPB features three dedicated enable inputs - EN_DCDC, EN_LILO, and EN_LDO - allowing full independence in turn-on/off timing. For example, the LDO can be activated before the DC-DC to power bias circuits, or the LILO can be enabled alone during low-power standby. This is explicitly documented in the "Pin Functions" table (Section 6) and "Description (Continued)" (Section 5).
What is the output noise specification for the LDO rail of LM3686TLX-AADW/NOPB?
The LDO output noise of LM3686TLX-AADW/NOPB is specified as 6.7 µVRMS over a 10 Hz to 100 kHz bandwidth, measured at VIN_LDO = 3.6 V and IOUT = 200 mA. This value is listed in Table 7.6 "Electrical Characteristics: Linear Regulator – LDO" under the parameter eN_LDO and is critical for powering RF synthesizers and high-resolution ADCs.
Can LM3686TLX-AADW/NOPB operate from a single-cell Li-ion battery?
Yes. LM3686TLX-AADW/NOPB is explicitly designed for single Li-ion (2.7–4.2 V) and 3-cell NiMH/NiCd (2.7–4.5 V) inputs. Its 2.7 V minimum input voltage, undervoltage lockout (2.65 V turn-on), and ability to regulate down to 0.7 V on the LILO rail make it ideal for deep-discharge portable applications - as stated in the "Features" and "Description" sections of SNVS520F.
What package type and dimensions does LM3686TLX-AADW/NOPB use?
LM3686TLX-AADW/NOPB uses a 12-pin DSBGA (YZR) package with nominal body size 2.435 mm × 1.687 mm and 0.4 mm ball pitch. This wafer-level chip-scale package is detailed in the "Device Information" table (page 2) and "Mechanical, Packaging, and Orderable Information" (Section 13) of the SNVS520F datasheet.
LM3686TLX-AADW/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 12-WFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (2)
- Number of Outputs:
- 3
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- 1.8V, 600mA
- Voltage/Current - Output 2:
- 1.2V, 350mA
- Voltage/Current - Output 3:
- 2.8V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 12-DSBGA
LM3686TLX-AADW/NOPB FAQ
1.How can I place an order for LM3686TLX-AADW/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM3686TLX-AADW/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM3686TLX-AADW/NOPB reliable?
The price and inventory of LM3686TLX-AADW/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM3686TLX-AADW/NOPB is usually 5 days.
3.What payment methods are accepted for LM3686TLX-AADW/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM3686TLX-AADW/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM3686TLX-AADW/NOPB?
LM3686TLX-AADW/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM3686TLX-AADW/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM3686TLX-AADW/NOPB?
For technical support, including LM3686TLX-AADW/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM3686TLX-AADW/NOPB requirements.
6.How does Aetrix verify that LM3686TLX-AADW/NOPB is sourced from the original manufacturer or authorized distributors?
All LM3686TLX-AADW/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM3686TLX-AADW/NOPB meets industry standards.
7.What is the process for return or replacement of LM3686TLX-AADW/NOPB?
All LM3686TLX-AADW/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM3686TLX-AADW/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM3686TLX-AADW/NOPB part is unused and in its original packaging.
Return procedure for LM3686TLX-AADW/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LM3686TLX-AADW/NOPB Tags

-
TPS6521905RHBR
Texas Instruments

-
MIC3385YHL-TR
Microchip Technology

-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments

-
A4402KLPTR-T
Allegro MicroSystems

-
BD71847AMWV-E2
ROHM Semiconductor

-
ADP5040ACPZ-1-R7
Analog Devices Inc.

-
LT3048IDC#TRPBF
Analog Devices Inc.

-
ADP5037ACPZ-R7
Analog Devices Inc.

-
XRP7714ILB-F
MaxLinear, Inc.

-
LTC3260EDE#TRPBF
Analog Devices Inc.

-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

