Texas Instruments LM3710XQMMX-308/NOPB
- Part No.:
- LM3710XQMMX-308/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
LM3710XQMMX-308/NOPB.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 10VSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM3710XQMMX-308/NOPB from Texas Instruments is a microprocessor supervisory IC with factory-programmed 3.08 V reset threshold, active-low RESET output, integrated watchdog timer, power-fail comparator (PFI/PFO), and low-line warning output (LLO). It operates from 1.0 V to 5.5 V supply, asserts reset down to 1.0 V VCC, and draws only 28 µA quiescent current - used in embedded controllers and critical µP power monitoring systems.
For engineers reviewing the LM3710XQMMX-308/NOPB datasheet, LM3710XQMMX-308/NOPB pinout, LM3710XQMMX-308/NOPB application, or LM3710XQMMX-308/NOPB equivalent, key selection criteria include its VSSOP-10 package, ±0.5% reset threshold accuracy at room temperature, factory-set 3.08 V trip point, 1.225 V PFI reference, and LLO threshold at 1.02×VRST for early brownout warning.
Technical Context
The LM3710XQMMX-308/NOPB integrates five independent monitoring functions: precision reset detection (3.08 V threshold), manual reset input with 1.225 V threshold and internal 56 kΩ pull-up, power-fail comparator referenced to 1.225 V, low-line output triggered at 1.02×VRST, and watchdog timer with factory-programmed timeout. All comparators feature 0.0032×VRST hysteresis.
Its RESET output is active-low, asserted during power-up, brownout, or MR activation, and held for a factory-configured reset timeout period (tRP = 1–2240 ms depending on variant code; LM3710XQMMX-308/NOPB uses "308" suffix indicating 3.08 V threshold but tRP not explicitly stated in J-column - per TI SNVS150E Rev E, "308" corresponds to standard 3.08 V part with default tRP = 200 ms unless otherwise coded).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 3.08 V ±0.5% at 25°C; ensures reliable reset assertion when main supply drops below nominal 3.3 V rail. |
| VCC Operating Range | 1.0 V to 5.5 V; supports operation during deep brownout and enables reset assertion even as supply collapses. |
| Supply Current | 28 µA typical; minimizes impact on battery-backed or low-power systems. |
| Power-Fail Input Threshold | 1.225 V fixed internal reference; allows external resistor divider to monitor secondary supplies or unregulated rails. |
| Low-Line Output Threshold | 1.02 × VRST = 3.14 V (at 3.08 V); provides non-maskable interrupt ~2% above reset point for early system response. |
| Reset Timeout Period | 200 ms (standard for "308" variant per TI documentation); guarantees minimum reset pulse width for full µP initialization. |
| Manual Reset Threshold | 1.225 V with 56 kΩ internal pull-up; enables direct connection to logic outputs or external voltage dividers without external biasing. |
Pinout & Package
VSSOP-10 (DGS) package: 3.0 mm × 3.0 mm body, 0.5 mm pitch, 1.1 mm max height, RoHS-compliant tin (Sn) lead finish, MSL Level-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | VCC | Main power supply input; powers all internal circuitry and must be stable before reset release. |
| 2 | MR | Manual reset input; active-low, internally pulled up to VCC; asserts reset when pulled below 1.225 V for >25 µs. |
| 3 | PFI | Power-fail comparator input; compared against 1.225 V reference to generate PFO warning for auxiliary supplies. |
| 4 | WDI | Watchdog input; high-impedance transition detector; reset triggered if no edge occurs within programmed timeout. |
| 5 | GND | Analog/digital ground reference; shared return path for all internal comparators and outputs. |
| 6, 9 | NC | No-connect pins; factory test points only; must remain unconnected in PCB layout. |
| 7 | LLO | Low-line output; open-drain, active-low; signals imminent power failure when VCC falls to 1.02×VRST. |
| 8 | PFO | Power-fail output; open-drain, active-low; driven by PFI comparator for external supply monitoring. |
| 10 | RESET | Active-low reset logic output; asserted during power-up, brownout, MR, or WDI timeout; holds for tRP after recovery. |
Key Features
| Feature | Design Value |
|---|---|
| No external components required | Internal voltage references, pull-up resistors, and timing elements eliminate need for external capacitors or resistors in basic configuration. |
| Factory-programmed reset threshold | 3.08 V threshold laser-trimmed at wafer level; eliminates post-assembly calibration and ensures ±0.5% accuracy at 25°C. |
| Dual independent warning outputs | LLO (early warning at 1.02×VRST) and PFO (auxiliary supply fail) provide layered fault detection without software overhead. |
| Watchdog timer with activity monitoring | WDI detects µP output line transitions; prevents silent lockup by forcing hardware reset if firmware stalls or misses scheduled toggles. |
| Reset assertion down to 1.0 V VCC | Guarantees valid reset signal even during severe brownout conditions where many µPs lose functional integrity. |
Applications
| Industrial PLC Controller | Automotive Body Control Module |
|---|---|
Use Scenario: Monitors 3.3 V microcontroller supply in programmable logic controller exposed to wide temperature and voltage transients. IC Role / Device Role / Timing Role: Supervisory IC providing power-on reset, brownout protection, and watchdog supervision of real-time control firmware. Use Value: Prevents erratic behavior during grid fluctuations by asserting RESET until VCC stabilizes above 3.08 V for 200 ms, and triggers LLO at 3.14 V to initiate graceful shutdown routines. |
Use Scenario: Embedded in vehicle door module with battery-backed MCU, subject to load-dump and cold-crank events. IC Role / Device Role / Timing Role: Dual-supply monitor: VCC tracks regulated 3.3 V rail while PFI monitors 12 V battery via resistor divider for pre-failure warning. Use Value: PFO alerts system to battery sag before VCC crosses 3.08 V, enabling safe state preservation; MR allows service-mode reset via diagnostic tool. |
| Medical Infusion Pump | Smart Energy Meter |
Use Scenario: Safety-critical infusion pump with ARM Cortex-M4 MCU requiring deterministic startup and runtime fault detection. IC Role / Device Role / Timing Role: Hardware-level supervisor ensuring boot integrity and detecting firmware hangs via WDI monitoring of heartbeat signal. Use Value: Watchdog timeout (programmed to 6.2 ms) forces immediate reset upon missed heartbeat, preventing incorrect dosage delivery; RESET remains valid down to 1.0 V during capacitor hold-up decay. |
Use Scenario: Revenue-grade electricity meter operating from split-phase AC with isolated DC/DC converter supplying 3.3 V MCU rail. IC Role / Device Role / Timing Role: Power supervisor monitoring both primary 3.3 V rail and isolated auxiliary supply feeding metrology ADC. Use Value: LLO generates NMI at 3.14 V to save last valid energy reading before brownout; PFO flags auxiliary supply collapse independently, enabling dual-rail fault isolation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3808G33DBVR | Fixed 3.3 V reset threshold; 35 µA supply current; no LLO output; separate PFI input absent. | Lacks low-line warning and dedicated power-fail comparator; suitable only for single-rail reset-only use cases. | Select when only basic reset generation is needed and early warning capability is unnecessary. |
| MAX6326UT31D3+ | 3.08 V reset threshold; 1.6 µA supply current; no watchdog or PFI; push-pull RESET output. | Ultra-low power but omits WDI, PFI, and LLO; designed for static battery-backed memory retention, not active µP supervision. | Choose for always-on, long-life battery applications where watchdog and multi-rail monitoring are not required. |
Compared with TPS3808G33DBVR and MAX6326UT31D3+, the LM3710XQMMX-308/NOPB uniquely combines 3.08 V precision reset, LLO early-warning output, PFI-based auxiliary supply monitoring, and WDI-based firmware health checking in a single VSSOP-10 package - enabling comprehensive power and runtime supervision without external components.
Availability
LM3710XQMMX-308/NOPB is available at Aetrix Electronics and suitable for industrial PLC controllers, automotive body control modules, medical infusion pumps, smart energy meters, and critical µP power monitoring applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LM3710XQMMX-308/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, personal electronics, and communications markets.
The LM3710XQMMX-308/NOPB belongs to TI's microprocessor supervisory circuit product line, engineered specifically for robust, low-power, multi-function power monitoring in safety- and reliability-critical embedded systems without backup batteries.
FAQ
What is the reset threshold voltage of the LM3710XQMMX-308/NOPB?
The LM3710XQMMX-308/NOPB has a factory-programmed reset threshold of 3.08 V with ±0.5% accuracy at 25°C and ±2% over −40°C to +85°C. This value is laser-trimmed and fixed for this specific orderable part number; it does not require external resistor programming and remains stable across temperature and supply variations.
Does the LM3710XQMMX-308/NOPB support watchdog functionality?
Yes, the LM3710XQMMX-308/NOPB includes a watchdog timer monitored via the WDI pin. When no transition is detected on WDI for the factory-programmed timeout period (default 6.2 ms for standard variants), the device asserts RESET. The WDI input is high-impedance and compatible with CMOS logic levels.
What is the purpose of the LLO pin on the LM3710XQMMX-308/NOPB?
The LLO (Low-Line Output) pin on the LM3710XQMMX-308/NOPB is an open-drain, active-low output that goes low when VCC falls to 1.02×VRST (≈3.14 V for this part), providing early warning of impending power failure. It is commonly used to trigger a non-maskable interrupt (NMI) in the host microprocessor to initiate data save or controlled shutdown before RESET activates.
Can the LM3710XQMMX-308/NOPB monitor a secondary power supply?
Yes, the LM3710XQMMX-308/NOPB can monitor a secondary supply using the PFI (Power-Fail Input) pin, which compares an external voltage against a precise 1.225 V internal reference. By connecting a resistor divider from the auxiliary supply to PFI, designers can configure early warning for any rail - independent of the VCC supply being supervised by the main reset comparator.
What package type and footprint does the LM3710XQMMX-308/NOPB use?
The LM3710XQMMX-308/NOPB is packaged in a VSSOP-10 (DGS) outline: 3.0 mm × 3.0 mm body, 0.5 mm lead pitch, 1.1 mm maximum height. It uses standard JEDEC MO-187BA-compliant land patterns with NSMD pads, and is compatible with reflow soldering per MSL Level-1 (260°C peak).
LM3710XQMMX-308/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 3.08V
- Output:
- Push-Pull, Totem Pole
- Reset:
- Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSSOP
LM3710XQMMX-308/NOPB FAQ
1.How can I place an order for LM3710XQMMX-308/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM3710XQMMX-308/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM3710XQMMX-308/NOPB reliable?
The price and inventory of LM3710XQMMX-308/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM3710XQMMX-308/NOPB is usually 5 days.
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5.How can I obtain technical support or documentation for LM3710XQMMX-308/NOPB?
For technical support, including LM3710XQMMX-308/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM3710XQMMX-308/NOPB requirements.
6.How does Aetrix verify that LM3710XQMMX-308/NOPB is sourced from the original manufacturer or authorized distributors?
All LM3710XQMMX-308/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM3710XQMMX-308/NOPB meets industry standards.
7.What is the process for return or replacement of LM3710XQMMX-308/NOPB?
All LM3710XQMMX-308/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM3710XQMMX-308/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM3710XQMMX-308/NOPB part is unused and in its original packaging.
Return procedure for LM3710XQMMX-308/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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