Texas Instruments LM3S2620-EQC25-A2T
- Part No.:
- LM3S2620-EQC25-A2T
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
LM3S2620-EQC25-A2T.pdf
- Description:
- IC MCU 32BIT 128KB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM3S2620-EQC25-A2T from Texas Instruments is a 32-bit ARM Cortex-M3 microcontroller with 256 KB flash, 64 KB SRAM, integrated CAN 2.0A/B controller, 8-channel 10-bit ADC, and hibernation module for ultra-low-power operation. It operates at up to 50 MHz and supports industrial motor control, embedded automation, and battery-backed sensor nodes.
For engineers reviewing the LM3S2620-EQC25-A2T datasheet, LM3S2620-EQC25-A2T pinout, LM3S2620-EQC25-A2T application, or LM3S2620-EQC25-A2T equivalent, key selection criteria include its integrated CAN interface, hibernation-capable RTC, 50 MHz Cortex-M3 core, and QFP-100 package compatibility with industrial temperature range (–40°C to +105°C).
Technical Context
The LM3S2620-EQC25-A2T implements the ARMv7-M architecture with NVIC, SysTick, MPU, and debug support via JTAG/SWD. Its system-level design integrates a hibernation module with battery-backed RTC and 2 KB SRAM, enabling sub-μA sleep current while retaining real-time wake-up capability.
Peripherals include dual UARTs with IrDA/SIR support, two SSI modules (SPI-compatible), I²C master/slave, eight 16-bit GPTMs (with PWM/RTC modes), and a dedicated CAN 2.0B controller with 32 message objects - all clocked from a configurable PLL-based system clock sourced from internal RC, external crystal, or PIOSC.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M3, 32-bit RISC, runs at up to 50 MHz - enables deterministic real-time control with <12-cycle interrupt latency. |
| Flash Memory | 256 KB on-chip flash with 128-bit wide interface - supports in-application programming and secure code protection. |
| SRAM | 64 KB general-purpose SRAM + 2 KB hibernation-mode SRAM - retains data during deep-sleep with battery backup. |
| ADC | 8-channel 10-bit SAR ADC with 1 MSPS sample rate and hardware sequencer - suitable for analog sensor acquisition without CPU overhead. |
| CAN Interface | Dedicated CAN 2.0B controller with 32 message objects, programmable bit timing, and loopback/test modes - meets automotive and industrial fieldbus requirements. |
| Hibernation Module | Integrated RTC, battery-switchover circuitry, and hibernate entry/exit logic - achieves <1.5 μA typical current in hibernate mode with RTC running. |
| Package & Temp | 100-pin LQFP (EQC), –40°C to +105°C industrial grade - qualified for harsh environments including motor drives and factory automation. |
Pinout & Package
LM3S2620-EQC25-A2T is housed in a 100-pin LQFP (Low-Profile Quad Flat Package) with 0.5 mm pitch, JEDEC MO-152AC compliant, thermal pad exposed on bottom for enhanced heat dissipation in high-duty-cycle applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDC | Power supply inputs | Separate digital (VDD), analog (VDDA), and core (VDDC) rails enable noise isolation for ADC and PLL operation. |
| GND, GNDA, GNDC | Ground returns | Dedicated analog (GNDA) and core (GNDC) grounds minimize coupling between sensitive analog and switching digital domains. |
| PD0–PD7, PE0–PE7, PF0–PF4, etc. | GPIO banks | Multi-function pins supporting UART, SSI, I²C, CAN, timer capture/PWM, and ADC input - configurable per peripheral need. |
| CAN0RX / CAN0TX | CAN physical interface | Dedicated differential pair for CAN transceiver connection - supports ISO 11898-1 compliant signaling at up to 1 Mbps. |
| HIBRST, HIBACK | Hibernation control | Asynchronous reset and acknowledge signals for hibernation entry/exit coordination with external battery management circuitry. |
| RTCCLK, RTCSW | Real-time clock source | Supports external 32.768 kHz crystal or internal low-frequency oscillator - enables accurate timekeeping during hibernation. |
Key Features
| Feature | Design Value |
|---|---|
| Hibernation with RTC | Retains real-time clock and 2 KB SRAM using coin-cell backup power while drawing <1.5 μA - eliminates need for external RTC IC in portable systems. |
| Dual CAN 2.0B Controller | Single on-chip CAN controller with 32 message objects, programmable acceptance filtering, and automatic retransmission - reduces BOM count vs. external CAN controllers. |
| Peripheral Integration | Includes UART, SSI, I²C, ADC, comparators, PWM timers, watchdog, and GPIO - enables full-system control without external glue logic. |
| ARM Cortex-M3 Core | Hardware divide, single-cycle MAC, bit-band addressing, and NVIC with 32 priority levels - delivers efficient deterministic execution for real-time firmware. |
| Industrial Temperature Range | Rated for –40°C to +105°C operation in LQFP-100 package - validated for use in motor drives, PLCs, and outdoor industrial equipment. |
Applications
| Motor Control System | Industrial CAN Node |
|---|---|
Use Scenario: Closed-loop control of BLDC or stepper motors in HVAC actuators and conveyor drives, requiring precise timing, analog feedback, and fieldbus communication. IC Role / Device Role / Timing Role: Central controller executing FOC algorithms, sampling current/voltage sensors via ADC, generating PWM waveforms, and reporting status over CAN. Use Value: Integrated 50 MHz Cortex-M3, 8-channel ADC, and CAN 2.0B eliminate external signal conditioning and protocol translation ICs. | Use Scenario: Distributed I/O node in factory automation networks, collecting sensor data and executing local logic while communicating via CANopen or DeviceNet. IC Role / Device Role / Timing Role: Fieldbus endpoint with deterministic message scheduling, hardware FIFO buffering, and error-handling support for robust multi-node operation. Use Value: On-chip CAN controller with 32 message objects and programmable bit timing ensures reliable interoperability with legacy and modern CAN infrastructure. |
| Battery-Powered Sensor Hub | Embedded HMI Controller |
Use Scenario: Remote environmental monitoring node powered by lithium primary cell, transmitting temperature/humidity data periodically over wireless link. IC Role / Device Role / Timing Role: Low-power host managing sensor interfaces, performing wake-on-interrupt, maintaining RTC, and preparing data packets during brief active windows. Use Value: Hibernate mode with <1.5 μA current and battery-backed RTC extends battery life to >5 years without external power management ICs. | Use Scenario: Local operator interface for industrial machinery, featuring LED indicators, pushbutton inputs, and serial display communication. IC Role / Device Role / Timing Role: Real-time coordinator handling button debouncing, LED PWM dimming, UART display updates, and fault logging to flash memory. Use Value: 64 KB SRAM supports GUI state buffers; 256 KB flash stores firmware and localized language strings; multiple UARTs simplify display and debug connectivity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM3S2965-IQC50-A2T | Same Cortex-M3 core, 512 KB flash, 96 KB SRAM, identical peripherals and pinout - higher memory capacity in same LQFP-100 package. | Preferred where larger firmware image or extended data logging is required; no change to PCB or driver stack. | Select when future firmware growth or data buffering demands exceed 256 KB flash or 64 KB RAM. |
| TMS570LS0432ZWTQ | ARM Cortex-R4F safety MCU, dual-core lockstep, ASIL-B certified, 384 KB flash, 64 KB RAM, but no hibernation module or CAN 2.0B - includes ECC RAM and built-in self-test. | Targeted at functional-safety-critical applications (e.g., automotive body control); requires safety-certified toolchain and development process. | Choose only if ISO 26262 compliance and hardware safety mechanisms are mandatory - not a drop-in replacement. |
Compared with LM3S2620-EQC25-A2T, LM3S2965-IQC50-A2T offers scalable memory within identical footprint and feature set, while TMS570LS0432ZWTQ shifts focus from low-power integration to safety-critical determinism - making the former ideal for cost-sensitive industrial upgrades and the latter for certified automotive subsystems.
Availability
LM3S2620-EQC25-A2T is available at Aetrix Electronics and suitable for industrial motor control, CAN-based fieldbus nodes, and battery-powered sensor hubs requiring stable component supply across long-lifecycle production programs.
Supply support for LM3S2620-EQC25-A2T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and consumer markets since 1930.
The Stellaris LM3S series was designed as the first ARM Cortex-M3-based microcontroller family for cost-sensitive, real-time industrial applications - emphasizing peripheral integration, low-power hibernation, and CAN-ready fieldbus support.
FAQ
What is the maximum operating frequency of the LM3S2620-EQC25-A2T?
The LM3S2620-EQC25-A2T operates at a maximum system clock frequency of 50 MHz, achieved via an internal PLL that multiplies the input clock (from internal RC oscillator, external crystal, or PIOSC). This frequency is sustained across the full industrial temperature range (–40°C to +105°C) and supports deterministic real-time execution of control loops and communication stacks. The LM3S2620-EQC25-A2T's Cortex-M3 core delivers 1.25 DMIPS/MHz at this speed.
Does the LM3S2620-EQC25-A2T support CAN FD or only classical CAN?
The LM3S2620-EQC25-A2T supports only Classical CAN (ISO 11898-1) up to CAN 2.0B specification, with bit rates up to 1 Mbps and 32 message objects. It does not implement CAN FD features such as flexible data-rate, extended data length (up to 64 bytes), or CRC enhancements. The LM3S2620-EQC25-A2T's CAN controller is fully compatible with existing CAN 2.0A/B networks used in industrial automation and automotive subsystems.
What is the purpose of the hibernation module in the LM3S2620-EQC25-A2T?
The hibernation module in the LM3S2620-EQC25-A2T provides ultra-low-power state retention with integrated RTC, battery switchover circuitry, and 2 KB of dedicated SRAM. It allows the LM3S2620-EQC25-A2T to enter a sub-μA sleep mode while maintaining accurate timekeeping and critical data - essential for battery-powered remote sensors and energy-harvesting systems. Wake-up sources include RTC match, external GPIO, or CAN activity.
Is the LM3S2620-EQC25-A2T pin-compatible with other Stellaris LM3S devices?
The LM3S2620-EQC25-A2T uses a 100-pin LQFP package (EQC) shared with several other LM3S devices including LM3S2965 and LM3S8962, but pin compatibility is not guaranteed across all functions. While power, ground, and core clock pins align, peripheral mappings (e.g., CAN, UART, SSI) differ between variants. Designers must verify signal routing against the specific device's datasheet - the LM3S2620-EQC25-A2T has unique peripheral enablement and pin multiplexing defined in its silicon revision.
What debug interfaces does the LM3S2620-EQC25-A2T support?
The LM3S2620-EQC25-A2T supports JTAG and SWD (Serial Wire Debug) interfaces for full-featured debugging, including halt/resume, register inspection, flash programming, and real-time trace via TPIU. These interfaces are accessible through dedicated pins (TCK, TMS, TDI, TDO, nTRST, SWDIO, SWCLK) and are supported by TI's Code Composer Studio and third-party tools like Segger J-Link. The LM3S2620-EQC25-A2T also includes integrated NVIC and SysTick for exception-based debugging workflows.
LM3S2620-EQC25-A2T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 100-LQFP
- Series:
- Stellaris® ARM® Cortex®-M3S 2000
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Programmable:
- Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 25MHz
- Connectivity:
- CANbus, I2C, IrDA, Microwire, QEI, SPI, SSI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, PWM, WDT
- Number of I/O:
- 52
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.25V ~ 2.75V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LM3S2620-EQC25-A2T FAQ
1.How can I place an order for LM3S2620-EQC25-A2T through Aetrix?
Please submit a Request for Quotation (RFQ) for LM3S2620-EQC25-A2T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM3S2620-EQC25-A2T reliable?
The price and inventory of LM3S2620-EQC25-A2T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM3S2620-EQC25-A2T is usually 5 days.
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5.How can I obtain technical support or documentation for LM3S2620-EQC25-A2T?
For technical support, including LM3S2620-EQC25-A2T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM3S2620-EQC25-A2T requirements.
6.How does Aetrix verify that LM3S2620-EQC25-A2T is sourced from the original manufacturer or authorized distributors?
All LM3S2620-EQC25-A2T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM3S2620-EQC25-A2T meets industry standards.
7.What is the process for return or replacement of LM3S2620-EQC25-A2T?
All LM3S2620-EQC25-A2T units undergo pre-shipment inspection (PSI). If there is an issue with LM3S2620-EQC25-A2T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM3S2620-EQC25-A2T part is unused and in its original packaging.
Return procedure for LM3S2620-EQC25-A2T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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