Texas Instruments LM4546BVH/NOPB
- Part No.:
- LM4546BVH/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- CODECS
- Package:
- -
- Datasheet:
-
LM4546BVH/NOPB.pdf
- Description:
- LM4546B AC '97 REV 2.1 CODEC WIT
- Quantity:
- Payment:

- Shipping:

Inventory:2,500
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LM4546BVH/NOPB from Texas Instruments (formerly National Semiconductor) is an AC '97 Rev 2.1-compliant multi-channel audio codec designed for PC and embedded audio systems. It integrates dual 18-bit sigma-delta ADCs and DACs, delivers 90 dB ADC dynamic range and 89 dB DAC dynamic range, supports sample rate conversion from 4 kHz to 48 kHz in 1 Hz steps, and implements National's 3D Sound stereo enhancement circuitry for desktop and portable PC audio subsystems.
For engineers reviewing the LM4546BVH/NOPB datasheet, LM4546BVH/NOPB pinout, LM4546BVH/NOPB application, or LM4546BVH/NOPB equivalent, this page provides verified technical context, validated pin functions, confirmed AC Link timing compliance, real-world mixer configuration capabilities, and direct alternative part comparisons for PC99-compliant audio system design.
Technical Context
The LM4546BVH/NOPB implements a full-duplex stereo analog front-end with four stereo and four mono analog inputs routed through programmable gain amplifiers and dual-stage analog mixers (MIX1 and MIX2). Its AC Link interface operates at 12.288 MHz BIT_CLK and 48 kHz SYNC, supporting primary/secondary codec configurations via ID0#/ID1# pins and up to 8-channel input streaming in extended AC Link mode.
It features deterministic sample timing for both ADC capture and DAC playback, enabling predictable task scheduling in real-time OS environments. The device supports dual digital supplies (3.0–5.5 V DVDD), analog supply range of 4.2–5.5 V AVDD, and extended industrial temperature operation from −40°C to +85°C - making it suitable beyond PC applications into telematics and multi-channel audio systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ADC Resolution | 18-bit sigma-delta - enables high-fidelity digitization of line/mic inputs with 90 dB typical dynamic range. |
| DAC Resolution | 18-bit sigma-delta - delivers 89 dB typical dynamic range for clean analog output generation to line-level speakers/headphones. |
| Sample Rate Conversion | 4 kHz to 48 kHz in 1 Hz increments - allows seamless interoperability between asynchronous audio sources and host controllers without external resampling. |
| AC Link Timing | BIT_CLK = 12.288 MHz, SYNC = 48 kHz - fully compliant with AC '97 Rev 2.1 specification for guaranteed controller interoperability. |
| Analog Supply Range | AVDD = 4.2 V to 5.5 V - supports legacy 5 V PC power rails while maintaining noise immunity and THD+N performance. |
| Operating Temperature | −40°C to +85°C - qualified for industrial and automotive telematics use cases where ambient thermal stress exceeds consumer PC limits. |
| 3D Sound Circuitry | Integrated fixed-depth stereo enhancement - implemented via dedicated 3DP/3DN pins and controlled by register bit D13; no external DSP required. |
Pinout & Package
LQFP-48 package (Texas Instruments package code VBH48A), thermally enhanced with θJA = 74°C/W; 7 mm × 7 mm body, 0.5 mm pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SDATA_OUT (Pin 5) | AC Link input | Receives control commands and DAC PCM data from AC '97 controller; sampled on falling edge of BIT_CLK. |
| SDATA_IN (Pin 8) | AC Link output | Transmits ADC PCM data and status to controller; driven on rising edge of BIT_CLK. |
| BIT_CLK (Pin 6) | AC Link clock | Output at 12.288 MHz in Primary mode; input in Secondary mode - synchronizes all frame-based audio transfers. |
| SYNC (Pin 10) | Frame sync / Warm Reset | 48 kHz active-high pulse marking AC Link frame boundaries; also triggers asynchronous warm reset of AC Link interface. |
| RESET# (Pin 11) | Hardware reset | Active-low signal initializing all registers and routing PC_BEEP directly to LINE_OUT during cold boot - mandatory for power-on initialization. |
| PC_BEEP (Pin 12) | Mono analog input | Direct path to Line Out during RESET# assertion - enables BIOS POST tones before driver initialization. |
| LINE_OUT_L/R (Pins 35, 36) | Stereo analog outputs | Master-volume-controlled line-level outputs (1 Vrms nominal); mute and attenuation adjustable in 1.5 dB steps from 0 dB to −46.5 dB. |
| EAPD (Pin 47) | External amplifier control | Open-drain logic output driving external power amp shutdown pin - simplifies power sequencing and reduces standby current. |
Key Features
| Feature | Design Value |
|---|---|
| AC '97 Rev 2.1 compliance | Fully implements AC Link protocol including slot definitions, frame structure, and register map - ensures drop-in compatibility with Intel ICH and compatible controllers. |
| National 3D Sound enhancement | Dedicated analog stereo widening circuit (3DP/3DN pins) with register-controlled enable/disable - adds spatial perception without CPU load or latency. |
| Multi-codec support | ID0#/ID1# pins configure Primary/Secondary roles; extended AC Link allows up to 8 simultaneous input channels across multiple codecs - scales audio I/O without controller upgrade. |
| Dual digital supply options | Supports 3.3 V or 5 V DVDD - enables integration into mixed-voltage motherboards and avoids level-shifting components. |
| PC-Beep passthrough | Hardware-routed mono signal bypasses all volume/mute controls during Cold Reset - guarantees audible system diagnostics before software stack loads. |
Applications
| Desktop PC Audio Subsystem | Portable PC Audio (MDC/AMR) |
|---|---|
|
Use Scenario: Integrated audio on ATX motherboard with AC Link-connected southbridge. IC Role / Device Role / Timing Role: Primary AC '97 codec handling all analog I/O, sample rate conversion, and mixer routing under BIOS/OS driver control. Use Value: Eliminates need for discrete op-amps and resampling ICs; 90 dB ADC DR meets PC99 audio fidelity requirements. |
Use Scenario: Audio solution on Mobile Daughter Card (MDC) for notebook platforms. IC Role / Device Role / Timing Role: Secondary codec configured via ID pins to share AC Link bus with primary controller; handles mic/line-in and headphone out. Use Value: Reduces BOM count and PCB area vs. dual-controller designs; extended temperature rating supports laptop thermal profiles. |
| Automotive Telematics Head Unit | Industrial Multi-Channel Audio Recorder |
|
Use Scenario: Voice-enabled infotainment system requiring hands-free calling and voice command processing. IC Role / Device Role / Timing Role: Full-duplex audio interface connecting microphone array and speaker outputs; uses deterministic ADC/DAC timing for low-latency echo cancellation. Use Value: −40°C to +85°C operation ensures reliability in vehicle cabin environments; EAPD pin simplifies amplifier power management during sleep/wake cycles. |
Use Scenario: Field-deployable audio logger capturing 4 stereo inputs simultaneously (e.g., surveillance, environmental monitoring). IC Role / Device Role / Timing Role: Configured in extended AC Link mode with multiple LM4546BVH/NOPB devices sharing one controller; routes AUX/VIDEO/CD inputs to separate ADC channels. Use Value: 18-bit resolution and 97 dB analog mixer DR preserve signal integrity across gain stages; programmable input attenuation prevents clipping on variable-level sources. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-channel AC '97 audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM4550B | 6-channel streaming capability on Output Frames (vs. 2-channel on LM4546BVH/NOPB); identical ADC/DAC specs and pinout. | Optimized for systems requiring higher DAC channel count (e.g., 5.1 surround sound) without adding secondary codecs. | Select LM4550B when >2 DAC streams are needed per controller; LM4546BVH/NOPB remains optimal for standard stereo+mic PC audio. |
| AD1885ASTZ | Analog Devices part with same AC '97 Rev 2.1 compliance, 18-bit converters, and 90 dB DR; differs in register map and EAPD implementation. | Used in legacy industrial designs where ADI ecosystem tooling and driver support are already established. | Choose AD1885ASTZ only if existing firmware leverages ADI-specific control sequences; LM4546BVH/NOPB offers broader BIOS compatibility. |
Compared with LM4546BVH/NOPB, LM4550B expands output channel capacity but shares identical analog performance and thermal specs, while AD1885ASTZ requires register-level firmware adaptation despite matching core audio metrics - making LM4546BVH/NOPB the most broadly interoperable choice for new AC '97 designs.
Availability
LM4546BVH/NOPB is available at Aetrix Electronics and suitable for desktop PC audio subsystems, portable PC MDC implementations, and automotive telematics head units requiring stable component supply and long-term lifecycle support.
Supply support for LM4546BVH/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired National Semiconductor in 2011 and maintains full technical and supply chain responsibility for legacy National audio products including the LM4546BVH/NOPB.
The LM4546BVH/NOPB belongs to National's AC '97 audio codec family, engineered specifically to replace discrete analog audio circuits in PC platforms while meeting PC99 compliance and delivering high-fidelity, low-latency audio I/O.
FAQ
What is the function of the 3DP and 3DN pins on the LM4546BVH/NOPB?
The 3DP and 3DN pins on the LM4546BVH/NOPB form the external network for National's 3D Sound stereo enhancement circuit. A 0.022 µF capacitor must be connected between them to complete the analog stereo widening filter. This circuit is enabled or disabled via bit D13 in the General Purpose register (20h); when disabled, the pins may be left unconnected without affecting basic codec operation.
Does the LM4546BVH/NOPB support both 3.3 V and 5 V digital I/O voltage levels?
Yes, the LM4546BVH/NOPB supports dual digital supply options: DVDD1 and DVDD2 accept 3.0 V to 5.5 V. When operated at 3.3 V, digital quiescent current drops to 19 mA; at 5 V, it rises to 34 mA. Input thresholds (VIH/VIL) and output drive levels (VOH/VOL) scale accordingly, ensuring reliable AC Link signaling across both voltage domains without external level shifters.
How does the LM4546BVH/NOPB handle PC_BEEP during system boot?
During Cold Reset (active-low RESET# assertion), the LM4546BVH/NOPB hardware-bypasses all volume and mute controls and routes the PC_BEEP input directly to both LINE_OUT_L and LINE_OUT_R channels. This ensures BIOS POST tones are audible before audio drivers initialize - a mandatory feature for PC99 compliance and field service diagnostics.
Can the LM4546BVH/NOPB operate as a secondary codec on the same AC Link bus?
Yes, the LM4546BVH/NOPB supports three Secondary codec modes via ID0# and ID1# pin configurations. In Secondary mode, BIT_CLK becomes an input (driven by the Primary codec), and SDATA_OUT transmits only ADC data frames. Up to three secondary codecs can coexist with one primary, enabling scalable multi-input audio architectures without additional controller resources.
What is the purpose of the EAPD pin on the LM4546BVH/NOPB?
The EAPD (External Amplifier Power Down) pin on the LM4546BVH/NOPB is an open-drain output controlled by bit D15 in the Powerdown Control/Status register (26h). It drives the shutdown pin of an external line driver or headphone amplifier, allowing synchronized power gating to reduce system standby current - critical for battery-powered portable PCs and telematics units.
LM4546BVH/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- -
- Data Interface:
- -
- Resolution (Bits):
- -
- Number of ADCs / DACs:
- -
- Sigma Delta:
- -
- S/N Ratio, ADCs / DACs (db) Typ:
- -
- Dynamic Range, ADCs / DACs (db) Typ:
- -
- Voltage - Supply, Analog:
- -
- Voltage - Supply, Digital:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
LM4546BVH/NOPB FAQ
1.How can I place an order for LM4546BVH/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM4546BVH/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM4546BVH/NOPB reliable?
The price and inventory of LM4546BVH/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM4546BVH/NOPB is usually 5 days.
3.What payment methods are accepted for LM4546BVH/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM4546BVH/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM4546BVH/NOPB?
LM4546BVH/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM4546BVH/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM4546BVH/NOPB?
For technical support, including LM4546BVH/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM4546BVH/NOPB requirements.
6.How does Aetrix verify that LM4546BVH/NOPB is sourced from the original manufacturer or authorized distributors?
All LM4546BVH/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM4546BVH/NOPB meets industry standards.
7.What is the process for return or replacement of LM4546BVH/NOPB?
All LM4546BVH/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM4546BVH/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM4546BVH/NOPB part is unused and in its original packaging.
Return procedure for LM4546BVH/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LM4546BVH/NOPB Tags

-
NAU88C22YG
Nuvoton Technology Corporation

-
TLV320AIC3100IRHBR
Texas Instruments

-
DA7212-01UM2
Renesas Electronics Corporation

-
NAU8810YG
Nuvoton Technology Corporation

-
DA7218-00U32
Renesas Electronics Corporation

-
CMX655DQ6-TR1K
CML Micro

-
SGTL5000XNLA3
NXP Semiconductors

-
TLV320AIC3104IRHBR
Texas Instruments

-
MAX9867EWV+T
Analog Devices Inc./Maxim Integrated

-
MAX9860ETG+T
Analog Devices Inc./Maxim Integrated

-
TLV320AIC3106IRGZR
Texas Instruments

-
SGTL5000XNLA3R2
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

