My Inquiry
My Account
Texas Instruments LM75AIMME/NOPB
- Part No.:
- LM75AIMME/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Analog and Digital Output
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
LM75AIMME/NOPB.pdf
- Description:
- SENSOR DIGITAL -55C-125C 8VSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,631
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LM75AIMME/NOPB from Texas Instruments is a digital temperature sensor and thermal watchdog IC with integrated 9-bit sigma-delta ADC, I²C interface, and programmable overtemperature shutdown output (O.S.). It delivers ±2°C accuracy from –25°C to +100°C, operates from 2.7 V to 5.5 V, and supports up to eight devices on one bus via A0–A2 address pins. It is used in PC motherboard thermal monitoring, embedded system fan control, and industrial equipment thermal protection.
For engineers reviewing the LM75AIMME/NOPB datasheet, LM75AIMME/NOPB pinout, LM75AIMME/NOPB application, or LM75AIMME/NOPB equivalent, key selection considerations include its 9-bit resolution, ±2°C accuracy over 0–70°C ambient, open-drain O.S. output with programmable fault queue (1–6 faults), comparator/interrupt mode flexibility, and SOIC-8 package compatibility with standard thermal management layouts.
Technical Context
The LM75AIMME/NOPB implements a silicon bandgap temperature sensor feeding a 9-bit sigma-delta ADC, with decimation filtering for noise immunity. Its I²C interface complies with standard-mode (100 kHz) and fast-mode (400 kHz) timing, including bus timeout recovery (325 ms SDA low reset).
It features dual operational modes: comparator mode (O.S. toggles between TOS and THYST) and interrupt mode (O.S. latches until register read). The Configuration register controls shutdown (4 µA typical), O.S. polarity, fault queue depth, and mode selection - all retained during power cycling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Temperature Accuracy | ±2°C max from –25°C to +100°C; enables reliable thermal trip decisions without calibration in consumer/industrial systems. |
| Resolution | 9-bit (0.5°C LSB); provides sufficient granularity for fan speed staging and thermal throttling thresholds. |
| Supply Voltage Range | 2.7 V to 5.5 V; compatible with 3.3 V and 5 V logic domains without level shifting. |
| Quiescent Current | 280 µA typical operating / 4 µA typical shutdown; supports battery-backed or low-power always-on thermal monitoring. |
| I²C Speed | Up to 400 kHz; allows rapid polling in real-time thermal control loops without bus congestion. |
| O.S. Output Type | Open-drain, active-low by default; interfaces directly with MCU GPIO interrupts or discrete MOSFET gate drivers. |
| Fault Queue Depth | Programmable 1–6 consecutive over-limit conversions; suppresses false triggers in electrically noisy environments (e.g., motor drives). |
Pinout & Package
LM75AIMME/NOPB is housed in an SOIC-8 (D) package (4.90 mm × 3.91 mm body size), optimized for surface-mount assembly and thermal coupling to PCB copper.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +VS (Pin 8) | Positive supply input | Accepts 2.7–5.5 V; requires local 100 nF ceramic bypass capacitor for stable ADC reference and noise rejection. |
| A0, A1, A2 (Pins 5–7) | I²C slave address inputs | Set device address bits (LSBs); enable up to eight LM75AIMME/NOPB units on same bus without address conflict. |
| SCL (Pin 2) | I²C clock input | Asynchronous master-controlled clock; requires external 10 kΩ pullup to +VS for proper signal integrity. |
| SDA (Pin 1) | I²C bidirectional data line | Open-drain interface; shares bus with other I²C slaves; requires same 10 kΩ pullup as SCL. |
| O.S. (Pin 3) | Overtemperature shutdown output | Open-drain, active-low by default; sinks up to 10 mA; must be pulled up externally (e.g., 10 kΩ) to drive MCU interrupt or FET gate. |
| GND (Pin 4) | Power ground reference | Primary return path for analog and digital circuits; must connect to low-impedance system ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| Stand-alone thermostat operation | Power-up defaults (TOS = 80°C, THYST = 75°C, comparator mode) allow immediate thermal protection without host firmware initialization. |
| Programmable fault tolerance | Configurable 1–6 fault count before O.S. assertion prevents nuisance trips in EMI-prone applications like motor controllers. |
| Two-wire interface with timeout recovery | 325 ms SDA low timeout resets bus state automatically, enhancing robustness in systems with unreliable I²C masters. |
| Low-power shutdown mode | Reduces current to 4 µA while retaining register contents and allowing wake-on-temperature-event via external interrupt. |
| Flexible O.S. polarity and mode | O.S. can be set active-high or active-low; comparator vs. interrupt mode selection enables either hysteresis-based control or event-latching behavior. |
Applications
| Server CPU Thermal Monitoring | Industrial PLC Cabinet Overheat Protection |
|---|---|
|
Use Scenario: Real-time die temperature tracking of x86 processors in 1U rack servers, triggering dynamic frequency scaling or fan ramp-up when thresholds are exceeded. IC Role / Device Role / Timing Role: Primary temperature sensing node on processor VRM power plane; provides 9-bit readings every 100 ms via I²C to BMC controller. Use Value: ±2°C accuracy ensures precise thermal margining; programmable THYST prevents fan oscillation during transient load changes. |
Use Scenario: Ambient cabinet temperature supervision in programmable logic controllers deployed in factory automation environments. IC Role / Device Role / Timing Role: Stand-alone thermal watchdog; asserts O.S. to cut heater power or trigger alarm relay when enclosure exceeds 70°C. Use Value: No external components required; power-up defaults enable immediate deployment; 4 µA shutdown extends backup battery life during brownout events. |
| Network Switch ASIC Thermal Throttling | Medical Diagnostic Equipment Temperature Calibration Reference |
|
Use Scenario: On-board thermal management for multi-gigabit Ethernet switch ASICs, where junction temperature must stay below 105°C under full packet forwarding load. IC Role / Device Role / Timing Role: Secondary sensor adjacent to ASIC package; communicates via shared I²C bus with switch controller to initiate throttling at 95°C. Use Value: 400 kHz I²C speed enables sub-100 ms response time; fault queue eliminates false trips caused by switching noise on dense PCBs. |
Use Scenario: Stable temperature reference for offset/gain calibration of infrared thermography modules in portable ultrasound devices. IC Role / Device Role / Timing Role: High-stability local ambient sensor; readings used to compensate IR detector drift across –10°C to +40°C operating range. Use Value: ±2°C accuracy over 0–70°C meets Class II medical device thermal calibration requirements; SOIC-8 footprint allows tight thermal coupling to reference plane. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital temperature sensor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STLM75CDT6 | Same 9-bit resolution and ±2°C accuracy, but only supports 100 kHz I²C; no programmable fault queue. | Lacks configurable O.S. assertion delay; less suitable for noisy industrial environments requiring glitch immunity. | Select STLM75CDT6 only if I²C bus speed ≤100 kHz and fault tolerance is not required. |
| MAX31820MUA+ | 12-bit resolution (0.0625°C LSB), ±0.5°C accuracy, 1-Wire interface instead of I²C; higher quiescent current (1 mA). | Requires single-wire bus architecture; better for point-sensor deployments where wiring count is critical, worse for multi-node thermal maps. | Choose MAX31820MUA+ when higher precision is mandatory and 1-Wire infrastructure already exists. |
Compared with LM75AIMME/NOPB, STLM75CDT6 offers identical form factor but reduced bus flexibility and no fault queue, while MAX31820MUA+ trades I²C compatibility for higher resolution and 1-Wire simplicity - making LM75AIMME/NOPB the optimal balance of accuracy, noise immunity, and ecosystem integration for mainstream embedded thermal control.
Availability
LM75AIMME/NOPB is available at Aetrix Electronics and suitable for server thermal management, industrial PLC cabinet monitoring, network switch ASIC throttling, and medical diagnostic equipment calibration requiring stable component supply and long-term lifecycle support.
Supply support for LM75AIMME/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in precision sensing and industrial-grade IC design.
The LM75AIMME/NOPB belongs to TI's precision analog temperature sensor product line, engineered specifically for reliable, low-cost thermal monitoring in computing, communications, and industrial control systems where robust I²C integration and fail-safe overtemperature response are essential.
FAQ
What is the operating temperature range of the LM75AIMME/NOPB?
The LM75AIMME/NOPB operates across –55°C to +125°C. Its temperature accuracy is specified as ±2°C maximum from –25°C to +100°C and ±3°C maximum over the full –55°C to +125°C range. This makes LM75AIMME/NOPB suitable for both commercial and extended industrial environments where ambient or junction temperatures may vary widely.
Does the LM75AIMME/NOPB require external components to function as a thermostat?
No - the LM75AIMME/NOPB requires no external components to operate as a stand-alone thermostat. At power-up, it defaults to comparator mode with TOS = 80°C and THYST = 75°C, and its O.S. output activates based on temperature crossing those thresholds. Only an external pullup resistor on the O.S. pin is needed to interface with a load or MCU interrupt line.
How does the fault queue feature work in the LM75AIMME/NOPB?
The LM75AIMME/NOPB's fault queue requires 1–6 consecutive temperature readings above TOS before asserting the O.S. output. This prevents false trips due to transient noise or measurement spikes. The queue depth is set via bits D3–D4 in the Configuration register, with power-up default set to 1 fault - meaning O.S. triggers immediately upon first over-limit reading.
Can the LM75AIMME/NOPB be used with a 3.3 V microcontroller I²C bus?
Yes - the LM75AIMME/NOPB supports I²C communication at 3.3 V logic levels. Its SDA and SCL inputs accept VIH ≥ 0.7×VCC and VIL ≤ 0.3×VCC, and it operates with supply voltages from 2.7 V to 5.5 V. When powered at 3.3 V, use 3.3 V-compatible pullup resistors (e.g., 4.7 kΩ) on both SDA and SCL lines for reliable bus operation.
What is the conversion time and update rate of the LM75AIMME/NOPB?
The LM75AIMME/NOPB performs temperature conversions every 100 ms (typical), with a maximum conversion time of 300 ms. The device updates its internal temperature register after each conversion. To avoid stale readings, host systems should wait at least one full conversion cycle (≥300 ms) between successive reads of the Temperature Register - otherwise, the LM75AIMME/NOPB returns the previous result.
LM75AIMME/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Sensor Type:
- Digital, Local
- Sensing Temperature - Local:
- -55°C ~ 125°C
- Sensing Temperature - Remote:
- -
- Output Type:
- I2C
- Voltage - Supply:
- 2.7V ~ 5.5V
- Resolution:
- 9 b
- Features:
- Output Switch, Programmable Limit
- Accuracy - Highest (Lowest):
- ±2°C (±3°C)
- Test Condition:
- -25°C ~ 100°C (-55°C ~ 125°C)
- Operating Temperature:
- -55°C ~ 125°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 8-VSSOP
LM75AIMME/NOPB FAQ
1.How can I place an order for LM75AIMME/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM75AIMME/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM75AIMME/NOPB reliable?
The price and inventory of LM75AIMME/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM75AIMME/NOPB is usually 5 days.
3.What payment methods are accepted for LM75AIMME/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM75AIMME/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM75AIMME/NOPB?
LM75AIMME/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM75AIMME/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM75AIMME/NOPB?
For technical support, including LM75AIMME/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM75AIMME/NOPB requirements.
6.How does Aetrix verify that LM75AIMME/NOPB is sourced from the original manufacturer or authorized distributors?
All LM75AIMME/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM75AIMME/NOPB meets industry standards.
7.What is the process for return or replacement of LM75AIMME/NOPB?
All LM75AIMME/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM75AIMME/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM75AIMME/NOPB part is unused and in its original packaging.
Return procedure for LM75AIMME/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LM75AIMME/NOPB Tags
-
MCP9700T-E/TT
Microchip Technology
-
MCP9700T-E/LT
Microchip Technology
-
MCP9701T-E/TT
Microchip Technology
-
MCP9701T-E/LT
Microchip Technology
-
TMP235A4DBZR
Texas Instruments
-
MCP9700AT-E/TT
Microchip Technology
-
MCP9700AT-E/LT
Microchip Technology
-
MCP9701AT-E/LT
Microchip Technology
-
MCP9701AT-E/TT
Microchip Technology
,TO-226_straightlead.jpg)
-
LM335Z
STMicroelectronics
-
TMP1075NDRLR
Texas Instruments
-
TMP1075DGKR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
