Texas Instruments LM75AIM/NOPB
- Part No.:
- LM75AIM/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Analog and Digital Output
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LM75AIM/NOPB.pdf
- Description:
- SENSOR DIGITAL -55C-125C 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:294
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Product details
Overview
LM75AIM/NOPB from Texas Instruments is a digital temperature sensor and thermal watchdog IC with integrated 9-bit sigma-delta ADC, I²C interface, and programmable overtemperature shutdown output (O.S.). It delivers ±2°C accuracy from –25°C to 100°C, operates from 2.7 V to 5.5 V, and supports up to eight devices on one bus via A0–A2 address pins. It is used in PC motherboard thermal monitoring, embedded system fan control, and industrial equipment thermal protection.
For engineers reviewing the LM75AIM/NOPB datasheet, LM75AIM/NOPB pinout, LM75AIM/NOPB application, or LM75AIM/NOPB equivalent, key selection considerations include its 9-bit resolution (0.5°C LSB), programmable fault queue (1–6 consecutive overtemp events), comparator/interrupt mode flexibility, active-low open-drain O.S. output, and SOIC-8 package compatibility with standard thermal management layouts.
Technical Context
The LM75AIM/NOPB implements a bandgap-based silicon temperature sensor feeding a 9-bit sigma-delta ADC, with decimation filtering for noise immunity. Its I²C interface complies with standard-mode (100 kHz) and fast-mode (400 kHz) timing, supporting bidirectional SDA and unidirectional SCL communication using a 7-bit slave address formed by hardwired "1001" + A2/A1/A0 bits.
It features dual operating modes: comparator mode (O.S. toggles between TOS and THYST) and interrupt mode (O.S. latches until register read or shutdown). The dedicated O.S. output is open-drain, programmable for polarity and fault tolerance, and remains functional during I²C communication interruptions due to built-in bus timeout recovery.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Temperature Accuracy | ±2°C max from –25°C to 100°C; enables reliable thermal trip decisions without calibration in consumer/industrial systems |
| Resolution | 9-bit (0.5°C LSB); provides sufficient granularity for fan speed staging or alarm hysteresis tuning |
| Supply Voltage Range | 2.7 V to 5.5 V; compatible with 3.3 V and 5 V logic domains without level shifting |
| Quiescent Current | 280 μA typical operating; 4 μA typical shutdown; supports low-power thermal monitoring in battery-backed systems |
| I²C Speed Support | Up to 400 kHz; allows high-speed polling in real-time thermal control loops |
| O.S. Fault Queue | Programmable 1–6 consecutive overtemp readings; prevents false triggers in electrically noisy environments |
| Default Trip Points | TOS = 80°C, THYST = 75°C at power-up; enables immediate stand-alone thermostat operation without configuration |
Pinout & Package
LM75AIM/NOPB is housed in an SOIC-8 package (4.90 mm × 3.91 mm body size) with standard gull-wing leads and 1.27 mm pitch. Pin 1 is marked with a beveled corner or dot; pin numbering follows counter-clockwise convention from top-left when viewing the top side.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +VS (Pin 8) | Positive supply input | Accepts 2.7–5.5 V; requires local 100 nF ceramic bypass capacitor to minimize supply noise coupling into temperature measurement |
| A0, A1, A2 (Pins 5–7) | I²C slave address inputs | Set device address bits (LSBs of 7-bit address); grounded or pulled high to +VS to configure one of eight possible addresses (1001xxx) |
| SCL (Pin 2) | I²C clock input | Asynchronous master-generated clock; requires external 10 kΩ pullup to +VS for proper signal integrity and noise immunity |
| SDA (Pin 1) | I²C bidirectional data line | Open-drain interface; shares same 10 kΩ pullup as SCL; supports multi-master arbitration and clock stretching |
| O.S. (Pin 3) | Overtemperature shutdown output | Open-drain, active-low by default; sinks up to 10 mA; requires external pullup resistor (≤30 kΩ) to drive external logic or MOSFET gate |
| GND (Pin 4) | Power supply ground | Reference for all analog and digital circuitry; must be connected to low-impedance system ground plane to ensure ADC accuracy |
Key Features
| Feature | Design Value |
|---|---|
| Stand-alone thermostat operation | Power-up defaults (comparator mode, TOS=80°C, THYST=75°C, O.S. active low) enable immediate use without microcontroller initialization |
| Programmable O.S. fault tolerance | Configurable 1–6 consecutive overtemperature conversions required before O.S. assertion, reducing false alarms in EMI-prone systems |
| Two operational modes | Comparator mode for automatic hysteresis control vs. interrupt mode for host-triggered response-selected via Configuration register bit D1 |
| Integrated bus timeout recovery | Automatically resets SDA to high-impedance IDLE state if held low >75 ms, preventing bus lockup during controller faults or noise events |
| Shutdown mode with register retention | Reduces current to 4 μA while preserving TOS, THYST, and Configuration register contents for rapid wake-up and resume |
Applications
| Server CPU Thermal Monitoring | Industrial PLC Temperature Guarding |
|---|---|
|
Use Scenario: Mounted near CPU die or VRM on server motherboard to detect thermal throttling thresholds. IC Role / Device Role / Timing Role: Digital temperature sensor and hardware-level overtemperature watchdog; asserts O.S. within 100 ms of crossing TOS to trigger immediate fan ramp-up or system reset. Use Value: Eliminates software polling latency; provides deterministic, fail-safe thermal shutdown independent of OS or firmware state. |
Use Scenario: Embedded in programmable logic controller chassis to monitor ambient cabinet temperature and prevent component derating. IC Role / Device Role / Timing Role: Stand-alone thermal guard with configurable hysteresis; drives relay or optocoupler via O.S. output to cut heater power or activate cooling fans. Use Value: Enables maintenance-free operation for 10+ years with no MCU dependency; fault-tolerant O.S. avoids nuisance trips in factory EMI environments. |
| Network Switch ASIC Thermal Management | Medical Diagnostic Equipment Ambient Sensing |
|
Use Scenario: Distributed across multi-chip module in 10G Ethernet switch to monitor ASIC junction temperature hotspots. IC Role / Device Role / Timing Role: I²C-slave temperature node; multiplexed via A0–A2 addressing onto shared bus; provides 9-bit readings every 100–300 ms for dynamic fan control algorithm. Use Value: Supports precise thermal mapping with <1°C resolution per node; low quiescent current minimizes self-heating error in densely packed modules. |
Use Scenario: Mounted inside enclosure of ultrasound imaging system to monitor internal ambient temperature for sensor calibration compensation. IC Role / Device Role / Timing Role: High-accuracy reference sensor; reads temperature every 500 ms via I²C; feeds data to FPGA for real-time gain/offset correction of analog front-end. Use Value: ±2°C accuracy over –25°C to 100°C ensures diagnostic image stability; SOIC-8 footprint allows placement near thermally sensitive analog components. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital temperature sensor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STLM20DDQ6F | 10-bit resolution (0.25°C LSB), ±1.5°C accuracy (–20°C to 100°C), analog voltage output only; no I²C or O.S. output | Requires external ADC and comparator circuitry; unsuitable for direct O.S.-driven shutdown or multi-sensor bus architectures | Select only when analog interface and higher resolution are prioritized over digital integration and hardware watchdog capability |
| MAX31820 | 1-Wire interface (single-pin bus), ±0.5°C accuracy (–10°C to +85°C), parasitic power capable; no dedicated O.S. pin | Reduces wiring count but lacks hardware interrupt output; requires 1-Wire master support and has slower conversion (100–750 ms) | Prefer for space-constrained designs where single-wire topology outweighs need for deterministic O.S. response and I²C compatibility |
Compared with STLM20DDQ6F and MAX31820, the LM75AIM/NOPB uniquely combines I²C digital interface, programmable open-drain O.S. output, and guaranteed ±2°C accuracy across –25°C to 100°C - making it the optimal choice for embedded thermal watchdogs requiring minimal external components and deterministic hardware-level response.
Availability
LM75AIM/NOPB is available at Aetrix Electronics and suitable for server thermal management, industrial PLC guarding, network switch ASIC monitoring, and medical diagnostic equipment ambient sensing requiring stable component supply and long-term lifecycle assurance.
Supply support for LM75AIM/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets.
The LM75AIM/NOPB belongs to TI's precision analog temperature sensor product line, designed specifically for cost-sensitive, space-constrained thermal monitoring applications requiring hardware-level overtemperature protection and I²C interoperability.
FAQ
What is the default operating mode of the LM75AIM/NOPB at power-up?
The LM75AIM/NOPB powers up in comparator mode with TOS = 80°C, THYST = 75°C, O.S. active low, and pointer register set to the Temperature Register. This allows the LM75AIM/NOPB to function immediately as a stand-alone thermostat without any I²C initialization, making it ideal for systems where firmware may not initialize quickly or reliably.
Can the LM75AIM/NOPB operate without connection to an I²C master?
Yes - the LM75AIM/NOPB is designed for stand-alone operation. With A0–A2 tied to defined logic levels and SCL/SDA pulled up, the LM75AIM/NOPB uses its power-up defaults to assert O.S. when temperature exceeds 80°C and deasserts it below 75°C. No microcontroller or I²C traffic is required for basic thermal protection functionality.
What is the maximum number of LM75AIM/NOPB devices supported on a single I²C bus?
The LM75AIM/NOPB supports up to eight devices on one I²C bus using its three hardware address pins (A2, A1, A0). Each combination of grounded or pulled-high A-pins sets the three LSBs of the fixed 7-bit slave address (1001xxx), enabling unique addressing without software configuration - critical for scalable thermal monitoring in multi-zone systems.
How does the fault queue feature improve reliability in noisy environments?
By programming the LM75AIM/NOPB's fault queue (1–6 consecutive overtemperature readings), the O.S. output only activates after sustained thermal violation - rejecting transient spikes caused by EMI, switching noise, or short-duration load surges. This ensures the LM75AIM/NOPB delivers robust thermal protection in industrial motor drives or power supply enclosures where electrical noise is prevalent.
Is the LM75AIM/NOPB pin-compatible with earlier LM75 variants?
Yes - the LM75AIM/NOPB is a drop-in replacement for the original LM75 and LM75A in SOIC-8 packages. It maintains identical pinout, electrical specifications, register map, and functional behavior, including power-up defaults and I²C protocol compliance. No PCB or firmware changes are required when upgrading to the LM75AIM/NOPB for enhanced manufacturing traceability and RoHS compliance.
LM75AIM/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Sensor Type:
- Digital, Local
- Sensing Temperature - Local:
- -55°C ~ 125°C
- Sensing Temperature - Remote:
- -
- Output Type:
- I2C
- Voltage - Supply:
- 2.7V ~ 5.5V
- Resolution:
- 9 b
- Features:
- Output Switch, Programmable Limit
- Accuracy - Highest (Lowest):
- ±2°C (±3°C)
- Test Condition:
- -25°C ~ 100°C (-55°C ~ 125°C)
- Operating Temperature:
- -55°C ~ 125°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 8-SOIC
LM75AIM/NOPB FAQ
1.How can I place an order for LM75AIM/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM75AIM/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM75AIM/NOPB reliable?
The price and inventory of LM75AIM/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM75AIM/NOPB is usually 5 days.
3.What payment methods are accepted for LM75AIM/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM75AIM/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM75AIM/NOPB?
LM75AIM/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM75AIM/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM75AIM/NOPB?
For technical support, including LM75AIM/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM75AIM/NOPB requirements.
6.How does Aetrix verify that LM75AIM/NOPB is sourced from the original manufacturer or authorized distributors?
All LM75AIM/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM75AIM/NOPB meets industry standards.
7.What is the process for return or replacement of LM75AIM/NOPB?
All LM75AIM/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM75AIM/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM75AIM/NOPB part is unused and in its original packaging.
Return procedure for LM75AIM/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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