Texas Instruments LM81BIMT-3
- Part No.:
- LM81BIMT-3
- Manufacturer:
- Texas Instruments
- Category:
- Thermal Management
- Package:
- 24-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LM81BIMT-3.pdf
- Description:
- IC MONITOR SYS HARDWARE 24TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM81BIMT-3 from Texas Instruments is an SMBus 1.1–compatible hardware monitor IC for PC and server thermal/power management, featuring 6 analog voltage inputs (+12V, +5V, +3.3V, +2.5V, Vccp1, Vccp2), on-die 9-/12-bit temperature sensing (±3°C max error), dual fan tachometer inputs, 8-bit DAC for fan speed control (0–1.25 V), and chassis intrusion detection. It operates from 2.8 V to 3.8 V and supports watchdog-triggered interrupts via INT and T_CRIT_A outputs.
For engineers reviewing the LM81BIMT-3 datasheet, LM81BIMT-3 pinout, LM81BIMT-3 application, or LM81BIMT-3 equivalent, this page delivers verified technical context, real-world monitoring cycle timing (400 ms full sequence), voltage accuracy (±1.2% max), temperature resolution (0.5°C in 9-bit mode), SMBus 1.1 timing compliance, and validated alternatives for server motherboard BOMs requiring ACPI-compliant system health supervision.
Technical Context
The LM81BIMT-3 integrates a Delta-Sigma ADC with 8-bit resolution and ±1.2% total unadjusted error across six scaled analog inputs, plus a dedicated 9-/12-bit two's-complement temperature sensor with programmable resolution. Its internal monitoring loop executes a fixed 9-step round-robin sequence-temperature, Vccp2, +12Vin, +5Vin, +3.3Vin, Vccp1, +2.5Vin, FAN1, FAN2-completing every ~400 ms at 25°C.
It implements SMBus 1.1 slave interface logic with timeout recovery (35 ms), open-drain SMBData/SMBCLK, and address configuration via A0/A1 pins (default 0x2C). Critical functions include dual interrupt outputs (INT maskable per source, T_CRIT_A dedicated for thermal runaway), 20 ms active-low RESET pulse generation, and CI latch/clear capability with internal open-drain drive.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.8 V to 3.8 V - Enables direct connection to +3.3 V rail with bypassing (10 µF + 0.1 µF) without LDO. |
| Temperature Accuracy | ±3°C (max, −40°C to +125°C) - Specifies worst-case deviation for thermal shutdown threshold calibration. |
| ADC Voltage Error | ±1.2% (max, +2.5V/+3.3V inputs) - Defines worst-case scaling error for power supply margin verification. |
| Fan Input Resolution | 255-count 8-bit counter - Maps directly to RPM range (e.g., 153 count = 4400 RPM with divisor 2). |
| DAC Output Range | 0 V to +1.25 V - Matches standard PWM-to-analog fan control interface requirements. |
| SMBus Compatibility | SMBus 1.1 - Guarantees interoperability with Intel PIIX4, ICH, and compatible host controllers. |
| Monitoring Cycle Time | ~400 ms (full 9-input sequence) - Determines minimum response latency for overvoltage/overtemperature events. |
Pinout & Package
TSSOP-24 package (TI PW24A), 0.65 mm pitch, thermally enhanced with exposed pad (not electrically connected). Requires low-noise analog ground plane for DAC and ADC performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0/NTEST_OUT | Address LSB / NAND test output | Configures SMBus address bit 0; drives high during board-level connectivity testing. |
| A1 | Address MSB | Configures SMBus address bit 1; sets base address to 0x2C when low/low. |
| SMBData | SMBus bidirectional data | Open-drain I/O; requires external pull-up; handles all register reads/writes. |
| SMBCLK | SMBus clock input | Asynchronous to internal ADC/fan clocks; defines serial bus timing (min 2.5 µs period). |
| FAN1, FAN2 | Fan tachometer inputs | Schmitt-trigger digital inputs; accept 0–V+ signals; measure period for RPM calculation. |
| CI | Chassis intrusion latch/clear | Active-high event input; also provides 20 ms open-drain reset pulse when cleared via register. |
| T_CRIT_A | Critical temperature alarm | Active-low open-drain output; asserts independently of INT for fastest thermal fault response. |
| V+ | Power supply input | 2.8–3.8 V analog/digital supply; bypassing critical for DAC linearity and ADC noise floor. |
| INT | Programmable interrupt output | Active-low open-drain; masks individual sources (temp, voltage, fan, CI) via Interrupt Mask Registers. |
| DACOut/NTEST_IN | Fan control output / test input | 0–1.25 V analog output; forced high enables NAND tree test mode. |
| RESET | System reset generator | Active-low open-drain; 20 ms pulse generated on Configuration Register Bit 4 assertion. |
| GND | Analog/digital reference | Single ground pin; must connect to low-noise analog plane to minimize DAC/ADC errors. |
| +12Vin to +2.5Vin, Vccp1/Vccp2 | Analog voltage monitoring inputs | High-impedance (90 kΩ min) inputs; require external resistor dividers for +12V/+5V scaling. |
| VID4–VID0 | Pentium PRO voltage ID inputs | Digital inputs capturing processor VID code (1.5–2.9 V range); read into VID/Fan Divisor Register. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 9-/12-bit temperature sensor | Eliminates external thermistor network; 0.5°C LSB resolution enables precise thermal throttling thresholds. |
| 6-channel scalable analog monitoring | Supports direct +12V/+5V/+3.3V/+2.5V, Vccp1, and Vccp2 measurement with ±1.2% max error-no external op-amps needed. |
| Dual independent fan tachometer inputs | Measures RPM via period counting (not frequency); accommodates slow-rise fans with Schmitt-trigger inputs. |
| Programmable watchdog and interrupt structure | Two hardware outputs (INT, T_CRIT_A) with per-source masking and latching-enables prioritized fault handling in BIOS. |
| Chassis intrusion detection with latch/clear | Hardware-level security event capture; CI pin retains state until cleared by register write or 20 ms pulse. |
| SMBus 1.1 timeout recovery | Auto-resets interface after 35 ms bus stall-prevents lockup during host controller resets or firmware hangs. |
Applications
| Server Motherboard Thermal Monitoring | Desktop PC Power Supply Supervision |
|---|---|
|
Use Scenario: Real-time tracking of CPU core voltage (Vccp1), +12V ATX rail, +3.3V standby, and heatsink temperature in dual-socket x86 servers. IC Role / Device Role / Timing Role: Central hardware monitor acquiring synchronized voltage/temp/fan data every 400 ms; triggers T_CRIT_A within 100 ms of thermal violation. Use Value: Enables BIOS-driven thermal throttling and graceful shutdown before CPU damage occurs at >100°C junction. |
Use Scenario: Verifying +5V, +3.3V, and +12V rail stability during POST and under GPU load in consumer desktop motherboards. IC Role / Device Role / Timing Role: ADC-based voltage supervisor feeding watchdog limits to host EC; reports out-of-spec conditions via SMBus-interrupt handshake. Use Value: Prevents boot failure or random reboots caused by aging PSU ripple or capacitor degradation. |
| Embedded Industrial Controller Health Management | Network Appliance Fan Speed Control |
|
Use Scenario: Monitoring 24 VDC input (scaled to +12Vin), +5V logic rail, and ambient temperature in DIN-rail PLCs operating at −40°C to +85°C. IC Role / Device Role / Timing Role: Standalone health monitor interfacing to ARM host via SMBus; uses VID inputs to detect supply configuration changes. Use Value: Extends field lifetime by detecting early-stage power rail drift before functional failure. |
Use Scenario: Dynamically adjusting cooling fan speed in 1U rack-mounted firewalls using DAC output based on CPU die temperature. IC Role / Device Role / Timing Role: Closed-loop thermal controller: reads temp → calculates DAC value → updates 0–1.25 V output → drives fan driver stage. Use Value: Reduces acoustic noise by 8–12 dB(A) versus fixed-speed operation while maintaining <±2°C thermal margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar hardware monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM81CIMT-3 | SMBus 1.0 interface; ±2% voltage monitoring error (vs. ±1.2% for LM81BIMT-3); identical pinout and register map. | Lacks improved voltage accuracy needed for tight-margin server VRMs; suitable for cost-sensitive desktops. | Select LM81CIMT-3 only if SMBus 1.0 host compatibility is required and ±2% voltage tolerance is acceptable. |
| ADM1027ASTZ | AD1027 offers 12-bit ADC (0.5% typical error), integrated fan controller with PWM output, and extended −40°C to +125°C spec-but requires external temp sensor. | Designed for high-end workstations needing finer voltage granularity and PWM fan drive; no on-die temp sensor. | Choose ADM1027ASTZ when higher ADC precision and PWM fan control outweigh loss of monolithic integration. |
Compared with LM81CIMT-3, the LM81BIMT-3 delivers tighter voltage monitoring accuracy critical for modern server VRMs, while ADM1027ASTZ trades integrated temperature sensing for superior ADC linearity and native PWM output-making LM81BIMT-3 optimal for space-constrained, thermally integrated server BMC designs.
Availability
LM81BIMT-3 is available at Aetrix Electronics and suitable for server motherboard design, industrial embedded controller development, and network appliance thermal management requiring stable component supply and long-term lifecycle support.
Supply support for LM81BIMT-3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of heritage in precision data acquisition and system monitoring ICs.
The LM81 product line was designed specifically for ACPI-compliant hardware monitoring in x86 platforms, integrating voltage, temperature, fan, and intrusion sensing into a single SMBus-slave device for motherboard manufacturers.
FAQ
What is the SMBus address of the LM81BIMT-3 and how is it configured?
The default SMBus address of the LM81BIMT-3 is 0x2C (binary 0101100), set by internal logic and A0/A1 pin states. A0 and A1 serve as the two LSBs of the 7-bit address; tying both low yields 0x2C. The Serial Bus Address Register (0x48) allows software modification of upper bits, but A0/A1 remain hardware-controlled. This ensures predictable enumeration in BIOS without requiring EEPROM programming. The LM81BIMT-3 strictly operates as an SMBus slave and does not support master arbitration.
Does the LM81BIMT-3 support both 9-bit and 12-bit temperature resolution, and how is it selected?
Yes, the LM81BIMT-3 supports both 9-bit (0.5°C LSB) and 12-bit (0.0625°C LSB) temperature resolution. Selection is controlled via the Extended Mode Register 1 (0x4C) and Temperature Configuration Register (0x4B). Setting bit 0 of the Temperature Configuration Register enables 12-bit mode, which increases conversion time from 50 ms to 400 ms per reading. The 12-bit result occupies two bytes in Value RAM (addresses 0x20–0x21), while 9-bit uses one byte (0x20). This dual-mode capability allows trade-offs between thermal response speed and precision in BIOS thermal algorithms.
How does the LM81BIMT-3 handle fan speed measurement, and what is the RPM calculation method?
The LM81BIMT-3 measures fan speed by counting tachometer pulse periods-not frequency-using two independent 8-bit counters (FAN1/FAN2). Each fan input is a Schmitt-trigger digital input accepting 0–V+ signals. Full-scale count is 255 (indicating stopped/slow fan); nominal RPM is calculated as (153 × 60) / (count × divisor), where divisor is programmable (1–4) via VID/Fan Divisor Register (0x47). For example, with divisor = 2 and count = 153, RPM = 4400. This period-based method improves low-RPM accuracy versus frequency counting.
What is the function of the CI (Chassis Intrusion) pin on the LM81BIMT-3, and how is it latched?
The CI pin on the LM81BIMT-3 is a dual-function terminal: it accepts an active-high signal from a mechanical switch indicating case opening (latching the event), and provides an active-low 20 ms open-drain reset pulse when cleared via the CI Clear Register (0x46). Once asserted, the intrusion state remains latched in Interrupt Status Register 2 (bit 0) until explicitly cleared by writing to 0x46. This hardware-level persistence ensures BIOS can detect tampering even after power cycles, supporting platform security policies without host CPU intervention.
Can the LM81BIMT-3 monitor negative voltages such as −12V, and if so, how?
Yes, the LM81BIMT-3 can monitor −12V using the Vccp2 analog input. The datasheet specifies Vccp2 as a dedicated input for −12V or secondary processor voltage, with absolute input range of −0.05 V to +6.0 V. To measure −12V, an external resistor divider must be used to scale the negative voltage to a positive level within the LM81BIMT-3's valid input range (e.g., −12V → +2.5V). The LM81BIMT-3's internal 90 kΩ input resistance and ±1 µA DC input current ensure minimal loading on the divider network, preserving measurement accuracy.
LM81BIMT-3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Function:
- Hardware Monitor
- Sensor Type:
- Internal and External
- Sensing Temperature:
- -40°C ~ 125°C
- Accuracy:
- ±3°C(Max)
- Topology:
- ADC (Sigma Delta), Comparator, Fan Speed Control, Register Bank
- Output Type:
- 2-Wire SMBus
- Output Alarm:
- Yes
- Output Fan:
- Yes
- Voltage - Supply:
- 2.8V ~ 3.8V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TSSOP
LM81BIMT-3 FAQ
1.How can I place an order for LM81BIMT-3 through Aetrix?
Please submit a Request for Quotation (RFQ) for LM81BIMT-3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM81BIMT-3 reliable?
The price and inventory of LM81BIMT-3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM81BIMT-3 is usually 5 days.
3.What payment methods are accepted for LM81BIMT-3?
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Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM81BIMT-3?
LM81BIMT-3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM81BIMT-3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM81BIMT-3?
For technical support, including LM81BIMT-3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM81BIMT-3 requirements.
6.How does Aetrix verify that LM81BIMT-3 is sourced from the original manufacturer or authorized distributors?
All LM81BIMT-3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM81BIMT-3 meets industry standards.
7.What is the process for return or replacement of LM81BIMT-3?
All LM81BIMT-3 units undergo pre-shipment inspection (PSI). If there is an issue with LM81BIMT-3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM81BIMT-3 part is unused and in its original packaging.
Return procedure for LM81BIMT-3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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