Texas Instruments LM86CIMMX/NOPB
- Part No.:
- LM86CIMMX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Analog and Digital Output
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
LM86CIMMX/NOPB.pdf
- Description:
- SENSOR DIGITAL 0C-85C 8VSSOP
- Quantity:
- Payment:

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Product details
Overview
LM86CIMMX/NOPB from Texas Instruments is an 11-bit remote/local digital temperature sensor with SMBus 2.0 interface, ±0.75°C remote diode accuracy at 30°C–50°C ambient and 60°C–100°C remote junction, 0.125°C remote resolution, and dual open-drain ALERT/T_CRIT_A outputs for thermal management in computing systems.
For engineers reviewing the LM86CIMMX/NOPB datasheet, LM86CIMMX/NOPB pinout, LM86CIMMX/NOPB application, or LM86CIMMX/NOPB equivalent, key selection factors include remote diode nonideality compensation via offset register, T_CRIT_A hysteresis programmability, SMBus timeout reset behavior, and VSSOP-8 package compatibility with thermal diode-connected processors like Pentium III.
Technical Context
The LM86CIMMX/NOPB implements a delta-VBE sensing architecture with separate 10-bit-plus-sign ADC paths for local die and remote diode junctions. Its digital comparator block independently evaluates local/remote temperatures against HIGH, LOW, and T_CRIT registers, driving ALERT on any limit violation and T_CRIT_A only on critical overtemperature events with user-defined hysteresis.
It supports three ALERT operating modes-comparator, interrupt flag, and SMBus ARA protocol-with configuration controlled by the FILTER and ALERT CONFIGURE register (address 0xBF) and Configuration register (0x09). The device maintains SMBus 2.0 compliance including TIMEOUT reset (25–35 ms low on SMBCLK/SMBData) and 100 kHz max clock frequency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Remote Temp Accuracy | ±0.75°C max at TA=30°C, TD=80°C - enables precise CPU die thermal monitoring without calibration |
| Local Temp Accuracy | ±3.0°C max from 25°C to 125°C - sufficient for board-level ambient or IC junction sensing |
| Remote Resolution | 0.125°C (11-bit) - supports fine-grained fan speed control and thermal throttling decisions |
| Supply Voltage | 3.0 V to 3.6 V - compatible with standard 3.3 V logic rails and low-noise LDOs |
| Quiescent Current | 0.8 mA typ at 16 Hz conversion rate - minimizes self-heating impact on local temperature reading |
| SMBus Compatibility | Fully compliant with SMBus 2.0, including ARA protocol and TIMEOUT reset - ensures interoperability in multi-sensor server management buses |
| T_CRIT_A Hysteresis | User-programmable via TH register - prevents chatter during critical thermal shutdown transitions |
Pinout & Package
LM86CIMMX/NOPB is housed in an 8-pin VSSOP package (3.0 mm × 3.0 mm, 0.65 mm pitch), optimized for space-constrained laptop and server motherboard layouts. Thermal pad is not present; PCB copper area under package aids heat dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Pin 1) | Positive supply input | Must be decoupled with ≥0.1 µF ceramic capacitor close to pin; voltage must stay within 3.0–3.6 V to avoid accuracy degradation |
| D+ (Pin 2) | Diode current source | Drives constant current into anode of remote diode (e.g., processor thermal diode); floating or short-to-VDD triggers OPEN fault |
| D− (Pin 3) | Diode return sink | Completes remote diode current path; short-to-ground forces −128°C remote reading |
| T_CRIT_A (Pin 4) | Critical alarm output | Active-low open-drain; requires external pull-up; asserts only when temp > T_CRIT and clears only when temp < (T_CRIT − TH) |
| GND (Pin 5) | Power ground | Must connect to clean analog/digital ground plane; shared ground with remote diode cathode improves measurement stability |
| ALERT (Pin 6) | General alarm output | Active-low open-drain; configurable as comparator, interrupt, or SMBus ARA responder via register settings |
| SMBData (Pin 7) | SMBus bidirectional data | Open-drain; requires external pull-up; supports SMBus 2.0 timing including tTIMEOUT reset |
| SMBCLK (Pin 8) | SMBus clock input | Input-only; no clock stretching; falling edge initiates data sampling; low >25 ms resets state machine |
Key Features
| Feature | Design Value |
|---|---|
| Remote diode offset register | Compensates for nonideality factor deviations (e.g., non-Pentium III diodes), eliminating software calibration overhead |
| Programmable T_CRIT hysteresis | Prevents oscillatory shutdown/restart cycles during thermal transients near critical thresholds |
| Three-mode ALERT output | Enables flexible system integration: hardware-only comparator mode, interrupt-driven firmware response, or multi-device SMBus ARA arbitration |
| Diode fault detection | Automatically flags D+ open, short-to-VDD, or short-to-GND conditions via OPEN bit and forced extreme temperature codes |
| 16 Hz default conversion rate | Balances responsiveness (31.25 ms per full local+remote cycle) and quiescent power (0.8 mA) |
Applications
| Laptop CPU Thermal Monitoring | Server Blade Temperature Control |
|---|---|
Use Scenario: Real-time tracking of mobile processor die temperature using its integrated thermal diode. IC Role / Device Role / Timing Role: Remote diode sensor with factory-trimmed 1.008 nonideality factor and offset register for cross-processor compatibility. Use Value: Enables dynamic fan speed adjustment and thermal throttling with ±0.75°C accuracy at typical operating points, reducing acoustic noise and extending battery life. | Use Scenario: Simultaneous monitoring of CPU, memory DIMM, and VRM hotspots across dense 1U server blades. IC Role / Device Role / Timing Role: Dual-sensing node on SMBus 2.0 management bus, supporting ARA protocol for rapid fault isolation among dozens of sensors. Use Value: Eliminates polling overhead and guarantees deterministic alert response time, improving system uptime and predictive maintenance capability. |
| Workstation GPU Thermal Protection | Industrial Embedded Controller Cooling |
Use Scenario: Protecting high-power discrete graphics cards from thermal runaway during sustained compute loads. IC Role / Device Role / Timing Role: Local + remote temperature monitor interfacing with GPU's on-die diode and heatsink thermistor. Use Value: Independent T_CRIT_A output triggers immediate power-down while ALERT signals firmware for graceful workload migration. | Use Scenario: Maintaining safe operating temperature in fanless industrial PLCs with limited airflow and wide ambient range (0°C to 85°C). IC Role / Device Role / Timing Role: Low-quiescent (0.8 mA), wide-temp (0°C to +125°C) sensor with shutdown mode for energy-sensitive deployments. Use Value: Ensures reliable operation without active cooling, meeting EN 61000-6-2 immunity requirements through robust SMBus noise rejection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar remote/local temperature sensing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADM1032ARQZ | Pin- and register-compatible; identical SMBus interface and 0.125°C remote resolution but ±1.0°C remote accuracy at 30°C–50°C ambient | Less accurate for tight-margin CPU thermal management; suitable where ±1.0°C tolerance is acceptable | Select ADM1032ARQZ if legacy design reuse is prioritized and accuracy margin allows ±1.0°C error |
| MAX6657AESA+ | Same 8-pin SOIC package; supports 3.0–5.5 V supply but lacks T_CRIT_A output and SMBus ARA protocol support | Requires external logic for critical shutdown; not drop-in for systems relying on dedicated T_CRIT_A assertion | Choose MAX6657AESA+ only when wider supply range is mandatory and dual-alarm outputs are unnecessary |
Compared with ADM1032ARQZ and MAX6657AESA+, LM86CIMMX/NOPB delivers superior remote accuracy (±0.75°C vs. ±1.0°C/±2.0°C), integrated T_CRIT_A with hysteresis, and full SMBus 2.0 ARA compliance-making it optimal for high-reliability computing thermal management where precision and protocol robustness are critical.
Availability
LM86CIMMX/NOPB is available at Aetrix Electronics and suitable for laptop thermal management, server blade monitoring, workstation GPU protection, and industrial embedded controller cooling requiring stable component supply and long-term lifecycle support.
Supply support for LM86CIMMX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with emphasis on reliability, precision, and industrial-grade performance.
The LM86CIMMX/NOPB belongs to TI's precision analog temperature sensor product line, engineered specifically for real-time thermal monitoring in computing platforms where remote diode accuracy, SMBus interoperability, and dual-alarm signaling are essential.
FAQ
What is the remote diode nonideality factor calibrated for in the LM86CIMMX/NOPB?
The LM86CIMMX/NOPB is factory trimmed for a typical remote diode nonideality factor of 1.008, matching the thermal diode characteristics of Intel Pentium III processors. This calibration enables ±0.75°C accuracy at TA=30°C and TD=80°C without software correction. For other processors-including newer CPUs-the Offset register (RTOLB/RTOHB) must be programmed to compensate for differing nonideality values, and TI recommends contacting [email protected] for validated coefficients. The LM86CIMMX/NOPB does not auto-detect or adapt to nonideality changes.
How does the T_CRIT_A output behave differently from the ALERT output on the LM86CIMMX/NOPB?
The T_CRIT_A output on the LM86CIMMX/NOPB is a dedicated critical-temperature comparator with built-in hysteresis, asserting only when temperature exceeds the T_CRIT setpoint and clearing only when temperature falls below (T_CRIT − TH), where TH is the hysteresis value in the Hysteresis register. In contrast, the ALERT output is multifunctional-it responds to violations of HIGH, LOW, or T_CRIT limits and can operate as a comparator, interrupt flag, or SMBus ARA responder depending on the ALERT configure bit (D0 of register 0xBF). The LM86CIMMX/NOPB uses separate status bits and mask controls for each function, ensuring independent alarm handling.
Can the LM86CIMMX/NOPB measure temperature using only its local sensor, without a remote diode connection?
Yes, the LM86CIMMX/NOPB can operate exclusively in local temperature sensing mode. Its on-board thermal sensor provides ±3.0°C accuracy from 25°C to 125°C and reports data in 8-bit two's complement format (1°C LSB). All remote diode circuitry-including D+ and D− pins-can remain unconnected without affecting local functionality. The device powers up with local temperature defaulting to 0°C and updates readings every 31.25 ms at the default 16 Hz conversion rate. No configuration changes are required to disable remote sensing; unused D+ and D− pins should be left floating or tied to GND per layout guidelines to avoid noise coupling.
What happens if the SMBCLK or SMBData line is held low for longer than 25 ms on the LM86CIMMX/NOPB?
If either SMBCLK or SMBData is held low for longer than the specified tTIMEOUT window (25–35 ms), the LM86CIMMX/NOPB resets its SMBus state machine and places SMBData and SMBCLK pins into high-impedance mode. This recovery mechanism prevents bus lockup during communication errors or master faults. After timeout, the device resumes normal SMBus slave operation upon receipt of a valid START condition. This behavior is fully compliant with SMBus 2.0 specification and requires no firmware intervention. Note that the ALERT and T_CRIT_A outputs retain their last asserted/deasserted state during timeout and are not affected by the reset.
Does the LM86CIMMX/NOPB support SMBus Alert Response Address (ARA) protocol, and how is it enabled?
Yes, the LM86CIMMX/NOPB fully supports SMBus 2.0 ARA protocol for multi-device alert arbitration. To enable ARA response, the ALERT configure bit (D0) in the FILTER and ALERT CONFIGURE register (address 0xBF) must be set to low (power-on default), and the ALERT mask bit (D7) in the Configuration register (0x09) must be cleared. When the master issues an ARA command (0x0C), all alerting devices transmit their 7-bit address; the LM86CIMMX/NOPB releases its ALERT pin after successful transmission and sets the ALERT mask bit to prevent re-triggering. The master must then read the Status register (0x02) and clear the mask bit to restore alert functionality. This sequence ensures deterministic, low-latency fault identification in complex management buses.
LM86CIMMX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Sensor Type:
- Digital, Local/Remote
- Sensing Temperature - Local:
- 0°C ~ 85°C
- Sensing Temperature - Remote:
- 0°C ~ 85°C
- Output Type:
- SMBus
- Voltage - Supply:
- 3V ~ 3.6V
- Resolution:
- 7 b (Local), 10 b (Remote)
- Features:
- One-Shot, Output Switch, Programmable Limit, Shutdown Mode, Standby Mode
- Accuracy - Highest (Lowest):
- ±3°C
- Test Condition:
- 25°C ~ 125°C
- Operating Temperature:
- 0°C ~ 125°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 8-VSSOP
LM86CIMMX/NOPB FAQ
1.How can I place an order for LM86CIMMX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM86CIMMX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM86CIMMX/NOPB reliable?
The price and inventory of LM86CIMMX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM86CIMMX/NOPB is usually 5 days.
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Once your LM86CIMMX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM86CIMMX/NOPB?
For technical support, including LM86CIMMX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM86CIMMX/NOPB requirements.
6.How does Aetrix verify that LM86CIMMX/NOPB is sourced from the original manufacturer or authorized distributors?
All LM86CIMMX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM86CIMMX/NOPB meets industry standards.
7.What is the process for return or replacement of LM86CIMMX/NOPB?
All LM86CIMMX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM86CIMMX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM86CIMMX/NOPB part is unused and in its original packaging.
Return procedure for LM86CIMMX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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