Texas Instruments LM93CIMTX/NOPB
- Part No.:
- LM93CIMTX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Specialized
- Package:
- 56-TFSOP (0.240", 6.10mm Width)
- Datasheet:
-
LM93CIMTX/NOPB.pdf
- Description:
- IC INTERFACE SPECIALIZED 56TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM93CIMTX/NOPB from Texas Instruments is a hardware monitor IC for dual-processor server management, integrating 16-channel voltage monitoring (±12V, +3.3V, +5V, Vccp1/2), dual remote thermal diode sensing (CPU1/CPU2), on-die ambient temperature measurement, two PWM fan control outputs, four tachometer inputs, and SMBus 2.0 interface - deployed in Xeon-class motherboard baseboard management.
For engineers reviewing the LM93CIMTX/NOPB datasheet, LM93CIMTX/NOPB pinout, LM93CIMTX/NOPB application, or LM93CIMTX/NOPB equivalent, this page delivers verified specifications, validated pin functions, real-world server thermal/power monitoring use cases, and confirmed alternative parts for dual-CPU thermal throttling and fan control system design.
Technical Context
The LM93CIMTX/NOPB implements an 8-bit ΣΔ ADC with inherent averaging (1.5 ms for voltage, 8.4 ms for temperature), enabling stable readings amid noise-prone server power rails. It supports autonomous fan control via two 13-step lookup tables, each driven by up to four temperature zones (remote CPU1, remote CPU2, internal die, SMBus-written external value).
It performs independent PROCHOT monitoring per processor, dynamic VID decoding (6-bit per CPU), VRD_HOT detection, and THERMTRIP masking - all synchronized over SMBus 2.0 with configurable slave address (tri-level pin) and block read/write support. The device operates across 0°C to +85°C ambient, with remote diode accuracy of ±3°C over 0°C to +125°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Voltage Monitoring Channels | 16 analog inputs: supports +12V (×3), +5V, +3.3V SB, −12V (with external scaling), Vccp1/Vccp2, FSB_Vtt, Mem_Core, SCSI_Core, Gbit_Core, ICH_Core, and more - each with dedicated limit registers. |
| Temperature Sensing | Three physical sources: two remote diodes (CPU1/CPU2), one internal sensor; 1°C digital resolution; ±3°C max error over 0°C–125°C remote range. |
| Fan Control Outputs | Two open-drain PWM outputs (PWM1/PWM2); 13-step programmable lookup table per output; 0.5°C effective resolution for fan speed decision logic. |
| Fan Tachometer Inputs | Four GPIO pins configurable as tachometer inputs (GPIO_0–GPIO_3); support smart tachometer mode with automatic pulse counting and RPM calculation. |
| Digital Interface | SMBus 2.0 compliant (2-wire); byte/block read/write; tri-level Address Select pin enables 1 of 3 slave addresses; 5V-tolerant SMBDAT/SMBCLK. |
| Power Supply | +3.0V to +3.6V operation; 0.9 mA typical supply current; 2.5V reference output (VREF) usable for external circuitry. |
| Package | 56-pin TSSOP (Package DGG0056A); RoHS-compliant, lead-free (NOPB suffix); thermal pad not present. |
Pinout & Package
LM93CIMTX/NOPB is housed in a 56-pin Thin Shrink Small Outline Package (TSSOP), dimensions 14.0 mm × 6.1 mm × 1.2 mm, with 0.5 mm pitch and exposed pad not included. Pin functions are validated per TI SNAS210E Rev. MARCH 2013.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GPIO_0/TACH1 – Pin 1 | Fan tachometer input / GPIO | Configurable open-drain input; measures fan RPM via pulse counting; default tachometer role in server thermal management. |
| REMOTE1+ / REMOTE1− – Pins 19–20 | CPU1 thermal diode interface | Current-source-driven positive terminal and current-sink negative terminal for embedded Xeon thermal diode; supports MMBT3904 discrete diode alternative. |
| PWM1 / PWM2 – Pins 41–42 | Fan speed control outputs | Open-drain PWM signals driving external MOSFETs or fan controllers; each independently mapped to 4-zone temperature lookup tables. |
| P1_PROCHOT / P2_PROCHOT – Pins 49–50 | Processor hot signal interface | Bidirectional open-drain lines connected to CPU1/CPU2 PROCHOT#; enable hardware-based thermal throttling coordination with VRDs. |
| AD_IN7 / AD_IN8 – Pins 29–30 | Vccp monitoring inputs | Analog inputs for +Vccp (CPU core voltage) of Processor 1 and Processor 2; require no external scaling resistors; full-scale = 1.6V. |
| SMBDAT / SMBCLK – Pins 13–14 | SMBus communication interface | 5V-tolerant, open-drain bidirectional data and clock lines; implement SMBus 2.0 protocol including alert response and block transfers. |
Key Features
| Feature | Design Value |
|---|---|
| Dual dynamic VID monitoring | Decodes 6-bit VID codes from two processors (P1_VID0–P1_VID5, P2_VID0–P2_VID5) to track real-time Vccp changes during frequency scaling. |
| Autonomous fan control with boost | Programmable fan boost activates on rapid temperature rise, overriding lookup table to prevent thermal runaway before software intervention. |
| Digital temperature filter | Configurable smoothing algorithm reduces noise-induced fan oscillation without sacrificing thermal response latency in high-airflow server chassis. |
| XOR-tree test mode | Hardware self-test capability using ALERT/XtestOut (Pin 15) to verify register integrity and pin functionality during manufacturing or field diagnostics. |
| SCSI termination monitoring | Two dedicated digital inputs (SCSI_TERM1/2, Pins 11–12) detect fuse-open conditions on SCSI channels - repurposable as general-purpose fault inputs. |
Applications
| Server Dual-CPU Thermal Management | Workstation Power Integrity Monitoring |
|---|---|
Use Scenario: Real-time thermal supervision of dual Xeon processors in 1U/2U rack servers, coordinating fan speed, PROCHOT assertion, and Vccp tracking during workload bursts. IC Role / Device Role / Timing Role: Central hardware monitor managing temperature zones, voltage rails, and fan dynamics autonomously - decoupled from host BIOS/firmware timing. Use Value: Enables deterministic thermal throttling and silent cooling via 0.5°C-resolution fan control, reducing acoustic noise while maintaining <85°C CPU junction limits. |
Use Scenario: Monitoring 16 voltage domains (including ±12V, Vccp, memory rails) on high-end workstations with multi-GPU and ECC RAM subsystems. IC Role / Device Role / Timing Role: Analog front-end and digital supervisor providing 8-bit voltage measurements with ±2% FS accuracy and SMBus-accessible status registers. Use Value: Detects rail collapse or drift (e.g., +12V drop below 11.4V) within 100 ms monitoring cycle, triggering ALERT# before system instability occurs. |
| Baseboard Management Controller (BMC) Co-Processor | Multi-Microprocessor Equipment Health Hub |
Use Scenario: Offloading thermal/voltage telemetry from BMC firmware in OpenBMC or AST2600-based systems to reduce host CPU interrupt load. IC Role / Device Role / Timing Role: Dedicated SMBus slave device supplying pre-processed temperature and voltage data to BMC via block reads - minimizing bus contention. Use Value: Reduces BMC polling overhead by 70% vs. discrete sensor + ADC solutions; supports simultaneous zone updates without register locking. |
Use Scenario: Unified health monitoring across quad-processor telecom blades or storage controllers where space-constrained PCBs demand single-chip integration. IC Role / Device Role / Timing Role: Single-ASIC solution replacing legacy ASIC + discrete ADC + GPIO expanders - consolidating 16 voltage, 3 temp, 4 tach, 8 GPIO functions. Use Value: Cuts BOM count by ≥12 components and eliminates interposer routing complexity for remote diode traces and VID bus fanout. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar hardware monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM87CIMT/NOPB | 8-channel voltage monitor, single remote diode, no VID/PROCHOT support, 24-pin TSSOP; lacks dual-CPU features and fan lookup tables. | Targeted at single-processor workstations or low-end servers; insufficient for Xeon dual-socket thermal coordination. | Select only if dual-CPU monitoring, VID decoding, or autonomous fan control are unnecessary. |
| ADM1027ARUZ | 12-channel voltage monitor, dual remote diodes, SMBus 2.0, but no VID/PROCHOT; uses 10-bit ADC; 28-pin TSSOP; no PWM outputs - requires external fan drivers. | Used in mid-range servers where fan control is handled by separate microcontroller; lacks integrated PWM and lookup table logic. | Choose when needing higher ADC resolution (10-bit) and lower channel count, but willing to add external fan driver circuitry. |
Compared with LM87CIMT/NOPB and ADM1027ARUZ, the LM93CIMTX/NOPB uniquely integrates dual-processor VID decoding, PROCHOT signaling, and autonomous PWM fan control - eliminating need for external logic in Xeon-class server baseboard designs.
Availability
LM93CIMTX/NOPB is available at Aetrix Electronics and suitable for server thermal management, workstation power integrity verification, and baseboard management controller (BMC) co-processing requiring stable component supply and long-lifecycle industrial availability.
Supply support for LM93CIMTX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of heritage in precision analog ICs for industrial and computing infrastructure.
The LM93CIMTX/NOPB belongs to TI's Hardware Monitor product line, engineered specifically for high-reliability dual-processor server platforms requiring autonomous thermal regulation, multi-rail voltage supervision, and SMBus-integrated system management.
FAQ
What is the operating temperature range for the LM93CIMTX/NOPB?
The LM93CIMTX/NOPB is specified for operation from 0°C to +85°C ambient. Its internal temperature sensor and remote diode interfaces maintain accuracy across this range, with remote diode sensing functional from 0°C to +125°C - critical for Xeon processor junction monitoring. The device's thermal performance is validated per TI SNAS210E, and derating is not required within this envelope.
Does the LM93CIMTX/NOPB support both +12V and −12V rail monitoring?
Yes, the LM93CIMTX/NOPB supports monitoring of three +12V rails (AD_IN1–AD_IN3) and one −12V rail (AD_IN15). The +12V inputs use internal scaling; −12V requires external resistor network and offset (e.g., 3.3V SB) to shift into the 0–1.236V input range. Full-scale −12V corresponds to 0.309V at AD_IN15, with register code 40h.
How many temperature zones can drive fan control on the LM93CIMTX/NOPB?
The LM93CIMTX/NOPB supports four independent temperature zones for fan control: Zone 1 (CPU1 remote diode), Zone 2 (CPU2 remote diode), Zone 3 (internal die sensor), and Zone 4 (externally written value via SMBus). Each PWM output (PWM1/PWM2) can be assigned up to four zones, enabling complex, hierarchical fan response profiles.
Is the LM93CIMTX/NOPB pin-compatible with earlier TI hardware monitors like the LM85?
No, the LM93CIMTX/NOPB is not pin-compatible with the LM85. It uses a 56-pin TSSOP package versus the LM85's 28-pin SOIC/TSSOP, and introduces new signals including P1_VID0–P1_VID5, P2_VID0–P2_VID5, P1_PROCHOT, P2_PROCHOT, and dual PWM outputs - requiring unique PCB layout and firmware adaptation.
What SMBus features does the LM93CIMTX/NOPB implement beyond basic read/write?
The LM93CIMTX/NOPB implements full SMBus 2.0 compliance: block read/write, alert response protocol, and configurable slave address (via tri-level Address Select pin). It supports ALERT# assertion on limit violations and includes XOR-tree test mode for hardware diagnostics - features essential for robust server management bus architecture.
LM93CIMTX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 56-TFSOP (0.240", 6.10mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Monitors
- Interface:
- 2-Wire SMBus
- Voltage - Supply:
- 3V ~ 3.6V
- Supplier Device Package:
- 56-TSSOP
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
LM93CIMTX/NOPB FAQ
1.How can I place an order for LM93CIMTX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM93CIMTX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM93CIMTX/NOPB reliable?
The price and inventory of LM93CIMTX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM93CIMTX/NOPB is usually 5 days.
3.What payment methods are accepted for LM93CIMTX/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM93CIMTX/NOPB transactions.
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4.How is shipping managed for LM93CIMTX/NOPB?
LM93CIMTX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM93CIMTX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM93CIMTX/NOPB?
For technical support, including LM93CIMTX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM93CIMTX/NOPB requirements.
6.How does Aetrix verify that LM93CIMTX/NOPB is sourced from the original manufacturer or authorized distributors?
All LM93CIMTX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM93CIMTX/NOPB meets industry standards.
7.What is the process for return or replacement of LM93CIMTX/NOPB?
All LM93CIMTX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM93CIMTX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM93CIMTX/NOPB part is unused and in its original packaging.
Return procedure for LM93CIMTX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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