Texas Instruments LM97937EVM

Overview

LM97937EVM from Texas Instruments is an evaluation board designed to characterize the LM97937 dual-channel, 9-bit, 370 MSPS analog-to-digital converter (ADC) with SNRBoost and Bit-Burst processing. It supports JESD204B serial output up to 7.4 Gb/s, features transformer-coupled 5 MHz–1 GHz analog inputs, and integrates the LMK04828 clock generator for FPGA reference and ADC sampling clock generation.

For engineers reviewing the LM97937EVM datasheet, LM97937EVM pinout, LM97937EVM application, or LM97937EVM equivalent, this page provides verified setup guidance, JESD204B lane configuration limits (L=1 or 2), supported sampling rates (80–370 MSPS), FMC interface connectivity, and USB-based SPI register programming via FTDI.

Technical Context

The LM97937EVM implements a complete high-speed ADC evaluation system centered on the LM97937 device, which uses SNRBoost architecture to enhance effective resolution and Bit-Burst mode for dynamic range optimization. Its signal chain includes transformer-coupled analog inputs with optional 6-dB attenuators and bandpass filtering, plus a dedicated SYSREF input for JESD204B multi-device synchronization.

It interfaces with the TSW14J56EVM data capture board via a standard FMC connector, enabling JESD204B link initialization, lane-rate configuration (1.6–7.4 Gb/s), and real-time data capture. The onboard LMK04828 generates low-jitter clocks and supports external clock injection through a transformer-coupled CLK input network.

Key Specifications

Availability

LM97937EVM is available at Aetrix Electronics and suitable for high-speed data converter validation, RF receiver prototyping, and JESD204B interface development requiring stable component supply, traceable sourcing, and long-term evaluation kit continuity.

Supply support for LM97937EVM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and high-performance data conversion technologies, with decades of leadership in precision ADCs and clock solutions.

The LM97937EVM belongs to TI's High-Speed Data Converter Evaluation Platform family, engineered to accelerate time-to-test for JESD204B-compliant ADCs in communications infrastructure, radar, and instrumentation applications.

FAQ

What is the primary purpose of the LM97937EVM?

The LM97937EVM is an evaluation board specifically built to test and validate the LM97937 dual-channel, 9-bit, 370 MSPS ADC. It provides all necessary signal conditioning, clock generation (via LMK04828), JESD204B interface routing, and USB-based register control to enable full functional and performance characterization of the LM97937 device in lab and design environments.

Which software tools are required to operate the LM97937EVM?

Operation of the LM97937EVM requires Texas Instruments' High Speed Data Converter Pro (HSDC Pro) software for data capture and analysis, plus the standalone Configuration GUI for low-level register programming of both the LM97937 and LMK04828 devices. These tools integrate via USB and FTDI SPI translation to configure sampling rate, JESD204B parameters (L, K), and calibration sequences on the LM97937EVM.

Does the LM97937EVM support multi-lane JESD204B configurations?

Yes, the LM97937EVM supports JESD204B configurations with L = 1 or L = 2 lanes per channel, as confirmed in the SLAU542 User's Guide. When using L = 2, the HSDC Pro software must be configured to select 'LM97937EVM_421' instead of the default 'LM97937EVM_222', and special firmware instructions apply for proper link initialization and lane alignment on the LM97937EVM.

How is clocking implemented on the LM97937EVM?

The LM97937EVM implements dual clocking paths: an integrated LMK04828 clock generator provides programmable low-jitter sampling and FPGA reference clocks, while a separate transformer-coupled CLK input allows external ultra-low-noise clock injection - critical for evaluating jitter-sensitive ADC performance. Both paths feed the LM97937 device directly, and the SYSREF input supports deterministic latency alignment across JESD204B links.

What companion hardware is mandatory for full functionality of the LM97937EVM?

The TSW14J56EVM data capture board is mandatory for full LM97937EVM operation. It connects via the FMC interface to receive JESD204B serial data, performs real-time decoding and DDR3 buffering, and uploads captured samples to a PC via USB. Without the TSW14J56EVM and its +5-V power supply, the LM97937EVM cannot perform sustained data capture or spectral analysis - only register access and basic configuration remain possible via USB.