Texas Instruments LMC6953CMX/NOPB
- Part No.:
- LMC6953CMX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LMC6953CMX/NOPB.pdf
- Description:
- IC SUPERVISOR 2 CHANNEL 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LMC6953CMX/NOPB from Texas Instruments is a PCI Local Bus Power Supervisor IC compliant with PCI Specification Revision 2.1. It monitors both 5V and 3.3V supplies, detects over/under-voltage (e.g., 5.60 V over-voltage threshold, 4.40 V under-voltage threshold), asserts active-low RESET within 90 ns on power failure, and provides adjustable 100 ms reset delay via external capacitor. It is used in desktop PC motherboards to ensure deterministic microprocessor initialization during brown-out or supply collapse.
For engineers reviewing the LMC6953CMX/NOPB datasheet, LMC6953CMX/NOPB pinout, LMC6953CMX/NOPB application, or LMC6953CMX/NOPB equivalent, key selection criteria include PCI 2.1 compliance, dual-rail (5V/3.3V) window detection accuracy, sub-100 ns power-failure response, manual reset input support, and open-drain RESET output compatibility with 5V CMOS logic systems.
Technical Context
The LMC6953CMX/NOPB integrates five independent comparators - two for 5V window detection, two for 3.3V window detection, and one dedicated power-failure comparator comparing 5V and 3.3V rails. All comparators share VDD as positive supply, enabling stable reference operation even during partial rail collapse.
Its internal bandgap reference sets precise thresholds: 5.60 V (typ) over-voltage and 4.40 V (typ) under-voltage on 5V rail; 3.95 V (typ) over-voltage and 2.65 V (typ) under-voltage on 3.3V rail. The RESET output remains low for 100 ms after recovery, with delay set by CEXT pin capacitance and internally generated timing circuitry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PCI Compliance | Meets PCI Specification Revision 2.1 for power supervision, including power-failure detection and reset timing. |
| 5V Over-Voltage Threshold | 5.60 V (typ); ensures reset assertion before 5V rail exceeds PCI-specified maximum of 5.75 V. |
| 3.3V Under-Voltage Threshold | 2.65 V (typ); guarantees reset hold until 3.3V rail stabilizes above PCI minimum of 2.50 V. |
| Power Failure Response Time | 90 ns (max); detects 5V falling below 3.3V by ≥300 mV faster than system clock cycles can react. |
| RESET Delay | 100 ms (typ, with 0.01 μF CEXT); provides sufficient time for CPU and peripherals to complete power-on self-test. |
| Supply Voltage Range | 1.55 V to 6 V; enables reliable reset assertion down to 1.55 V VDD, supporting low-voltage initialization sequences. |
| Output Type | Open-drain RESET; allows wired-OR configuration with other supervisors and flexible pull-up voltage selection. |
Pinout & Package
LMC6953CMX/NOPB is housed in an 8-pin SOIC (D package), 3.91 mm × 4.90 mm footprint, 1.75 mm max height, RoHS-compliant with Cu-Sn lead finish and JEDEC MS-012 AA outline.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Pin 1) | 5V supply input for internal comparators | Independent from 5V pin; supports backup capacitor connection for continued supervision during 5V rail collapse. |
| 5V (Pin 2) | Main 5V rail monitor input | Feeds 5V window and power-failure comparators; requires 120 pF bypass to ground for noise immunity. |
| 3.3V (Pin 3) | Main 3.3V rail monitor input | Feeds 3.3V window and power-failure comparators; also requires 120 pF bypass to ground. |
| MR (Pin 4) | Manual reset input | Active-low 5V CMOS-compatible input; pulls RESET low when asserted, overriding all voltage monitoring conditions. |
| PWR–GND (Pin 5) | Power ground reference | Dedicated ground return for internal comparator biasing; separate from signal ground (Pin 6) to reduce noise coupling. |
| GND (Pin 6) | Signal ground reference | Provides ground reference for RESET output driver and external pull-up network. |
| RESET (Pin 7) | Active-low reset output | Open-drain output; must be pulled up externally (e.g., 4.7 kΩ to 3.3V or 5V); holds low for 100 ms after fault recovery. |
| CEXT (Pin 8) | Reset delay capacitor terminal | Connects to external capacitor (e.g., 0.01 μF) to set 100 ms delay; linear relationship between CEXT value and delay duration. |
Key Features
| Feature | Design Value |
|---|---|
| PCI 2.1–compliant power supervision | Guarantees interoperability with PCI-based add-in cards and motherboards without custom validation. |
| Dual-rail voltage window detection | Simultaneously monitors 5V and 3.3V rails with independent thresholds, eliminating need for discrete supervisor ICs per rail. |
| Sub-100 ns power-failure detection | 90 ns response ensures RESET assertion before CPU state corruption occurs during rapid 5V collapse. |
| Adjustable reset delay with external capacitor | CEXT pin enables precise tuning of 100 ms delay to match specific processor boot requirements without redesign. |
| Backup-supply–capable VDD pin | Enables use of capacitor-backed VDD to sustain internal comparators during brief 5V interruptions, improving fault coverage. |
Applications
| Desktop PC Motherboard | PCI Add-in Card |
|---|---|
Use Scenario: Mainboard power sequencing during cold boot and brown-out events. IC Role / Device Role / Timing Role: Primary power supervisor asserting active-low RESET to CPU and chipset until both 5V and 3.3V rails stabilize within PCI-specified windows. Use Value: Prevents erratic execution by holding CPU in reset until power integrity is confirmed, meeting PCI 2.1 system-level reliability requirements. |
Use Scenario: Standalone graphics or network card requiring autonomous power monitoring. IC Role / Device Role / Timing Role: Local supervisor generating board-specific RESET signal independent of motherboard control. Use Value: Enables plug-and-play reliability-cards initialize correctly regardless of host board's power timing behavior. |
| Network Server Backplane | Industrial PCI-Based Controller |
Use Scenario: Hot-swap capable server backplane detecting rail collapse across multiple slots. IC Role / Device Role / Timing Role: Slot-level supervisor feeding RESET to local FPGA or ASIC upon localized 5V/3.3V fault. Use Value: Isolates failure domain-only affected slot resets, preserving uptime of other modules in multi-slot chassis. |
Use Scenario: Ruggedized industrial controller operating in electrically noisy environments. IC Role / Device Role / Timing Role: Fault-tolerant supervisor with 120 pF bypass support on both rail inputs to reject high-frequency noise. Use Value: Maintains deterministic reset behavior despite EMI-induced rail transients common in factory automation settings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3123E18DBVR | Single-rail (3.3V only), no 5V monitoring or PCI-specific power-failure logic; fixed 200 ms delay. | Suitable for non-PCI embedded systems with only 3.3V supply; lacks dual-rail coordination and <90 ns response. | Select only if supervising 3.3V-only designs without PCI compliance requirement. |
| MAX6953ESE+ | Not a power supervisor-MAX6953 is an LED display driver; incompatible function and pinout. | No functional overlap; cannot replace LMC6953CMX/NOPB in any power monitoring role. | Avoid-incorrect cross-reference; verify part number and function before substitution. |
Compared with TPS3123E18DBVR and MAX6953ESE+, the LMC6953CMX/NOPB uniquely delivers PCI 2.1–compliant dual-rail supervision with sub-100 ns power-failure detection, making it irreplaceable in legacy PCI desktop/server platforms where timing and specification adherence are mandatory.
Availability
LMC6953CMX/NOPB is available at Aetrix Electronics and suitable for desktop PCs, PCI-based systems, and network servers requiring stable component supply across long-lifecycle industrial deployments.
Supply support for LMC6953CMX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog, embedded processing, and connectivity solutions with emphasis on reliability and industrial-grade performance.
The LMC6953CMX/NOPB belongs to TI's legacy power management supervisor product line, engineered specifically for PCI 2.1–compliant system-level power integrity in desktop and server computing platforms.
FAQ
What is the minimum supply voltage required for LMC6953CMX/NOPB to assert RESET reliably?
The LMC6953CMX/NOPB specifies a minimum VDD of 1.55 V to ensure consistent RESET assertion. This allows the device to remain functional and generate a valid reset signal even during deep brown-out conditions where the main 5V rail drops significantly, supporting robust system initialization in low-voltage scenarios.
How does the LMC6953CMX/NOPB detect power failure between the 5V and 3.3V rails?
The LMC6953CMX/NOPB uses a dedicated comparator that continuously monitors the voltage difference between the 5V and 3.3V pins. When the 5V rail falls below the 3.3V rail by ≥300 mV (max), it triggers RESET within 90 ns. This differential detection is defined in PCI Specification Revision 2.1 and is independent of absolute rail voltages.
Can the reset delay of the LMC6953CMX/NOPB be adjusted, and how is it implemented?
Yes, the reset delay of the LMC6953CMX/NOPB is adjustable via an external capacitor connected to the CEXT pin (Pin 8). With a 0.01 μF capacitor, the delay is 100 ms; increasing capacitance linearly extends the delay. This allows designers to tune reset timing precisely to match CPU and peripheral boot requirements without modifying firmware or layout.
What is the purpose of having separate VDD and 5V pins on the LMC6953CMX/NOPB?
The separate VDD and 5V pins enable backup power capability: VDD powers internal comparators and can be fed from a capacitor charged via a diode from the 5V rail. During sudden 5V loss, the capacitor sustains VDD, allowing the LMC6953CMX/NOPB to continue monitoring and asserting RESET-critical for capturing fault conditions before full system collapse.
Is the LMC6953CMX/NOPB still recommended for new designs, and what is its lifecycle status?
No-the LMC6953CMX/NOPB is marked NRND (Not Recommended for New Designs) by Texas Instruments. It remains in production to support existing customers but is not advised for new PCB layouts. Designers should evaluate modern alternatives like TPS386000 for new projects, while LMC6953CMX/NOPB continues to serve legacy PCI system maintenance and replacement needs.
LMC6953CMX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- 3.3V, 5V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 100ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
LMC6953CMX/NOPB FAQ
1.How can I place an order for LMC6953CMX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LMC6953CMX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMC6953CMX/NOPB reliable?
The price and inventory of LMC6953CMX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMC6953CMX/NOPB is usually 5 days.
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Once your LMC6953CMX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMC6953CMX/NOPB?
For technical support, including LMC6953CMX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMC6953CMX/NOPB requirements.
6.How does Aetrix verify that LMC6953CMX/NOPB is sourced from the original manufacturer or authorized distributors?
All LMC6953CMX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMC6953CMX/NOPB meets industry standards.
7.What is the process for return or replacement of LMC6953CMX/NOPB?
All LMC6953CMX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LMC6953CMX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMC6953CMX/NOPB part is unused and in its original packaging.
Return procedure for LMC6953CMX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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