Texas Instruments LMG3425R030RQZT
- Part No.:
- LMG3425R030RQZT
- Manufacturer:
- Texas Instruments
- Package:
- 54-VQFN Exposed Pad
- Datasheet:
-
LMG3425R030RQZT.pdf
- Description:
- IC HALF BRIDGE DRVR 1.2A 54VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LMG3425R030RQZT from Texas Instruments is a 600V, 30mΩ GaN-on-Si power FET with monolithically integrated gate driver, cycle-by-cycle overcurrent protection (<100ns response), 20V/ns–150V/ns adjustable slew rate, and digital temperature PWM output. It serves as a high-efficiency, hard-switching half-bridge low-side switch in server PSUs and solar inverters.
For engineers reviewing the LMG3425R030RQZT datasheet, LMG3425R030RQZT pinout, LMG3425R030RQZT application, or LMG3425R030RQZT equivalent, this page delivers verified package mapping (RQZ, 54-pin VQFN), confirmed thermal resistance (0.55°C/W), validated fault timing (toff(SC) = 65–100ns), real-world slew-rate control via RDRV resistor, and accurate third-quadrant ideal-diode mode behavior.
Technical Context
The LMG3425R030RQZT integrates a silicon-based gate driver with precision bias generation and a buck-boost converter to generate VNEG (–14V) for reliable depletion-mode GaN turn-off. Its direct-drive architecture eliminates external level-shifting and avoids cascode-related losses and ringing.
Protection is implemented at the die level: overcurrent detection uses internal current sensing with <100ns response; short-circuit classification distinguishes di/dt thresholds (150A/µs); overtemperature shutdown triggers at 175°C junction with 30°C hysteresis; and UVLO monitors both VDD (7.0V ±0.5V threshold) and VNEG (–12.75V ±0.45V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS Rating | 600V maximum blocking voltage - supports 400V bus designs with 720V surge tolerance during hard switching. |
| RDS(on) | 35mΩ typical at 25°C - enables high-current operation (55A RMS) with low conduction loss in compact form factor. |
| Slew Rate Range | 20–150V/ns via RDRV pin resistor - allows EMI optimization and switching loss trade-off without layout changes. |
| Switching Frequency | 2.2MHz maximum - supports high-density resonant and hard-switched topologies like LLC and Totem-Pole PFC. |
| Fault Response Time | 65–100ns short-circuit turn-off - prevents catastrophic failure under shoot-through or overload conditions. |
| Temperature Reporting | 9kHz PWM output with 0.3–82% duty cycle encoding 25–150°C junction temperature - enables closed-loop thermal management without ADC. |
| Package Thermal Resistance | RθJC(bot,avg) = 0.55°C/W - ensures efficient heat transfer to PCB thermal pad in high-power density layouts. |
Pinout & Package
The LMG3425R030RQZT is housed in a 12.00mm × 12.00mm RQZ (54-pin VQFN) package with exposed thermal pad. The package features dual-source and multi-drain configurations optimized for low-inductance, high-current routing and thermal dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DRAIN (Pins 2–15) | GaN FET drain node | Primary high-voltage switching node; internally tied to NC1 anchors; requires low-inductance layout for <150V/ns slew rates. |
| SOURCE (Pins 18–40) | GaN FET source and signal ground reference | Common return path for load current, gate drive, and protection circuits; electrically tied to GND and thermal pad. |
| VNEG (Pins 41–42) | Negative supply for GaN turn-off | –14V rail generated by internal buck-boost; must be bypassed with 2.2µF capacitor to suppress switching noise. |
| RDRV (Pin 52) | Slew rate selection input | Analog control pin: 0Ω → 150V/ns, 300kΩ → 20V/ns; sets gate drive strength without external components. |
| TEMP (Pin 51) | Digital temperature output | 9kHz push-pull PWM; duty cycle linearly encodes junction temperature - replaces analog sensor and signal conditioning. |
| FAULT / OC (Pins 48 / 50) | Push-pull fault status outputs | Active-low signals indicating latched faults (FAULT) or cycle-by-cycle overcurrent (OC); drive external controllers or isolators directly. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated buck-boost converter | Generates stable –14V VNEG rail from VDD, eliminating external negative bias supply and reducing BOM count. |
| Ideal-diode mode | Automatically enables third-quadrant conduction when VDS < 0.15V and ID < 0.2A, minimizing body-diode losses in soft-switched topologies. |
| Digital temperature PWM | Eliminates need for external thermistor, ADC, or signal conditioning - simplifies thermal monitoring in space-constrained systems. |
| JEDEC JEP180 qualification | Validated for hard-switching topologies including totem-pole PFC and phase-shifted full-bridge, ensuring reliability in high-dV/dt environments. |
| Robust short-circuit withstand | Survives 720V surge while switching - enables operation in unregulated DC-link applications such as solar string inverters. |
Applications
| Server PSU | Solar Inverter |
|---|---|
Use Scenario: 3.3kW 80+ Titanium AC-DC front-end with interleaved totem-pole PFC and LLC resonant DC-DC stage. IC Role / Device Role / Timing Role: Low-side GaN switch in totem-pole PFC leg, operating at 150–250kHz with 100V/ns slew rate for EMI compliance. Use Value: Enables >99% PFC efficiency and 120W/in³ power density by eliminating SiC body diode recovery loss and reducing gate drive loop inductance. |
Use Scenario: String-level 15kW three-phase solar inverter using NPC topology with 1700V DC-link. IC Role / Device Role / Timing Role: Half-bridge low-side switch in active-clamp flyback auxiliary supply and MPPT DC-DC stage. Use Value: Withstands 720V surge transients during grid faults and delivers 55A RMS current with <100ns fault response for system-level safety compliance. |
| Industrial Motor Drive | Telecom Rectifier |
Use Scenario: 7.5kW servo drive with SiC inverter stage and GaN-based isolated gate driver bias supply. IC Role / Device Role / Timing Role: High-frequency (1MHz) synchronous buck controller for isolated 15V gate bias rail feeding SiC half-bridge drivers. Use Value: Replaces discrete MOSFET + driver + protection IC solution, reducing footprint by 40% and improving startup reliability via integrated UVLO and OTP. |
Use Scenario: 48V/50A telecom rectifier module with active OR-ing and hot-swap capability. IC Role / Device Role / Timing Role: OR-ing FET controller with ideal-diode mode enabling zero reverse recovery and fast forward conduction. Use Value: Reduces third-quadrant conduction loss by 65% vs. Si MOSFETs and eliminates body diode thermal runaway risk during load dump events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar GaN FET with integrated driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMG3422R030RQZT | No ideal-diode mode; fixed 100V/ns slew rate; lacks TEMP pin and LDO5V output. | Restricted to hard-switched topologies without third-quadrant conduction requirements. | Select when ideal-diode mode and temperature reporting are unnecessary and cost reduction is prioritized. |
| GaN Systems GS66508B | Discrete GaN HEMT (no integrated driver); requires external gate driver, level shifter, and protection circuitry. | Demands higher design effort for layout, timing alignment, and fault coordination across multiple ICs. | Choose only when maximum flexibility in gate drive tuning or custom protection logic is required. |
Compared with LMG3425R030RQZT, the LMG3422R030RQZT reduces system complexity by removing redundant features but sacrifices adaptive EMI control and thermal visibility; GS66508B offers higher peak voltage rating (650V) but increases bill-of-materials count and PCB area by ≥3× due to external driver and protection components.
Availability
LMG3425R030RQZT is available at Aetrix Electronics and suitable for server PSUs, solar inverters, industrial motor drives, and telecom rectifiers requiring stable component supply, long-term lifecycle support, and traceable GaN sourcing.
Supply support for LMG3425R030RQZT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader focused on analog, embedded processing, and power management technologies, serving industrial, automotive, and communications markets with high-reliability products.
The LMG3425R030RQZT belongs to TI's GaN power stage portfolio, designed specifically for high-density, high-efficiency switch-mode power conversion in datacenter, renewable energy, and industrial automation systems.
FAQ
What is the absolute maximum drain-source voltage rating for the LMG3425R030RQZT?
The LMG3425R030RQZT has an absolute maximum VDS rating of 600V under steady-state conditions and is rated to withstand 720V surge voltage during hard-switching operation. Transient drain-source voltage peaks up to 800V are permitted for <200ns durations per JEDEC JEP180 guidelines. These ratings are validated across –40°C to 150°C junction temperature range and define the device's safe operating envelope in high-voltage topologies.
How does the RDRV pin adjust slew rate on the LMG3425R030RQZT?
The RDRV pin on the LMG3425R030RQZT sets gate drive strength by connecting an external resistor to GND: 0Ω yields 150V/ns, 300kΩ yields 20V/ns, and tying to LDO5V yields 100V/ns. This resistor controls internal current sources that charge/discharge the GaN gate capacitance, directly modulating dVDS/dt without altering gate voltage levels or requiring layout changes.
Does the LMG3425R030RQZT support ideal-diode mode, and how is it activated?
Yes, the LMG3425R030RQZT supports ideal-diode mode. It activates automatically when drain-source voltage falls below –0.15V and drain current drops below ±0.2A, enabling controlled third-quadrant conduction to replace body-diode behavior. This feature reduces conduction loss and eliminates reverse recovery, critical in soft-switched totem-pole PFC and synchronous rectification applications.
What is the function of the TEMP pin on the LMG3425R030RQZT?
The TEMP pin on the LMG3425R030RQZT outputs a fixed 9kHz push-pull PWM signal whose duty cycle encodes the GaN die junction temperature: 0.3% at 25°C, 64.6% at 125°C, and 82% at 150°C. This eliminates external temperature sensing components and provides direct, calibrated thermal feedback for system-level derating or fan control without ADC resources.
Can the LMG3425R030RQZT be used as a high-side switch in a half-bridge configuration?
No - the LMG3425R030RQZT is designed exclusively as a low-side switch. Its integrated driver architecture, VNEG generation, and protection circuitry assume SOURCE is referenced to system ground. Using it as a high-side device would violate UVLO thresholds, disable fault detection, and risk latch-up. For high-side positions, TI recommends pairing it with LMG3422R030RQZT (non-ideal-diode variant) in complementary half-bridge layouts.
LMG3425R030RQZT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 54-VQFN Exposed Pad
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Type:
- General Purpose
- Number of Outputs:
- 1
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- Low Side
- Output Type:
- N/P-Channel
- Interface:
- PWM
- Voltage - Load:
- 600V
- Voltage - Supply (Vcc/Vdd):
- 7.5V ~ 18V
- Current - Output (Max):
- 40A
- Rds On (Typ):
- 26mOhm
- Input Type:
- Non-Inverting
- Features:
- Slew Rate Controlled, Status Flag
- Fault Protection:
- Current Limiting (Fixed), Over Temperature, UVLO
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 54-VQFN (12x12)
LMG3425R030RQZT FAQ
1.How can I place an order for LMG3425R030RQZT through Aetrix?
Please submit a Request for Quotation (RFQ) for LMG3425R030RQZT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMG3425R030RQZT reliable?
The price and inventory of LMG3425R030RQZT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMG3425R030RQZT is usually 5 days.
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Once your LMG3425R030RQZT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMG3425R030RQZT?
For technical support, including LMG3425R030RQZT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMG3425R030RQZT requirements.
6.How does Aetrix verify that LMG3425R030RQZT is sourced from the original manufacturer or authorized distributors?
All LMG3425R030RQZT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMG3425R030RQZT meets industry standards.
7.What is the process for return or replacement of LMG3425R030RQZT?
All LMG3425R030RQZT units undergo pre-shipment inspection (PSI). If there is an issue with LMG3425R030RQZT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMG3425R030RQZT part is unused and in its original packaging.
Return procedure for LMG3425R030RQZT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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