Texas Instruments LMH0024MAE
- Part No.:
- LMH0024MAE
- Manufacturer:
- Texas Instruments
- Category:
- Specialized
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LMH0024MAE.pdf
- Description:
- IC INTERFACE SPECIALIZED 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,838
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Product details
Overview
LMH0024MAE from Texas Instruments (formerly National Semiconductor) is a 3.3V adaptive cable equalizer IC designed for SMPTE 259M/344M serial digital video interfaces. It equalizes data rates from 125 Mbps to 540 Mbps, supports DVB-ASI at 270 Mbps, delivers 750 mVP–P differential output into 50Ω, and features integrated DC restoration, CLI voltage-based cable length indication, and manual MUTE control - deployed in broadcast camera backends and SDI distribution amplifiers.
For engineers reviewing the LMH0024MAE datasheet, LMH0024MAE pinout, LMH0024MAE application, or LMH0024MAE equivalent, this page provides verified technical context, SOIC-16 pin mapping with circuit roles, real-world equalization performance on Belden 1694A cable, supply current vs. cable length behavior, and footprint-compatible alternatives for SDI signal integrity design.
Technical Context
The LMH0024MAE implements a multi-stage adaptive filter controlled by an external 1µF AEC loop capacitor across pins AEC+ and AEC−, enabling automatic gain and bandwidth adjustment based on input signal degradation. Its DC restoration block self-biases differential inputs and remains active unless bypassed via the BYPASS pin.
Cable Length Indicator (CLI) outputs a voltage inversely proportional to equalized cable length (2.5 V at 0 m → 2.0 V at max), validated on Belden 1694A up to 350 m at 270 Mbps. The MUTE pin forces SDO/SDO to high-impedance when pulled high, and the device accepts AC-coupled single-ended or differential inputs with 1.3 kΩ input resistance and 1 pF capacitance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rate Range | 125–540 Mbps: Supports full SMPTE 259M (270 Mbps) and SMPTE 344M (540 Mbps) standards with guaranteed jitter ≤0.2 UI. |
| Equalization Capacity | Up to 350 m Belden 1694A at 270 Mbps: Enables long-haul SDI transmission without repeaters in studio infrastructure. |
| Output Drive | 750 mVP–P differential into 50Ω: Matches standard SDI receiver input requirements and eliminates need for external termination. |
| Supply & Power | 3.3V ±5% supply; 60–77 mA ICC: Current decreases with longer cable, enabling thermal-aware system power budgeting. |
| Operating Temp | −40°C to +85°C industrial range: Validated for broadcast equipment operating in uncontrolled rack environments. |
| Input Interface | Single-ended or differential AC-coupled input; 1.3 kΩ RIN, 1 pF CIN: Compatible with transformerless PCB layouts per AN-1372 guidelines. |
| ESD Robustness | 8 kV HBM, 250 V MM: Ensures handling safety during board assembly and field service of SDI gear. |
Pinout & Package
LMH0024MAE is housed in a 16-pin SOIC package (NS Package Number M16A), with exposed pad not present and standard JEDEC MS-012AC dimensions. Pin 10 is NC; all VEE pins (3, 6, 11, 14) must be connected to ground plane for optimal noise immunity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CLI) | Cable Length Indicator output | Analog voltage (2.0–2.5 V) inversely scaled to equalized cable length; requires presence of valid input signal. |
| 2, 15 (VCC) | Positive supply | 3.3V ±5% input; decoupling capacitor required near each pin per layout guidelines. |
| 3, 6, 11, 14 (VEE) | Ground reference | Must connect all four to low-inductance ground plane to minimize EMI and ensure stable equalization. |
| 4, 5 (SDI, SDI) | Differential serial data input | Accepts AC-coupled SDI signals; supports single-ended drive with internal 1.3 kΩ termination. |
| 7, 8 (AEC+, AEC−) | AEC loop filter interface | External 1 µF capacitor sets AEC loop response time; determines adaptation speed to cable loss changes. |
| 9 (BYPASS) | Equalization disable control | High = disables both equalizer filter and DC restoration; used for low-rate diagnostics or test modes. |
| 12, 13 (SDO, SDO) | Differential serial data output | 50Ω internally terminated; 750 mVP–P swing; muted when MUTE = high. |
| 16 (MUTE) | Output enable/disable | High = forces SDO/SDO to high-Z; must be tied to GND (not floating) for normal operation. |
Key Features
| Feature | Design Value |
|---|---|
| SMPTE 259M/344M compliance | Fully compliant with pathological signal handling per SMPTE RP 178, ensuring robust reception of color bar and sync patterns. |
| Adaptive equalization with CLI | Real-time cable length estimation enables predictive maintenance and remote link health monitoring in broadcast routers. |
| Flexible input interface | Supports both differential and single-ended AC-coupled inputs without external biasing, simplifying integration with legacy FPGA or ASIC outputs. |
| DC restoration with bypass | Self-biasing DC restoration maintains baseline stability on long-run cables; bypass mode allows use at sub-125 Mbps rates with reduced power. |
| Footprint compatibility | Pin-to-pin compatible with LMH0034 and Gennum GS9064, enabling drop-in upgrades in existing SDI hardware designs. |
Applications
| Broadcast Camera Backend | SDI Distribution Amplifier |
|---|---|
|
Use Scenario: Transmitting uncompressed HD-SDI video from camera head to base station over 200 m Belden 1694A coaxial cable. IC Role / Device Role / Timing Role: Adaptive equalizer restoring high-frequency content lost in cable dispersion; CLI monitors link degradation over time. Use Value: Eliminates need for active repeaters while maintaining <0.2 UI jitter, reducing system cost and failure points in mobile ENG trucks. |
Use Scenario: Fan-out of a single SDI source to eight downstream monitors in a production control room. IC Role / Device Role / Timing Role: Input equalizer compensating for source-side cable loss before signal splitting and re-driving. Use Value: Ensures clean, jitter-free signal delivery to all outputs by restoring edge integrity prior to fan-out, preventing cumulative timing errors. |
| Video Server I/O Module | Medical Imaging Display Link |
|
Use Scenario: Receiving SDI feeds from multiple recorders into a video server with embedded processing. IC Role / Device Role / Timing Role: Front-end equalizer recovering signals after long cable runs from edit suites or archive vaults. Use Value: Maintains bit-error rate <1×10−12 across variable cable lengths, enabling reliable frame-accurate ingest without manual gain tuning. |
Use Scenario: Transporting diagnostic-quality SDI video from MRI/PACS systems to viewing stations over 150 m hospital conduit. IC Role / Device Role / Timing Role: Signal integrity conditioner preserving pixel fidelity and timing accuracy for clinical interpretation. Use Value: Guarantees SMPTE 259M eye diagram compliance at receiver input, avoiding false positives in image artifact detection algorithms. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar adaptive SDI equalizer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMH0034MAE | Same SOIC-16 footprint; adds integrated reclocker and 10-bit parallel output; higher power (120 mW). | Required when retiming or parallel interface to FPGA is needed; not suitable for pure equalization-only paths. | Select LMH0034MAE only if reclocking or parallel data extraction is part of the system architecture. |
| GS9064-ILQ | Gennum (now Renesas) part; identical pinout but MUTE logic inverted (active-low); CLI scaling differs. | Drop-in replacement only after modifying MUTE pull-down and verifying CLI calibration against Belden 1694A curves. | Choose GS9064-ILQ only when sourcing constraints require Gennum lineage parts and board-level logic adjustments are feasible. |
Compared with LMH0024MAE, LMH0034MAE adds retiming capability at the cost of higher power and complexity, while GS9064-ILQ offers legacy compatibility but requires MUTE polarity and CLI interpretation changes - making LMH0024MAE the optimal choice for dedicated, low-power, adaptive equalization in SMPTE-compliant SDI receivers.
Availability
LMH0024MAE is available at Aetrix Electronics and suitable for broadcast infrastructure, medical imaging display links, and professional video server I/O modules requiring stable component supply, long-term obsolescence management, and traceable sourcing for Class I medical or FCC Part 73 certified equipment.
Supply support for LMH0024MAE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments (TI) acquired National Semiconductor in 2011 and maintains its high-performance analog portfolio, including precision interface ICs for video, communications, and industrial markets.
The LMH0024MAE belongs to TI's Serial Digital Interface (SDI) product line, engineered specifically for SMPTE-compliant broadcast video signal conditioning - emphasizing adaptive equalization, jitter tolerance, and robust pathological signal handling in real-world coaxial plant environments.
FAQ
What is the maximum supported cable length for LMH0024MAE at 540 Mbps?
At 540 Mbps, the LMH0024MAE equalizes up to 250 meters of Belden 1694A coaxial cable while maintaining ≤0.2 UI output jitter, as specified in the AC Electrical Characteristics table. Performance drops to 180 m on Belden 8281 at the same rate due to higher attenuation. These values are measured under pathological signal conditions per SMPTE RP 178 and require proper PCB layout per AN-1372.
Does LMH0024MAE require external termination resistors on its SDO/SDO outputs?
No, the LMH0024MAE integrates 50Ω differential output termination, delivering a nominal 750 mVP–P swing into matched loads. External termination is unnecessary and would cause double-termination mismatch. The internal 50Ω drivers are optimized for direct connection to standard SDI receivers or 75Ω coax via appropriate AC coupling and impedance-matching networks.
How does the CLI (Cable Length Indicator) voltage correlate to actual cable length?
The CLI pin on LMH0024MAE outputs a voltage inversely proportional to equalized cable length: 2.5 V at 0 m decreasing to 2.0 V at 350 m on Belden 1694A at 270 Mbps. This relationship is monotonic and repeatable but requires a valid input signal to be present - CLI is undefined during mute or no-signal conditions, as confirmed in Figure 1 of SNLS210F.
Can LMH0024MAE accept single-ended input signals without external biasing?
Yes, the LMH0024MAE accepts single-ended AC-coupled inputs directly on SDI (pin 4) with SDI (pin 5) grounded, leveraging its internal 1.3 kΩ input resistance and self-biasing DC restoration. No external bias network is required, though differential drive is preferred for common-mode noise rejection in electrically noisy broadcast environments.
What is the function of the AEC+ and AEC− pins on LMH0024MAE?
The AEC+ and AEC− pins on LMH0024MAE connect to an external 1 µF capacitor that sets the loop dynamics of the Automatic Equalization Control system. This capacitor determines how rapidly the equalizer adapts to changing cable loss - smaller values increase adaptation speed but risk instability; the 1 µF value ensures stable convergence across SMPTE 259M/344M data rates as validated in characterization.
LMH0024MAE Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- SMPTE 259M / 344M
- Interface:
- Serial
- Voltage - Supply:
- 3.3V
- Supplier Device Package:
- 16-SOIC
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
LMH0024MAE FAQ
1.How can I place an order for LMH0024MAE through Aetrix?
Please submit a Request for Quotation (RFQ) for LMH0024MAE on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMH0024MAE reliable?
The price and inventory of LMH0024MAE are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMH0024MAE is usually 5 days.
3.What payment methods are accepted for LMH0024MAE?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMH0024MAE transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LMH0024MAE?
LMH0024MAE orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMH0024MAE order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMH0024MAE?
For technical support, including LMH0024MAE datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMH0024MAE requirements.
6.How does Aetrix verify that LMH0024MAE is sourced from the original manufacturer or authorized distributors?
All LMH0024MAE products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMH0024MAE meets industry standards.
7.What is the process for return or replacement of LMH0024MAE?
All LMH0024MAE units undergo pre-shipment inspection (PSI). If there is an issue with LMH0024MAE, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMH0024MAE part is unused and in its original packaging.
Return procedure for LMH0024MAE:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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