Texas Instruments LMH0026MH/NOPB
- Part No.:
- LMH0026MH/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Video Processing
- Package:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LMH0026MH/NOPB.pdf
- Description:
- IC VIDEO RECLOCKER 20HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,790
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Product details
Overview
LMH0026MH/NOPB from Texas Instruments is an SD SDI reclocker IC that retimes 270 Mbps serial digital video data per SMPTE 259M-C, suppresses accumulated jitter using a PLL-based architecture, provides two differential LVPECL-compatible outputs, and supports DVB-ASI at identical data rate - deployed in digital video routers, switchers, and format converters.
For engineers reviewing the LMH0026MH/NOPB datasheet, LMH0026MH/NOPB pinout, LMH0026MH/NOPB application, or LMH0026MH/NOPB equivalent, key selection criteria include 270 Mbps jitter tolerance (≥0.6 UIP-P), dual-output configuration flexibility (data vs. clock on SCO/SDO2), 20-pin HTSSOP thermal performance (θJA = 26.6°C/W), and industrial temperature operation (−40°C to +85°C).
Technical Context
The LMH0026MH/NOPB implements a PLL-based reclocking architecture with 300 kHz loop bandwidth and <0.1 dB peaking, recovering a clean 270 MHz clock from incoming 270 Mbps SDI data. It uses a 27 MHz crystal or external reference for frequency synthesis and features auto-bypass functionality when unlocked or presented with unsupported rates.
Its dual differential outputs (SDO and SCO/SDO2) are CML/LVPECL compatible, delivering 800 mVP-P ±10% into 100 Ω differentially terminated loads. Control logic (LVCMOS) enables dynamic selection of SCO/SDO2 as either second retimed data or low-jitter 270 MHz clock output, with lock detect (active-high), SD indicator, and output mute functions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Serial Data Rate | 270 Mbps - precisely matches SMPTE 259M-C and DVB-ASI standard timing requirements. |
| Input Jitter Tolerance | ≥0.6 UIP-P - ensures reliable lock acquisition under real-world cable-induced jitter conditions. |
| Output Jitter (Data) | 0.02–0.08 UIP-P - enables cascaded SDI signal integrity over multiple stages without degradation. |
| Output Jitter (Clock) | 2–3 psRMS - meets tight phase-noise requirements for synchronous downstream devices like serializers. |
| Supply Voltage | 3.3 V ±5% - single-rail operation simplifies power design and aligns with common video system rails. |
| Power Consumption | 330 mW typical - enables thermal management in dense video processing modules without forced air. |
| Operating Temperature | −40°C to +85°C - certified for industrial-grade broadcast and professional AV equipment deployment. |
Pinout & Package
LMH0026MH/NOPB is housed in a 20-pin HTSSOP (PWP) package with exposed die attach pad (DAP) electrically connected to VEE (ground); DAP must be soldered to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 (LF1, LF2) | Loop Filter Interface | Connects external 56 nF capacitor - fixed value required for stable PLL operation per TI specification. |
| 5, 6 (SDI, SDI) | Differential Serial Input | LVPECL/CML-compatible input pair - accepts DC- or AC-coupled 270 Mbps SDI with 800 mVP-P swing. |
| 13, 14 (SCO/SDO2, SCO/SDO2) | Configurable Output Pair | Second output selectable via SCO_EN as either retimed data or 270 MHz clock - critical for clock distribution or dual-path routing. |
| 16, 17 (SDO, SDO) | Primary Differential Output | Always-active retimed data output - drives 100 Ω differential loads directly without external termination resistors. |
| 10 (XTAL IN/EXT CLK) | Reference Clock Input | Accepts 27 MHz crystal or LVCMOS clock - determines PLL center frequency and system timing accuracy. |
| 12 (LOCK DETECT) | PLL Lock Indicator | Active-high open-drain output - used to enable downstream mute or bypass functions upon loss of lock. |
| 20 (SCO_EN) | Output Mode Select | LVCMOS input with internal pulldown - default configures SCO/SDO2 as data; high selects clock mode. |
| 9 (OUTPUT MUTE) | Global Output Control | LVCMOS input with internal pullup - asserts low to simultaneously mute both SDO and SCO/SDO2 outputs. |
Key Features
| Feature | Design Value |
|---|---|
| Dual configurable differential outputs | One fixed data output (SDO) + one multiplexed output (SCO/SDO2) supporting either second data stream or 270 MHz clock - eliminates need for external clock fanout buffers. |
| Auto/manual reclocker bypass | BYPASS/AUTO BYPASS pin forces transparent pass-through or enables automatic fallback when PLL loses lock - preserves signal continuity during transient faults. |
| Integrated SD indicator output | SD pin asserts high only when locked to 270 Mbps - provides direct interface to SDI cable drivers (e.g., LMH0002) for automatic edge-rate configuration. |
| LVCMOS control interface | All control inputs (SCO_EN, OUTPUT MUTE, BYPASS) and indicators (LOCK DET, SD) use LVCMOS levels - simplifies integration with FPGA or microcontroller GPIOs. |
| Thermally enhanced HTSSOP | Exposed DAP reduces junction-to-ambient thermal resistance to 26.6°C/W - sustains 330 mW dissipation in compact video PCB layouts without heatsinks. |
Applications
| Digital Video Router | DVB-ASI Equipment |
|---|---|
Use Scenario: Reconditioning SDI signals across multi-port matrix switching fabric with minimal added jitter. IC Role / Device Role / Timing Role: Reclocker restoring signal integrity between input equalizer (e.g., LMH0074) and output driver (e.g., LMH0001). Use Value: Enables >10-switch hop count without violating SMPTE 259M-C jitter budget (0.3 UI peak-to-peak). | Use Scenario: Retiming DVB-ASI transport streams in satellite receiver headends or conditional access modules. IC Role / Device Role / Timing Role: Jitter suppression and clock recovery for 270 Mbps ASI data prior to demultiplexing or decryption. Use Value: Maintains BER <1×10⁻¹² under cable-induced jitter up to 0.6 UIP-P, ensuring robust MPEG-TS packet delivery. |
| Video Format Converter | Digital Video Editing System |
Use Scenario: Interfacing legacy SD-SDI sources with HD-capable processing engines requiring clean clock domains. IC Role / Device Role / Timing Role: SDI reclocker generating synchronized 270 MHz clock (via SCO/SDO2) for downstream serializer (e.g., LMH0030). Use Value: Eliminates metastability in parallel-to-serial conversion by providing sub-10 psRMS clock alignment to data edges. | Use Scenario: Signal regeneration inside non-linear editing (NLE) I/O cards handling multiple concurrent SDI streams. IC Role / Device Role / Timing Role: Dual-output reclocker feeding separate paths: one to monitoring output, one to recording engine. Use Value: Reduces inter-channel skew to <50 ps across four parallel LMH0026MH/NOPB instances, preserving lip-sync accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SDI reclocking applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMH0046MH/NOPB | Footprint-compatible 20-pin HTSSOP but supports both SD (270 Mbps) and HD (1.485 Gbps) rates - higher power (550 mW), requires separate 1.8 V core supply. | Used where future HD upgrade path or mixed SD/HD infrastructure is required - not drop-in for pure SD-only designs. | Select LMH0046MH/NOPB only if HD-SDI support is needed; LMH0026MH/NOPB remains optimal for cost- and power-sensitive SD-only systems. |
| LMH0346RTVT | 48-pin WQFN package, supports SD/HD/3G-SDI (270 Mbps / 1.485 Gbps / 2.97 Gbps), integrated cable driver, 3.3 V only, 750 mW typical. | Targeted at compact all-in-one SDI transceivers - lacks separate clock output option and requires redesign of layout and power delivery. | Choose LMH0346RTVT for space-constrained HD/3G-SDI endpoints; LMH0026MH/NOPB offers superior jitter performance and simpler integration in dedicated SD reclock stages. |
Compared with LMH0046MH/NOPB and LMH0346RTVT, LMH0026MH/NOPB delivers lowest power (330 mW), smallest footprint (20-pin HTSSOP), and dedicated SD-optimized jitter performance (0.02 UIP-P), making it the most efficient choice for cost-driven, thermally constrained SD-SDI infrastructure where HD capability is unnecessary.
Availability
LMH0026MH/NOPB is available at Aetrix Electronics and suitable for digital video routers, DVB-ASI equipment, and video format converters requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for LMH0026MH/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with broad portfolio coverage across industrial, automotive, and communications markets.
The LMH0026MH/NOPB belongs to TI's high-speed video interface product line, engineered specifically for SMPTE-compliant serial digital video signal conditioning in broadcast, professional AV, and digital signage systems.
FAQ
What is the primary function of the LMH0026MH/NOPB in an SDI signal chain?
The LMH0026MH/NOPB functions as a jitter-suppressing reclocker for 270 Mbps SD-SDI signals conforming to SMPTE 259M-C. It recovers a clean 270 MHz clock from the incoming serial data stream and provides two differential outputs - one fixed retimed data output (SDO) and one configurable output (SCO/SDO2) that can deliver either a second data stream or the recovered clock. This ensures signal integrity across long cable runs and multi-stage video processing systems. The LMH0026MH/NOPB achieves this using a PLL with 300 kHz loop bandwidth and delivers ultra-low output jitter (0.02–0.08 UIP-P for data, 2–3 psRMS for clock).
Can the LMH0026MH/NOPB operate with an external 27 MHz clock instead of a crystal?
Yes, the LMH0026MH/NOPB supports both a 27 MHz parallel-resonant crystal connected between XTAL IN/EXT CLK and XTAL OUT pins, and a 27 MHz LVCMOS-compatible external clock applied solely to the XTAL IN/EXT CLK pin. The device requires ±50 ppm frequency tolerance on the reference source, and the internal oscillator circuitry is designed to lock reliably to either source. When using an external clock, the XTAL OUT pin is left unconnected. This flexibility allows designers to choose between low-cost crystal networks or precision clock generators depending on system jitter and synchronization requirements. The LMH0026MH/NOPB maintains full specification compliance in both configurations.
How does the SCO_EN pin affect the functionality of the LMH0026MH/NOPB?
SCO_EN is an LVCMOS input with internal pulldown that controls the function of the SCO/SDO2 differential output pair. When SCO_EN is low (default state), SCO/SDO2 delivers a second retimed serial data output. When SCO_EN is driven high, SCO/SDO2 instead delivers the recovered 270 MHz serial data-rate clock. This selection is independent of other control pins and remains active even during auto-bypass mode - though the clock output is muted if OUTPUT MUTE is asserted or if bypass is forced via BYPASS/AUTO BYPASS. The LMH0026MH/NOPB's ability to dynamically configure this output eliminates the need for external clock buffers in many SDI distribution architectures.
What thermal considerations apply to the LMH0026MH/NOPB in continuous operation?
The LMH0026MH/NOPB dissipates 330 mW typical power and uses a 20-pin HTSSOP package with an exposed die attach pad (DAP) connected to VEE (ground). To maintain junction temperature within safe limits (≤150°C), the DAP must be soldered to a minimum 200 mm² copper pour on the PCB's ground plane. With proper thermal land design, the package achieves θJA = 26.6°C/W, resulting in ~8.7°C rise above ambient at full load. Operation at maximum ambient (85°C) yields junction temperature of ~93.7°C - well within specification. No heatsink or airflow is required for standard deployments. The LMH0026MH/NOPB's thermal design enables reliable use in densely packed video processing modules without derating.
Is the LMH0026MH/NOPB compatible with DVB-ASI signals?
Yes, the LMH0026MH/NOPB explicitly supports DVB-ASI operation at 270 Mbps, sharing identical electrical and timing specifications with SMPTE 259M-C SD-SDI. It retimes incoming DVB-ASI streams with the same jitter tolerance (≥0.6 UIP-P input), output jitter performance (0.02–0.08 UIP-P), and LVPECL-compatible differential signaling. The device does not perform protocol decoding or packet inspection - it operates purely at the physical layer, making it suitable for ASI transport stream regeneration in satellite receivers, conditional access gateways, and broadcast contribution links. All control features (lock detect, output mute, auto-bypass) function identically for DVB-ASI as they do for SD-SDI. The LMH0026MH/NOPB is therefore a dual-standard solution for broadcast infrastructure requiring interoperability across both domains.
LMH0026MH/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Reclocker
- Applications:
- Professional Video
- Standards:
- DVB-ASI, SMPTE
- Control Interface:
- Serial
- Voltage - Supply:
- 3.135V ~ 3.465V
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 20-HTSSOP
LMH0026MH/NOPB FAQ
1.How can I place an order for LMH0026MH/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LMH0026MH/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMH0026MH/NOPB reliable?
The price and inventory of LMH0026MH/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMH0026MH/NOPB is usually 5 days.
3.What payment methods are accepted for LMH0026MH/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMH0026MH/NOPB transactions.
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4.How is shipping managed for LMH0026MH/NOPB?
LMH0026MH/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMH0026MH/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMH0026MH/NOPB?
For technical support, including LMH0026MH/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMH0026MH/NOPB requirements.
6.How does Aetrix verify that LMH0026MH/NOPB is sourced from the original manufacturer or authorized distributors?
All LMH0026MH/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMH0026MH/NOPB meets industry standards.
7.What is the process for return or replacement of LMH0026MH/NOPB?
All LMH0026MH/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LMH0026MH/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMH0026MH/NOPB part is unused and in its original packaging.
Return procedure for LMH0026MH/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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