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Texas Instruments LMH0046MH/NOPB
- Part No.:
- LMH0046MH/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Specialized
- Package:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LMH0046MH/NOPB.pdf
- Description:
- IC INTFACE SPECIALIZED 20HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,247
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Product details
Overview
LMH0046MH/NOPB from Texas Instruments is a HD/SD SDI reclocker IC designed for serial digital video signal retiming in broadcast and professional video systems. It supports SMPTE 259M (143/270 Mbps) and SMPTE 292M (1.483/1.485 Gbps), delivers dual differential outputs, achieves ≤0.1 UI output jitter at 1.485 Gbps, and operates from a single 3.3 V supply with 330 mW typical power consumption - deployed in digital video routers, format converters, and DVB-ASI equipment.
For engineers reviewing the LMH0046MH/NOPB datasheet, LMH0046MH/NOPB pinout, LMH0046MH/NOPB application, or LMH0046MH/NOPB equivalent, key selection considerations include SMPTE-compliant data-rate auto-detection, selectable second output (data or low-jitter clock), LVPECL/CML I/O compatibility, 20-pin HTSSOP thermal performance, and industrial −40°C to +85°C operation.
Technical Context
The LMH0046MH/NOPB implements a PLL-based retiming architecture with automatic data-rate detection across four discrete rates (143/270/1483/1485 Mbps), using a 27 MHz crystal reference and dual loop filter (LF1/LF2) for jitter suppression. Its CML input stage accepts SMPTE-compliant differential signals, while its dual CML output drivers support 100 Ω differentially terminated loads.
Control logic includes LVCMOS-compatible RATE[1:0] inputs for manual rate selection or auto-detect mode, SCO_EN to multiplex SCO/SDO2 between retimed data or data-rate clock, and lock-synchronized indicators (LOCK DET, SD/HD) enabling system-level synchronization and status monitoring in real-time video signal chains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supported Standards | SMPTE 259M (A/C) and SMPTE 292M (A/C); DVB-ASI at 270 Mbps - ensures interoperability with broadcast-grade SD/HD video infrastructure. |
| Data Rates | 143 Mbps, 270 Mbps, 1.483 Gbps, 1.485 Gbps - covers NTSC/PAL SD, 720p/1080i HD, and full 1080p timing requirements. |
| Output Jitter (1.485 Gbps) | 0.05–0.1 UIP–P - enables robust eye opening after multiple cable equalization stages in long-haul routing. |
| Supply Voltage | 3.3 V ±5% - simplifies power design with single-rail operation and eliminates need for auxiliary voltage rails. |
| Power Consumption | 330 mW typical - compatible with thermally constrained video processing modules and fanless enclosures. |
| Operating Temperature | −40°C to +85°C - validated for industrial and broadcast equipment operating in uncontrolled environments. |
| I/O Interface | Differential CML/LVPECL inputs and outputs - supports direct connection to TI's LMH0034 equalizer and LMH0002 cable driver without level-shifting. |
Pinout & Package
The LMH0046MH/NOPB is housed in a thermally enhanced 20-pin HTSSOP (PWP) package with exposed die attach pad (DAP) electrically connected to VEE (ground), requiring PCB thermal pad connection for optimal junction temperature control.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 (LF1, LF2) | PLL Loop Filter Inputs | Connect external RC networks to set loop bandwidth (300 kHz @ 270 Mbps, 2.0 MHz @ 1485 Mbps) and optimize jitter transfer function. |
| 3, 4 (RATE0, RATE1) | Data Rate Select Inputs | Set fixed rate (01 = 270 Mbps, 10 = 1483/1485 Mbps) or enable auto-detect (00); internal pull-downs default to auto-mode on power-up. |
| 5, 6 (SDI, SDI) | Differential Serial Data Input | CML/LVPECL-compatible input accepting 800 mVP–P ±10% differential signal; requires external biasing if AC-coupled. |
| 8 (BYPASS/AUTO-BP) | Bypass Control Input | High forces transparent bypass; low enables auto-bypass during unlock or unsupported rates (e.g., 360 Mbps). |
| 9 (OUTPUT MUTE) | Active-Low Output Mute | Mutes both SDO and SCO/SDO2 outputs when low; overrides bypass function and synchronizes with LOCK DET for fail-safe muting. |
| 10 (XTAL IN/EXT CLK) | 27 MHz Reference Input | Accepts parallel-resonant 27 MHz crystal (20 pF load) or LVCMOS clock; tolerance ±50 ppm ensures stable PLL lock under temperature drift. |
| 12 (LOCK DET) | Active-High PLL Lock Indicator | Signals valid lock condition; used to drive OUTPUT MUTE or downstream sync logic; asserted within 10–16 ms of valid input acquisition. |
| 13, 14 (SCO/SDO2, SCO/SDO2) | Multiplexed Output Pair | Configured as second retimed data (SCO_EN = low) or low-jitter data-rate clock (SCO_EN = high); aligned to data interval within ±10% center. |
| 15, 18 (VCCO) | Output Driver Power Supply | Separate 3.3 V rail for output buffers - isolates noise-sensitive PLL core from high-speed output switching transients. |
| 16, 17 (SDO, SDO) | Primary Differential Data Output | Retimed, low-jitter output driving 100 Ω differential loads; 800 mVP–P ±10% amplitude ensures SMPTE-compliant signal integrity. |
| 19 (SD/HD) | Data Rate Indicator Output | Registered LVCMOS output: high = SD (143/270 Mbps), low = HD (1483/1485 Mbps); valid only when LOCK DET is high. |
| 20 (SCO_EN) | SCO/SDO2 Mode Select | Active-high enables serial clock output; internal pull-down defaults to second-data-output mode for plug-and-play operation. |
Key Features
| Feature | Design Value |
|---|---|
| Auto-detect data-rate retiming | Identifies and locks to 143/270/1483/1485 Mbps without configuration - eliminates firmware dependency in hardware-centric video routing. |
| Dual differential outputs with mode-selectable second channel | Enables either redundant data distribution or precise clock forwarding to serializer/driver stages - reduces component count in multi-path systems. |
| Integrated 27 MHz crystal oscillator interface | Eliminates external oscillator IC; supports ±50 ppm crystal stability - meets SMPTE RP 184-1996 jitter tolerance requirements. |
| LVCMOS control and indicator logic | Allows direct interfacing with FPGA GPIO or microcontroller I/O without level translators - accelerates prototyping and reduces BOM cost. |
| Thermally optimized HTSSOP package with exposed DAP | θJA = 26.6°C/W enables >100 mA continuous output current in compact 6.5 × 4.4 mm footprint - suitable for dense video board layouts. |
Applications
| Video Router Signal Integrity | DVB-ASI Equipment |
|---|---|
Use Scenario: Retiming SDI signals traversing multiple switch matrix stages with cumulative jitter exceeding SMPTE limits. IC Role / Device Role / Timing Role: Reclocker restoring eye diagram integrity by suppressing input jitter >6 UIP–P to ≤0.1 UIP–P at 1.485 Gbps. Use Value: Enables reliable 1080p60 transmission over 100+ meter coaxial runs after 5-stage routing without signal regeneration. |
Use Scenario: Processing MPEG-2 transport streams encoded per DVB-ASI standard at 270 Mbps in broadcast headend gear. IC Role / Device Role / Timing Role: Retiming DVB-ASI data without harmonic locking artifacts - maintains 8B10B coding integrity and BER <10−12. Use Value: Eliminates need for separate clock recovery IC, reducing latency and board space in ASI-to-IP gateway modules. |
| HD/SD Format Converter | Professional Video Editing System |
Use Scenario: Converting between SMPTE 259M (270 Mbps) and SMPTE 292M (1.485 Gbps) domains in real-time up/down converters. IC Role / Device Role / Timing Role: Providing rate-agile retiming with SD/HD output flag to configure downstream LMH0002 cable driver slew rate. Use Value: Enables automatic gain/slew adjustment in driver stage, preserving rise/fall time compliance across SD and HD standards. |
Use Scenario: Distributing clean, low-jitter SDI feeds from editing workstation to multiple monitor outputs and recording decks. IC Role / Device Role / Timing Role: Dual-output capability supplies one retimed stream to local monitor and second to recording path or network encoder. Use Value: Avoids cascaded jitter accumulation in multi-destination broadcast chains, maintaining color fidelity and lip-sync accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SDI reclocking applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMH0344RTVT | Single-output reclocker with integrated cable driver; no SCO/SDO2 multiplexing; higher 450 mW power draw. | Limited to point-to-point driver applications; lacks dual-output flexibility for monitoring/recording split paths. | Select when board space is constrained and only one output is needed with built-in 75 Ω drive capability. |
| GS2971-IBE3 | Quad-input, dual-output reclocker supporting SMPTE 2081 (12G-SDI); requires 1.8 V + 3.3 V supplies; larger 32-pin QFN. | Targets next-gen 4K/UHD workflows; not drop-in compatible due to pin count, voltage, and control interface differences. | Select for future-proof 12G-SDI infrastructure where backward compatibility with 3G-SDI is managed via firmware configuration. |
Compared with LMH0046MH/NOPB, LMH0344RTVT trades dual-output versatility for integrated driver functionality and smaller footprint, while GS2971-IBE3 extends bandwidth to 12G-SDI but increases supply complexity and layout overhead - making LMH0046MH/NOPB optimal for cost-sensitive, dual-path HD/SDI retiming in existing broadcast plant upgrades.
Availability
LMH0046MH/NOPB is available at Aetrix Electronics and suitable for digital video routers, broadcast format converters, DVB-ASI transmitters, and professional editing systems requiring stable component supply across extended production lifecycles.
Supply support for LMH0046MH/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of heritage in broadcast video signal conditioning ICs.
The LMH0046MH/NOPB belongs to TI's LMH video interface product line, engineered specifically for SMPTE-compliant serial digital video retiming, jitter cleanup, and signal distribution in professional broadcast, post-production, and cable infrastructure equipment.
FAQ
What video standards does the LMH0046MH/NOPB support?
The LMH0046MH/NOPB supports SMPTE 259M (A & C) for standard-definition video at 143 Mbps and 270 Mbps, and SMPTE 292M (A & C) for high-definition video at 1.483 Gbps and 1.485 Gbps. It also handles DVB-ASI data at 270 Mbps. All supported rates are explicitly confirmed in the SNLS222F datasheet, and the LMH0046MH/NOPB performs automatic rate detection and retiming without external configuration for these exact standards.
How does the LMH0046MH/NOPB handle clock output selection?
The LMH0046MH/NOPB uses the SCO_EN pin to select the function of the SCO/SDO2 differential output pair: when SCO_EN is high, it delivers a low-jitter serial data-rate clock aligned within ±10% of the data bit interval center; when low, it outputs a second retimed serial data stream. This behavior is defined in Table 1 and Figure 5 of the LMH0046MH/NOPB datasheet, and the internal pull-down ensures default data-output mode at power-up.
What is the purpose of the SD/HD pin on the LMH0046MH/NOPB?
The SD/HD pin on the LMH0046MH/NOPB is a registered LVCMOS output that indicates the detected data rate range: high = SD (143 or 270 Mbps), low = HD (1483 or 1485 Mbps). It is only valid when LOCK DET is high and is used to configure downstream devices like the LMH0002 cable driver. The timing relationship and validity window are specified in Figure 6 and the "SD/HD" section of the LMH0046MH/NOPB datasheet.
Can the LMH0046MH/NOPB operate without an external crystal?
No - the LMH0046MH/NOPB requires a 27 MHz reference clock applied to the XTAL IN/EXT CLK pin. It supports either a parallel-resonant 27 MHz crystal (with 20 pF load capacitance and ±50 ppm stability) or an LVCMOS-compatible 27 MHz clock source. The device contains no internal oscillator; omission of this reference prevents PLL lock and disables retiming functionality, as confirmed in the "CRYSTAL OR EXTERNAL CLOCK REFERENCE" section of the LMH0046MH/NOPB datasheet.
What thermal management is required for the LMH0046MH/NOPB in continuous operation?
The LMH0046MH/NOPB uses a 20-pin HTSSOP package (PWP0020A) with an exposed die attach pad (DAP) electrically tied to VEE (ground). To maintain junction temperature below 150°C at 330 mW dissipation, the DAP must be soldered to a minimum 100 mm² copper thermal pad on the PCB, connected via ≥4 thermal vias to inner ground planes. Theta-JA is 26.6°C/W - verified in the "Package Thermal Resistance" table of the LMH0046MH/NOPB datasheet.
LMH0046MH/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Applications:
- Displays
- Interface:
- Serial
- Voltage - Supply:
- 3.135V ~ 3.465V
- Supplier Device Package:
- 20-HTSSOP
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
LMH0046MH/NOPB FAQ
1.How can I place an order for LMH0046MH/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LMH0046MH/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMH0046MH/NOPB reliable?
The price and inventory of LMH0046MH/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMH0046MH/NOPB is usually 5 days.
3.What payment methods are accepted for LMH0046MH/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMH0046MH/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LMH0046MH/NOPB?
LMH0046MH/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMH0046MH/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMH0046MH/NOPB?
For technical support, including LMH0046MH/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMH0046MH/NOPB requirements.
6.How does Aetrix verify that LMH0046MH/NOPB is sourced from the original manufacturer or authorized distributors?
All LMH0046MH/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMH0046MH/NOPB meets industry standards.
7.What is the process for return or replacement of LMH0046MH/NOPB?
All LMH0046MH/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LMH0046MH/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMH0046MH/NOPB part is unused and in its original packaging.
Return procedure for LMH0046MH/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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