My Inquiry
My Account
Texas Instruments LMH0056SQ/NOPB
- Part No.:
- LMH0056SQ/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Video Processing
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
LMH0056SQ/NOPB.pdf
- Description:
- IC VIDEO RECLOCKER 48WQFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,317
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LMH0056SQ/NOPB from Texas Instruments is a HD/SD SDI reclocker with integrated 4:1 input multiplexer, designed for serial digital video retiming in broadcast infrastructure. It supports SMPTE 259M (143/270 Mbps) and SMPTE 292M (1.483/1.485 Gbps), delivers two differential LVPECL-compatible outputs, consumes 360 mW typical power, and operates from a single 3.3V supply across −40°C to +85°C.
For engineers reviewing the LMH0056SQ/NOPB datasheet, LMH0056SQ/NOPB pinout, LMH0056SQ/NOPB application, or LMH0056SQ/NOPB equivalent, this device serves as a jitter-suppressing reclocker for SDTV/HDTV routing, DVB-ASI equipment, and video format conversion where precise data-rate clock recovery and input channel selection are critical.
Technical Context
The LMH0056SQ/NOPB implements a PLL-based reclocking architecture with auto-rate detection across four discrete serial data rates (143/270/1483/1485 Mbps), rejecting input jitter >6 UIP-P at HD rates while delivering output jitter as low as 0.05–0.10 UIP-P. Its dual differential outputs support either retimed data (SDO + SCO/SDO2) or one data stream plus a low-jitter data-rate clock (SCO/SDO2 enabled via SCO_EN).
It integrates a 4:1 multiplexer controlled by SEL0/SEL1, manual rate select (RATE0/RATE1), lock detect (LOCK DET), SD/HD rate indicator, and output mute functionality - all using LVCMOS logic interfaces. The 27 MHz crystal or external reference drives a VCO/PLL loop with configurable bandwidth (300 kHz at 270 Mbps, 2.0 MHz at 1485 Mbps) and acquisition time of 10–16 ms in auto-detect mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rates | 143 Mbps, 270 Mbps, 1.483 Gbps, 1.485 Gbps - supports SMPTE 259M A/C and SMPTE 292M standards, plus DVB-ASI at 270 Mbps |
| Input Jitter Tolerance | >6 UIP-P at 1483/1485 Mbps - enables robust locking to degraded SDI signals in long-cable or multi-stage systems |
| Output Jitter | 0.05–0.10 UIP-P at 1483/1485 Mbps - ensures clean signal integrity for downstream cable drivers or deserializers |
| Supply & Power | Single 3.3V ±5% supply; 109 mA typical ICC at 1485 Mbps - simplifies power design and enables integration in space-constrained video boards |
| Output Interface | Differential LVPECL-compatible SDO and SCO/SDO2 - drives 100Ω differentially terminated loads without level-shifting circuitry |
| Reference Clock | 27 MHz ±50 ppm crystal or LVCMOS input - provides stable timing reference for PLL operation with minimal external components |
| Operating Temp | −40°C to +85°C industrial range - validated for deployment in broadcast routers, switchers, and production-grade video processing gear |
Pinout & Package
LMH0056SQ/NOPB is housed in a 48-pin WQFN package (RHS0048A) with an exposed die attach pad (DAP) electrically connected to VEE and requiring connection to system ground for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SDI0–SDI3 (pins 1–2, 4–5, 7–8, 10–11) | Differential serial data inputs | Four independent CML/LVPECL-compatible inputs; selected via SEL0/SEL1 for 4:1 multiplexing into reclock path |
| SDO (pins 32–33) | Primary retimed serial data output | Differential LVPECL-compatible output; always active unless muted; drives downstream cable drivers or deserializers |
| SCO/SDO2 (pins 28–29) | Secondary output (data or clock) | Configurable via SCO_EN: second retimed data stream or low-jitter data-rate clock (143/270/1483/1485 MHz) |
| SEL0/SEL1 (pins 47–48) | Input channel select control | LVCMOS inputs selecting one of four SDI inputs (00=SDI0, 01=SDI1, 10=SDI2, 11=SDI3) |
| SCO_EN (pin 37) | SCO/SDO2 function select | LVCMOS input enabling clock output (high) or second data output (low); internal pull-down defaults to data mode |
| LOCK DET (pin 24) | PLL lock status indicator | Active-high open-drain output signaling valid PLL lock; used to enable/disable downstream stages or mute outputs |
| XTAL IN/EXT CLK (pin 18) | 27 MHz reference input | Accepts parallel-resonant crystal or LVCMOS clock; drives internal PLL/VCO for data-rate recovery |
| MUTE (pin 16) | Output muting control | Active-low LVCMOS input muting both SDO and SCO/SDO2; overrides bypass mode when asserted |
Key Features
| Feature | Design Value |
|---|---|
| Auto-rate detection with manual override | Identifies 143/270/1483/1485 Mbps SDI streams without configuration; RATE0/RATE1 pins fix rate for deterministic behavior in DVB-ASI or test setups |
| Dual differential retimed outputs | SDO provides primary retimed data; SCO/SDO2 offers flexible second output-either identical retimed data or precisely aligned data-rate clock for synchronization |
| Integrated 4:1 input multiplexer | Reduces board-level complexity by consolidating four SDI sources into one reclock path, eliminating need for external crosspoint switches in router I/O modules |
| Low-jitter clock recovery | Delivers serial clock output with ≤3 psRMS jitter and 40–60% alignment within data interval-enables reliable sampling in high-speed deserializers |
| Industrial temperature operation | Validated from −40°C to +85°C with 360 mW typical power-supports fanless enclosures and dense video processing chassis without thermal derating |
Applications
| Broadcast Video Router I/O Module | DVB-ASI Signal Conditioning |
|---|---|
|
Use Scenario: Receiving four independent SDI feeds in a 3G-SDI router line card and selecting one for distribution to multiple outputs. IC Role / Device Role / Timing Role: Reclocker with 4:1 multiplexer providing jitter-cleaned, rate-aligned serial data and optional clock output for downstream distribution amplifiers. Use Value: Enables seamless switching between SD/HD sources without glitching or timing discontinuity, preserving SMPTE compliance across all paths. |
Use Scenario: Retiming 270 Mbps DVB-ASI MPEG-2 transport streams in satellite receiver front-ends before demultiplexing. IC Role / Device Role / Timing Role: SDI reclocker operating in fixed 270 Mbps mode to suppress jitter accumulated over coaxial cable runs and ensure bit-error-free ASI decoding. Use Value: Eliminates ASI frame loss due to timing margin erosion, supporting carrier-grade reliability in headend and set-top box applications. |
| HD Video Format Converter | Digital Video Editing System I/O |
|
Use Scenario: Converting between SMPTE 259M (SD) and SMPTE 292M (HD) formats in real-time hardware scalers and up/down converters. IC Role / Device Role / Timing Role: Rate-aware reclocker detecting SD vs. HD data rate and asserting SD/HD output to configure downstream cable drivers (e.g., LMH0002) for appropriate drive strength. Use Value: Automates interface adaptation without software intervention, reducing latency and ensuring correct signal integrity for both SD and HD signal chains. |
Use Scenario: Accepting multiple camera feeds (e.g., 4× HD-SDI) into non-linear editing (NLE) hardware for real-time preview and recording. IC Role / Device Role / Timing Role: Input conditioning IC providing jitter-free, synchronized data streams to FPGA-based capture engines with precise clock domain alignment. Use Value: Prevents frame drops and audio/video sync errors during high-bitrate ingest, maintaining editorial fidelity in professional post-production environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SDI reclocking applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMH0044SQ/NOPB | Equalizer-only function (no reclocking or multiplexing); requires external clock recovery and mux | Used upstream of LMH0056SQ/NOPB to restore signal integrity on long cables; not a functional substitute | Select LMH0044SQ/NOPB only when input signal degradation exceeds LMH0056SQ/NOPB's input tolerance and equalization is needed pre-reclock |
| GS2971AIBTE3 | Single-input HD/SD reclocker with integrated cable driver; no multiplexer; supports SMPTE 424M (3G-SDI) | Targeted at point-to-point reclock-and-drive applications (e.g., camera-to-processor links), not multi-source routing | Choose GS2971AIBTE3 when reclocking a single SDI source and driving a short PCB trace or backplane; LMH0056SQ/NOPB remains preferred for 4-input routing nodes |
Compared with LMH0056SQ/NOPB, LMH0044SQ/NOPB lacks reclocking and multiplexing entirely, serving only as a front-end equalizer, while GS2971AIBTE3 omits input selection capability and integrates a driver unsuitable for multi-output distribution-making LMH0056SQ/NOPB uniquely suited for SDI routing and switching infrastructure.
Availability
LMH0056SQ/NOPB is available at Aetrix Electronics and suitable for broadcast video routers, DVB-ASI equipment, and HD video format converters requiring stable component supply, long-term lifecycle assurance, and guaranteed RoHS-compliant sourcing.
Supply support for LMH0056SQ/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with deep expertise in high-speed video and broadcast infrastructure solutions.
The LMH0056SQ/NOPB belongs to TI's LMH video interface product line, engineered specifically for SMPTE-compliant serial digital video signal conditioning-including reclocking, equalization, and cable driving-in professional broadcast and production environments.
FAQ
What video standards does the LMH0056SQ/NOPB support?
The LMH0056SQ/NOPB supports SMPTE 259M (143 Mbps and 270 Mbps) for standard-definition and SMPTE 292M (1.483 Gbps and 1.485 Gbps) for high-definition serial digital video. It also handles DVB-ASI at 270 Mbps. All supported rates are explicitly defined in the official TI datasheet SNLS236C, and the device performs automatic rate detection and jitter suppression per standard requirements.
Does the LMH0056SQ/NOPB require an external crystal or can it use an oscillator?
The LMH0056SQ/NOPB accepts either a 27 MHz parallel-resonant crystal (with 20 pF load capacitance, ≤40 Ω series resistance) connected between XTAL IN/EXT CLK and XTAL OUT, or a 27 MHz LVCMOS-compatible clock signal applied directly to XTAL IN/EXT CLK. The datasheet specifies ±50 ppm frequency tolerance for stable PLL lock across temperature and voltage variations.
How does the 4:1 input multiplexer work on the LMH0056SQ/NOPB?
The LMH0056SQ/NOPB uses SEL0 and SEL1 (pins 47–48) to select one of four differential SDI inputs (SDI0–SDI3). Logic states 00, 01, 10, and 11 correspond to SDI0, SDI1, SDI2, and SDI3 respectively. This selection occurs prior to the reclock stage, allowing any chosen input to be retimed and distributed to the outputs without external switching hardware.
Can the LMH0056SQ/NOPB output a clean data-rate clock alongside retimed data?
Yes - the LMH0056SQ/NOPB provides a selectable second output (SCO/SDO2, pins 28–29) that functions either as a second retimed data stream or as a low-jitter serial data-rate clock (143/270/1483/1485 MHz), controlled by the SCO_EN pin (pin 37). When SCO_EN is high, SCO/SDO2 outputs the recovered clock with ≤3 psRMS jitter and 40–60% alignment within the data interval.
What is the purpose of the SD/HD output pin on the LMH0056SQ/NOPB?
The SD/HD output (pin 36) is a registered indicator that signals whether the LMH0056SQ/NOPB is locked to an SD-rate (143/270 Mbps, output high) or HD-rate (1.483/1.485 Gbps, output low) signal. It is intended to configure downstream devices like the LMH0002 cable driver for appropriate output drive strength and is only valid when LOCK DET is asserted.
LMH0056SQ/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Reclocker
- Applications:
- Professional Video
- Standards:
- DVB-ASI, SMPTE
- Control Interface:
- Serial
- Voltage - Supply:
- 3.135V ~ 3.465V
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 48-WQFN (7x7)
LMH0056SQ/NOPB FAQ
1.How can I place an order for LMH0056SQ/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LMH0056SQ/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMH0056SQ/NOPB reliable?
The price and inventory of LMH0056SQ/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMH0056SQ/NOPB is usually 5 days.
3.What payment methods are accepted for LMH0056SQ/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMH0056SQ/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LMH0056SQ/NOPB?
LMH0056SQ/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMH0056SQ/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMH0056SQ/NOPB?
For technical support, including LMH0056SQ/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMH0056SQ/NOPB requirements.
6.How does Aetrix verify that LMH0056SQ/NOPB is sourced from the original manufacturer or authorized distributors?
All LMH0056SQ/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMH0056SQ/NOPB meets industry standards.
7.What is the process for return or replacement of LMH0056SQ/NOPB?
All LMH0056SQ/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LMH0056SQ/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMH0056SQ/NOPB part is unused and in its original packaging.
Return procedure for LMH0056SQ/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LMH0056SQ/NOPB Tags
-
HDMI2C1-6C1
STMicroelectronics
-
ADA4430-1YKSZ-R7
Analog Devices Inc.
-
LM1881MX/NOPB
Texas Instruments
-
SN75DP130SSRGZR
Texas Instruments
-
EQCO30T5.2
Microchip Technology
-
LMH1980MM/NOPB
Texas Instruments
-
EQCO30R5.D
Microchip Technology
-
SII9022ACNU
Lattice Semiconductor Corporation
-
SN65DP159RGZR
Texas Instruments
-
SN65DP159RSBR
Texas Instruments
-
SN65DP141RLJR
Texas Instruments
-
LMH0303SQ/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
