Texas Instruments LMH0071SQE/NOPB
- Part No.:
- LMH0071SQE/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
LMH0071SQE/NOPB.pdf
- Description:
- IC DESERIALIZER SDI W/LVDS 48QFN
- Quantity:
- Payment:

- Shipping:

Inventory:179
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Product details
Overview
LMH0071SQE/NOPB from Texas Instruments is a single-channel SMPTE-compliant SDI deserializer with integrated reclocked serial loopthrough and 5-bit LVDS output interface. It supports 270 Mbps SD-SDI input, delivers reclocked LVDS data and clock to an FPGA host, and features DVB-ASI mode enablement, SMBus configuration, and industrial temperature operation (−40°C to +85°C).
For engineers reviewing the LMH0071SQE/NOPB datasheet, LMH0071SQE/NOPB pinout, LMH0071SQE/NOPB application, or LMH0071SQE/NOPB equivalent, key selection considerations include its fixed 270 Mbps data rate support, absence of SMPTE 292M/424M compliance, loopthrough-enabled cable driver functionality, and 48-pin WQFN package with dual supply (3.3V/2.5V) requirements.
Technical Context
The LMH0071SQE/NOPB implements a CDR-based architecture that extracts timing from 270 Mbps SD-SDI serial input, generates a clean DDR LVDS clock (RXCLK±), and outputs parallelized 5-bit LVDS data (RX[4:0]±). Its internal PLL locks without external VCOs and supports automatic link acquisition within 24 ms after reset or input change.
It integrates a reclocked serial loopthrough path with CML output (TXOUT±), compliant with SMPTE 259M-C for driving 75 Ω coaxial cable, and includes configurable GPIO[2:0], RX_MUX_SEL for dual-input selection, and DVB_ASI mode activation via dedicated LVCMOS pin - enabling 8b10b decode bypass and idle-character detection on RX4.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Data Rate | Fixed 270 Mbps - supports only SD-SDI (SMPTE 259M-C), not HD/3G-SDI |
| LVDS Output Interface | 5-bit DDR LVDS (RX[4:0]±, RXCLK±) - drives FPGA with 230–310 mV differential swing |
| Loopthrough Output | CML TXOUT± - SMPTE 259M-C–compliant 720–880 mV into 75 Ω, with auto-slew rate adjustment |
| Supply Voltages | VDD3V3 = 3.135–3.465 V; VDD2V5 = 2.375–2.625 V - requires separate bypassing per rail |
| Power Dissipation | Typ. 532–620 mW at 270 Mbps with loopthrough enabled - optimized for low-power SD video systems |
| Jitter Tolerance | ≥0.6 UI minimum - meets SMPTE 259M-C input jitter robustness requirement |
| Operating Temperature | −40°C to +85°C - qualified for industrial video equipment deployment |
Pinout & Package
LMH0071SQE/NOPB is housed in a 48-pin WQFN package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad (DAP = GND). Pin mapping follows TI's standardized layout for the LMH00xx family, with dedicated power, ground, LVDS I/O, SMBus, control, and analog loop-filter terminals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RXIN0± | Differential SDI Input | Primary 270 Mbps serial input pair; selected when RX_MUX_SEL = L |
| RXIN1± | Differential SDI Input | Secondary 270 Mbps serial input pair; selected when RX_MUX_SEL = H |
| RX[4:0]±, RXCLK± | LVDS Output Bus | 5-bit DDR parallel data + clock to FPGA; 100 Ω termination required at receiver |
| TXOUT± | CML Loopthrough Output | Reclocked SDI output; requires 75 Ω pull-up to VDD2V5 for 75 Ω line drive |
| SMB_CS, SCK, SDA | SMBus Interface | 3.3V LVCMOS-configurable control bus (10–100 kHz); supports register read/write |
| DVB_ASI, Loopthru_EN, RESET, LOCK | Control Signals | LVCMOS-level functions: DVB-ASI mode enable, loopthrough on/off, hardware reset, PLL lock status |
| GPIO[2:0] | Configurable I/O | Software-defined bidirectional pins; default as inputs, programmable via SMBus registers |
| RSET, LF_REF, LF_CP | Analog Loop Filter | External RC network sets loop bandwidth and stability; RSET = 7.87 kΩ for nominal 800 mV output |
Key Features
| Feature | Design Value |
|---|---|
| Bypassable 8b10b Decode | Enables DVB-ASI mode via DVB_ASI pin high; outputs decoded nibbles on RX[3:0] and idle detect on RX4 |
| Reclocked Serial Loopthrough | Integrated SMPTE 259M-C–compliant cable driver (TXOUT±) eliminates need for external redriver |
| No External VCO Required | On-chip CDR with adaptive loop filter (LF_REF/LF_CP/RSET) locks directly to 270 Mbps embedded clock |
| 5-Bit LVDS FPGA Interface | Low-noise, low-skew DDR LVDS outputs reduce FPGA pin count vs. parallel CMOS and improve signal integrity |
| Industrial Temperature Range | Validated operation from −40°C to +85°C supports broadcast gear, DVRs, and field-deployed video systems |
Applications
| Video Cameras | DVRs |
|---|---|
Use Scenario: Capturing and digitizing analog composite video signals in portable or studio cameras using SD-SDI interface. IC Role / Device Role / Timing Role: Deserializes 270 Mbps SMPTE 259M-C input, provides reclocked LVDS data/clock to image processing FPGA, and enables local loopthrough for monitoring. Use Value: Eliminates external clock recovery and redriver ICs, reducing BOM count and PCB area in space-constrained camera modules. | Use Scenario: Receiving SD-SDI feeds from multiple cameras in embedded digital video recorders for surveillance or broadcast archiving. IC Role / Device Role / Timing Role: Converts serial SDI streams into parallel LVDS format for direct ingestion by video compression ASICs or SoCs. Use Value: Provides deterministic 24 ms link acquisition and stable LVDS timing, ensuring reliable frame capture without buffer underruns. |
| Video Switchers | Video Editing Systems |
Use Scenario: Routing SD-SDI sources in live production switchers where low-latency, glitch-free input switching is critical. IC Role / Device Role / Timing Role: Dual-input mux (RXIN0/RXIN1) with RX_MUX_SEL control enables seamless source switching without FPGA intervention. Use Value: Maintains lock during same-rate input switches; avoids >5 ms PLL relock delay seen in cross-rate transitions. | Use Scenario: Ingesting SD-SDI footage into non-linear editing workstations via PCIe or USB-connected capture cards. IC Role / Device Role / Timing Role: Acts as front-end deserializer with SMBus-configurable GPIOs for board-level status signaling and mode control. Use Value: SMBus interface allows host software to monitor LOCK status, configure DVB-ASI mode, and manage power states dynamically. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SDI deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMH0041SQE/NOPB | Supports 270 Mbps and 1.485 Gbps (SD/HD-SDI); no 3G-SDI; identical pinout and SMBus interface | Enables migration to HD workflows without PCB redesign; higher power (590 mW typ. at 1.485 Gbps) | Select LMH0041SQE/NOPB if future HD-SDI compatibility or multi-rate flexibility is required. |
| LMH0341RTVT | Supports full 270 Mbps/1.485 Gbps/2.97 Gbps (SD/HD/3G-SDI); same WQFN-48 package; adds SMPTE 424M compliance | Required for 1080p60/1080p50 3G-SDI systems; higher jitter tolerance (0.3 UI) and extended loop bandwidth | Choose LMH0341RTVT when 3G-SDI interoperability, broadcast-grade jitter performance, or SMPTE 424M certification is mandatory. |
Compared with LMH0041SQE/NOPB and LMH0341RTVT, the LMH0071SQE/NOPB offers lowest cost and power for dedicated SD-SDI systems but lacks multi-rate agility and 3G capability - making it optimal for cost-sensitive, fixed-rate SD video infrastructure.
Availability
LMH0071SQE/NOPB is available at Aetrix Electronics and suitable for video cameras, DVRs, and video switchers requiring stable component supply, long-term industrial temperature support, and SMPTE 259M-C compliance.
Supply support for LMH0071SQE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and communications markets.
The LMH0071SQE/NOPB belongs to TI's FPGA-Attach SER/DES product line, designed specifically for low-latency, low-power SDI deserialization in broadcast and professional video equipment interfacing with FPGAs.
FAQ
What data rates does the LMH0071SQE/NOPB support?
The LMH0071SQE/NOPB supports only 270 Mbps SD-SDI (SMPTE 259M-C). It does not support HD-SDI (1.485 Gbps) or 3G-SDI (2.97 Gbps). This fixed-rate design simplifies power and layout for dedicated SD video systems. The LMH0071SQE/NOPB achieves robust jitter tolerance (≥0.6 UI) and fast 24 ms link acquisition at this rate.
Does the LMH0071SQE/NOPB include a loopthrough function?
Yes, the LMH0071SQE/NOPB integrates a reclocked serial loopthrough with CML output (TXOUT±), compliant with SMPTE 259M-C. When Loopthru_EN is high, it drives 720–880 mV into 75 Ω coaxial cable. This eliminates the need for an external redriver IC in monitoring or daisy-chain configurations. The LMH0071SQE/NOPB maintains signal integrity with auto-adjusted slew rate.
How is the LMH0071SQE/NOPB configured and controlled?
The LMH0071SQE/NOPB uses a 3.3V SMBus interface (SMB_CS, SCK, SDA) for register configuration, supporting read/write access to GPIO settings, DVB-ASI mode, and LVDS output swing. Control pins like DVB_ASI, Loopthru_EN, and RX_MUX_SEL provide hardware-level mode selection. The LMH0071SQE/NOPB also features a dedicated RESET pin and LOCK status output for system-level synchronization.
What package and thermal characteristics does the LMH0071SQE/NOPB have?
The LMH0071SQE/NOPB uses a 48-pin WQFN package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad (DAP = GND). Its thermal resistance θJA is 26°C/W. The device requires separate 3.3V and 2.5V supplies, each with 4.7 μF + 0.1 μF bypassing; VDDPLL needs an additional 22 μF capacitor. The LMH0071SQE/NOPB operates across −40°C to +85°C.
Can the LMH0071SQE/NOPB operate in DVB-ASI mode?
Yes, the LMH0071SQE/NOPB supports DVB-ASI mode when the DVB_ASI pin is driven high. In this mode, it performs bypassable 8b10b decoding: RX[3:0] output decoded nibbles, and RX4 indicates idle-character detection. The LMH0071SQE/NOPB requires up to 110 consecutive K28.5 characters for proper framing initialization, aligning with DVB-ASI protocol requirements.
LMH0071SQE/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Deserializer
- Data Rate:
- 2.97Gbps
- Input Type:
- LVCMOS
- Output Type:
- LVDS
- Number of Inputs:
- 2
- Number of Outputs:
- 5
- Voltage - Supply:
- 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-WQFN (7x7)
LMH0071SQE/NOPB FAQ
1.How can I place an order for LMH0071SQE/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LMH0071SQE/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMH0071SQE/NOPB reliable?
The price and inventory of LMH0071SQE/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMH0071SQE/NOPB is usually 5 days.
3.What payment methods are accepted for LMH0071SQE/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMH0071SQE/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LMH0071SQE/NOPB?
LMH0071SQE/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMH0071SQE/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMH0071SQE/NOPB?
For technical support, including LMH0071SQE/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMH0071SQE/NOPB requirements.
6.How does Aetrix verify that LMH0071SQE/NOPB is sourced from the original manufacturer or authorized distributors?
All LMH0071SQE/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMH0071SQE/NOPB meets industry standards.
7.What is the process for return or replacement of LMH0071SQE/NOPB?
All LMH0071SQE/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LMH0071SQE/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMH0071SQE/NOPB part is unused and in its original packaging.
Return procedure for LMH0071SQE/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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