Texas Instruments LMH0340SQE/NOPB
- Part No.:
- LMH0340SQE/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Specialized
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
LMH0340SQE/NOPB.pdf
- Description:
- IC INTERFACE SPECIALIZED 48WQFN
- Quantity:
- Payment:

- Shipping:

Inventory:457
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Product details
Overview
LMH0340SQE/NOPB from Texas Instruments is a 3 Gbps SMPTE 424M/292M/259M-C and DVB-ASI compliant SDI serializer with integrated cable driver, LVDS parallel interface (5-bit DDR), and SMBus configuration. It accepts 27–297 MHz LVDS clock input, delivers 800 mVpp into 75 Ω, and operates across −40°C to +85°C for broadcast video camera and switcher interfaces.
For engineers reviewing the LMH0340SQE/NOPB datasheet, LMH0340SQE/NOPB pinout, LMH0340SQE/NOPB application, or LMH0340SQE/NOPB equivalent, this page provides verified technical context, real-world timing behavior, output compliance details per SMPTE standard, and validated alternative options for HD/3G-SDI FPGA-attached systems.
Technical Context
The LMH0340SQE/NOPB implements a fully integrated PLL-based serial digital interface generator with internal 8b10b encoding (bypassable), parallel-to-serial 5:1 conversion, and programmable output amplitude via RSET resistor. Its TXCLK PLL cleans input clock noise and locks within 10 ms at 2.97 Gbps.
It supports dual-mode operation: normal SMPTE-compliant serialization of five LVDS data lanes (TX[4:0]±) and DVB-ASI mode where TX4± acts as data valid control for 4-bit nibble input. Output drive uses current-mode CML-compatible architecture with external 75 Ω back-termination to 2.5 V for 75 Ω coaxial cable driving.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Serial Data Rate | 270 Mbps to 2.97 Gbps - supports SD, HD, and 3G-SDI standards including SMPTE 424M. |
| Output Amplitude | 720–880 mVpp into 75 Ω - adjustable via RSET pin; 800 mVpp typical meets SMPTE 424M spec. |
| Output Jitter (HD, 3G) | 30 ps peak-to-peak alignment jitter - measured per SMPTE RP184; ensures robust eye opening. |
| LVDS Input Interface | 5-bit DDR (TX[4:0]±, TXCLK±) with internal 100 Ω termination - eliminates external resistors on FPGA side. |
| SMBus Configuration | 3.3 V LVCMOS interface (SCK/SDA/SMB_CS) - enables register-level control of encoding, power-down, and DVB_ASI mode. |
| Power Dissipation | 475–545 mW at 2.97 Gbps - split across VDD3V3 (73–85 mA) and VDD2V5 (93–102 mA) rails. |
| Operating Temperature | −40°C to +85°C - qualified for industrial-grade broadcast equipment deployment. |
Pinout & Package
LMH0340SQE/NOPB uses a 48-pin WQFN package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad (DAP = GND). Pin mapping is validated per TI SNLS271I Rev. April 2013.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| TX[4:0]±, TXCLK± | LVDS differential inputs | 5-bit DDR data + clock interface to FPGA; internal 100 Ω termination reduces layout complexity. |
| TXOUT+, TXOUT− | CML serial output pair | Drives 75 Ω coaxial cable directly with back-termination; requires external 75 Ω to 2.5 V per pin. |
| SCK, SDA, SMB_CS | SMBus 2.0 control interface | Configures registers (e.g., DVB_ASI mode, power-down); supports multi-drop via chip-select. |
| RESET, LOCK, DVB_ASI | Dedicated control signals | Hardware reset (active-low), PLL lock status (active-low), and DVB-ASI mode select (high = enabled). |
| RSET, LF_CP, LF_REF | Analog configuration pins | RSET sets output amplitude; LF_CP/LF_REF connect external loop filter for PLL stability. |
| VDD3V3, VDD2V5, VDDPLL, GND | Power supply terminals | Separate 3.3 V (I/O, PLL) and 2.5 V (core) rails; DAP must be soldered to PCB ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| No external VCO or clock reference required | Integrated TXCLK PLL synthesizes serial clock from LVDS parallel clock - simplifies board-level timing design. |
| Bypassable 8b10b encoding | Enables direct pass-through of raw data or SMPTE/DVB-ASI-compliant encoded streams - configurable per application need. |
| Integrated variable-output cable driver | Meets SMPTE 424M return loss (≥10 dB up to 2.97 GHz) and amplitude specs without external amplifiers. |
| Industrial temperature range | −40°C to +85°C operation - supports deployment in video cameras, field recorders, and live production switchers. |
| Small 48-pin WQFN package | 7 mm × 7 mm footprint with exposed thermal pad - enables high-density routing in space-constrained broadcast modules. |
Applications
| Video Camera Interface | Digital Video Recorder (DVR) |
|---|---|
|
Use Scenario: High-resolution image sensor output routed from FPGA to SDI transmitter for real-time broadcast feed. IC Role / Device Role / Timing Role: Serializer converting 5-bit LVDS pixel data into SMPTE 424M-compliant 3G-SDI stream with sub-30 ps jitter. Use Value: Eliminates need for discrete clock clean-up ICs and external cable drivers while maintaining SMPTE eye mask compliance. |
Use Scenario: Recording uncompressed HD/3G-SDI signals from multiple sources onto solid-state storage arrays. IC Role / Device Role / Timing Role: FPGA-attached serializer providing deterministic latency (<10 TXCLK cycles) and stable output amplitude over temperature. Use Value: Ensures consistent signal integrity across long cable runs to recording chassis, reducing bit error rate in archival workflows. |
| Live Video Switcher | Post-Production Editing System |
|
Use Scenario: Routing low-latency video feeds between multiple camera inputs and program outputs in OB vans. IC Role / Device Role / Timing Role: Parallel-to-serial converter with DVB_ASI mode support for ASI transport stream embedding. Use Value: Enables single hardware platform to handle both baseband SDI and ASI distribution without redesign. |
Use Scenario: Capturing clean 4:2:2 10-bit video from camera raw feeds into non-linear editing workstations. IC Role / Device Role / Timing Role: Serializer with programmable RSET and SMBus-controlled encoding for precise amplitude and protocol matching. Use Value: Guarantees SMPTE 259M/292M/424M compliance during ingest, avoiding re-clocking stages that add latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SDI serializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMH0040SQE/NOPB | Supports up to 1.485 Gbps (HD-SDI only); no DVB-ASI mode; identical 48-pin WQFN package and LVDS interface. | Limited to HD-SDI (SMPTE 292M) and SD-SDI (259M-C); not suitable for 3G-SDI infrastructure or ASI transport. | Select when cost-sensitive HD-only systems require pin-compatible drop-in replacement with lower power (440 mW typical). |
| LMH0070SQE/NOPB | Fixed 270 Mbps operation (SD-SDI only); no DVB-ASI mode; same package and SMBus interface. | Designed exclusively for legacy SD-SDI (SMPTE 259M-C) applications; lacks 3G/HD capability and flexible encoding. | Choose for retrofitting analog-to-digital converters or legacy broadcast gear where only SD-SDI bandwidth is needed. |
Compared with LMH0040SQE/NOPB and LMH0070SQE/NOPB, the LMH0340SQE/NOPB uniquely supports full 3G-SDI (2.97 Gbps), DVB-ASI mode, and programmable output amplitude - making it the only option among the three for next-generation broadcast infrastructure requiring SMPTE 424M compliance.
Availability
LMH0340SQE/NOPB is available at Aetrix Electronics and suitable for broadcast video cameras, live production switchers, and professional DVRs requiring stable component supply, long-term lifecycle assurance, and SMPTE-certified signal integrity.
Supply support for LMH0340SQE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity solutions for industrial, automotive, and communications markets.
The LMH0340SQE/NOPB belongs to TI's FPGA-Attach SER/DES product line, designed specifically for high-reliability, low-latency digital video serialization in broadcast and professional AV equipment.
FAQ
What video standards does the LMH0340SQE/NOPB support?
The LMH0340SQE/NOPB supports SMPTE 424M (3G-SDI), SMPTE 292M (HD-SDI), SMPTE 259M-C (SD-SDI), and DVB-ASI standards. Table 1 in the official datasheet confirms full compliance across all four, with output parameters (jitter, amplitude, rise/fall time) validated per each standard's measurement methodology.
Does the LMH0340SQE/NOPB require an external VCO or crystal oscillator?
No, the LMH0340SQE/NOPB does not require an external VCO or crystal oscillator. Its integrated TXCLK PLL generates the serial clock from the incoming LVDS parallel clock (27–297 MHz), eliminating external timing components and reducing bill-of-materials count.
How is output amplitude controlled on the LMH0340SQE/NOPB?
Output amplitude on the LMH0340SQE/NOPB is set by an external resistor (RSET) connected from pin 14 to ground. A nominal 8.06 kΩ resistor yields 800 mVpp into 75 Ω, meeting SMPTE 424M requirements; values can be adjusted to scale amplitude linearly across 720–880 mVpp range.
Can the LMH0340SQE/NOPB operate in DVB-ASI mode?
Yes, the LMH0340SQE/NOPB supports DVB-ASI mode via the DVB_ASI pin (pin 6). When driven high, TX4± becomes a data-valid signal, and TX0–TX3 carry 4-bit nibbles for internal 8b10b encoding - enabling ASI transport stream generation without FPGA logic changes.
What is the recommended power supply sequencing for the LMH0340SQE/NOPB?
The LMH0340SQE/NOPB requires 3.3 V applied before 2.5 V during power-up. While timing between rails is not critical, this sequence ensures proper initialization of internal regulators and PLL circuitry. A 22 μF capacitor on VDDPLL (pin 28) is mandatory for stable PLL operation.
LMH0340SQE/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Video Equipment
- Interface:
- SMBus (2-Wire/I2C)
- Voltage - Supply:
- 2.5V, 3.3V
- Supplier Device Package:
- 48-WQFN (7x7)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
LMH0340SQE/NOPB FAQ
1.How can I place an order for LMH0340SQE/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LMH0340SQE/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMH0340SQE/NOPB reliable?
The price and inventory of LMH0340SQE/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMH0340SQE/NOPB is usually 5 days.
3.What payment methods are accepted for LMH0340SQE/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMH0340SQE/NOPB transactions.
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4.How is shipping managed for LMH0340SQE/NOPB?
LMH0340SQE/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMH0340SQE/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMH0340SQE/NOPB?
For technical support, including LMH0340SQE/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMH0340SQE/NOPB requirements.
6.How does Aetrix verify that LMH0340SQE/NOPB is sourced from the original manufacturer or authorized distributors?
All LMH0340SQE/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMH0340SQE/NOPB meets industry standards.
7.What is the process for return or replacement of LMH0340SQE/NOPB?
All LMH0340SQE/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LMH0340SQE/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMH0340SQE/NOPB part is unused and in its original packaging.
Return procedure for LMH0340SQE/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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