Texas Instruments LMH0340SQX/NOPB
- Part No.:
- LMH0340SQX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Specialized
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
LMH0340SQX/NOPB.pdf
- Description:
- IC INTERFACE SPECIALIZED 48WQFN
- Quantity:
- Payment:

- Shipping:

Inventory:100
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Product details
Overview
LMH0340SQX/NOPB from Texas Instruments is a 3 Gbps SMPTE 424M/292M/259M-C and DVB-ASI compliant SDI serializer with integrated cable driver, LVDS host interface, and SMBus configuration. It accepts 5-bit DDR LVDS data (TX[4:0]±) and clock (TXCLK±), performs parallel-to-serial conversion with bypassable 8b10b encoding, and delivers CML-compatible serial output (TXOUT±) compliant to SMPTE return loss and jitter specs. Used in broadcast-grade video cameras and DVRs requiring robust 3G-SDI transmission over coaxial cable.
For engineers reviewing the LMH0340SQX/NOPB datasheet, LMH0340SQX/NOPB pinout, LMH0340SQX/NOPB application, or LMH0340SQX/NOPB equivalent, key selection criteria include its 2.97 Gbps datarate support, integrated PLL clock cleaning, 48-pin WQFN package with exposed thermal pad, 800 mV output amplitude into 75 Ω, and configurable DVB_ASI mode via GPIO.
Technical Context
The LMH0340SQX/NOPB implements a TXCLK-input PLL with external loop filter (LF_REF/LF_CP pins) to generate clean serialization clocks without external VCO or reference crystal. Its internal variable-output cable driver supports SMPTE-compliant rise/fall times (90–135 ps at 2.97 Gbps) and output return loss ≥10 dB up to 2.97 GHz.
Configuration occurs via 3.3V SMBus (SCK/SDA/SMB_CS) supporting register-level control of DVB_ASI mode, CLK delay, idle character, and power-down states. The device operates across −40°C to +85°C with dual supplies: 3.3V for I/O and PLL, 2.5V for core logic, and includes LOCK status output and RESET input for system-level synchronization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Datarate Support | 270 Mbps to 2.97 Gbps - enables SD, HD, and 3G-SDI compliance per SMPTE 259M-C/292M/424M and DVB-ASI standards |
| Output Amplitude | 720–880 mV into 75 Ω - meets SMPTE 424M peak-to-peak voltage requirement with RSET resistor tuning |
| Output Jitter (HD, 3G) | 30–50 ps peak-to-peak - measured per SMPTE RP184, ensures signal integrity over long coax runs |
| Power Dissipation | 475–545 mW at 2.97 Gbps - optimized for thermal management in compact video enclosures |
| LVDS Input Termination | 100 Ω internal - eliminates need for external termination resistors on FPGA-side PCB traces |
| SMBus Interface | 3.3V LVCMOS, 10–100 kHz - enables dynamic reconfiguration of DVB_ASI mode, idle characters, and power states |
| Operating Temperature | −40°C to +85°C - qualified for industrial and broadcast equipment deployed in uncontrolled environments |
Pinout & Package
LMH0340SQX/NOPB uses a 48-pin WQFN package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad (DAP = GND) for enhanced thermal dissipation in high-speed video applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| TX[4:0]± | LVDS Data Inputs | 5-bit DDR parallel interface accepting formatted video data from FPGA; internally terminated to 100 Ω |
| TXCLK± | LVDS Clock Input | DDR clock reference for serialization timing; drives internal PLL and determines output datarate |
| TXOUT± | CML Serial Output | Differential output compliant with SMPTE 424M; requires external 75 Ω back-termination to 2.5V |
| SMB_CS / SCK / SDA | SMBus Interface | 3.3V-configurable control bus for register access; supports multi-drop via chip-select |
| LOCK / RESET / DVB_ASI | Control Signals | LOCK indicates PLL lock status; RESET forces hardware reset; DVB_ASI selects DVB-ASI encoding mode |
| RSET / LF_REF / LF_CP | Analog Configuration | RSET sets output amplitude; LF_REF/LF_CP connect external RC loop filter for PLL stability |
Key Features
| Feature | Design Value |
|---|---|
| Integrated SMPTE Cable Driver | Meets SMPTE 424M output return loss (≥10 dB up to 2.97 GHz) and jitter specs without external components |
| Bypassable 8b10b Encoding | Enables DVB_ASI mode where TX4± acts as data-valid control; otherwise supports native SMPTE bitstream formatting |
| No External Clock Reference Required | PLL synthesizes serialization clock directly from TXCLK± input - eliminates VCO, crystal, and associated layout complexity |
| Configurable Output Amplitude | RSET pin accepts 8.06 kΩ resistor for nominal 800 mV output; adjustable across full SMPTE 424M range (720–880 mV) |
| Industrial Temperature Range | Validated operation from −40°C to +85°C - suitable for video capture systems in field-deployed enclosures |
Applications
| Video Cameras | DVRs |
|---|---|
Use Scenario: High-resolution 1080p60 and 4Kp30 video capture with real-time baseband SDI output over coaxial cable. IC Role / Device Role / Timing Role: Serializer converts FPGA-processed parallel video data into SMPTE 424M-compliant 3G-SDI stream with sub-50 ps jitter. Use Value: Enables direct connection to broadcast monitors and switchers without external reclocking or level-shifting circuitry. |
Use Scenario: Multi-channel SD/HD/3G-SDI recording in professional surveillance and broadcast archive systems. IC Role / Device Role / Timing Role: Provides deterministic latency (<10 TXCLK cycles) and stable output amplitude for reliable long-duration recording. Use Value: Eliminates frame drop risk caused by output return loss violations or jitter-induced eye closure. |
| Video Switchers | Video Editing Systems |
Use Scenario: Low-latency routing of live 3G-SDI feeds between camera sources, graphics generators, and transmission encoders. IC Role / Device Role / Timing Role: Acts as source-side serializer with LOCK-synchronized PLL ensuring phase-coherent switching across multiple inputs. Use Value: Prevents glitching during hot-switching by maintaining stable output timing even under rapid input rate changes. |
Use Scenario: Real-time ingest of uncompressed HD/3G-SDI streams into PCIe-based editing workstations with FPGA-accelerated processing. IC Role / Device Role / Timing Role: Bridges FPGA video pipeline to SDI PHY layer with programmable SMBus registers for format adaptation. Use Value: Allows runtime reconfiguration of DVB_ASI vs SMPTE modes and idle character insertion without firmware reload. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SDI serializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMH0040SQX/NOPB | Supports up to 1.485 Gbps (HD-SDI only); lacks 3G-SDI capability and higher-frequency return loss spec | Targeted for HD-only infrastructure; not suitable for 1080p60 or 4Kp30 baseband transport | Select when cost-sensitive HD applications do not require 3G-SDI bandwidth or SMPTE 424M compliance |
| LMH0070SQX/NOPB | Fixed 270 Mbps operation (SD-SDI only); no DVB_ASI mode or programmable PLL; minimal SMBus register set | Designed for legacy SD video equipment; no support for HD/3G formats or dynamic configuration | Choose only for retrofitting analog-to-digital SD converters where bandwidth and flexibility are non-critical |
Compared with LMH0040SQX/NOPB and LMH0070SQX/NOPB, the LMH0340SQX/NOPB uniquely delivers full 3G-SDI performance with integrated clock cleaning, programmable encoding, and industrial temperature support - making it the sole option for new broadcast-grade 1080p60+ designs requiring SMPTE 424M compliance.
Availability
LMH0340SQX/NOPB is available at Aetrix Electronics and suitable for video cameras, DVRs, and broadcast switchers requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for LMH0340SQX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and communications markets.
The LMH0340SQX/NOPB belongs to TI's FPGA-Attach SER/DES product line, engineered specifically for high-reliability digital video interface bridging between FPGAs and SMPTE-compliant coaxial transmission systems.
FAQ
What video standards does the LMH0340SQX/NOPB support?
The LMH0340SQX/NOPB supports SMPTE 424M (3G-SDI), SMPTE 292M (HD-SDI), SMPTE 259M-C (SD-SDI), and DVB-ASI standards. It achieves full compliance through its integrated cable driver, programmable 8b10b encoder, and output characteristics verified per SMPTE RP184. The LMH0340SQX/NOPB is explicitly validated for all four standards in Table 1 of its datasheet.
Does the LMH0340SQX/NOPB require an external clock source or VCO?
No, the LMH0340SQX/NOPB does not require an external clock source or VCO. Its internal PLL generates the serialization clock directly from the LVDS TXCLK± input, with external loop filter components (LF_REF and LF_CP pins) providing stability. This architecture eliminates external timing components and reduces board area and BOM count for the LMH0340SQX/NOPB.
How is output amplitude controlled on the LMH0340SQX/NOPB?
Output amplitude on the LMH0340SQX/NOPB is controlled via the RSET pin: a resistor from RSET to GND sets the current source value, directly scaling the 720–880 mV output swing into 75 Ω. A nominal 8.06 kΩ resistor yields 800 mV, meeting SMPTE 424M requirements. This analog trim allows precise calibration without modifying firmware or registers for the LMH0340SQX/NOPB.
What is the function of the DVB_ASI pin on the LMH0340SQX/NOPB?
The DVB_ASI pin on the LMH0340SQX/NOPB selects operational mode: when driven high, it enables DVB-ASI encoding where TX4± acts as data-valid control and TX[3:0]± form 8-bit nibbles for 8b10b conversion; when low, the LMH0340SQX/NOPB operates in standard SMPTE mode with full 5-bit serialization. This pin provides hardware-selectable protocol compatibility without SMBus interaction.
What package type and thermal characteristics does the LMH0340SQX/NOPB use?
The LMH0340SQX/NOPB uses a 48-pin WQFN package (7 mm × 7 mm) with an exposed thermal pad (DAP) connected to GND. Its thermal resistance θJA is 25°C/W, enabling reliable operation at 475–545 mW dissipation within −40°C to +85°C ambient. The DAP must be soldered to a large copper pour for effective heat transfer in video equipment enclosures using the LMH0340SQX/NOPB.
LMH0340SQX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Video Equipment
- Interface:
- SMBus (2-Wire/I2C)
- Voltage - Supply:
- 2.5V, 3.3V
- Supplier Device Package:
- 48-WQFN (7x7)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
LMH0340SQX/NOPB FAQ
1.How can I place an order for LMH0340SQX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LMH0340SQX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMH0340SQX/NOPB reliable?
The price and inventory of LMH0340SQX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMH0340SQX/NOPB is usually 5 days.
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LMH0340SQX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMH0340SQX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMH0340SQX/NOPB?
For technical support, including LMH0340SQX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMH0340SQX/NOPB requirements.
6.How does Aetrix verify that LMH0340SQX/NOPB is sourced from the original manufacturer or authorized distributors?
All LMH0340SQX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMH0340SQX/NOPB meets industry standards.
7.What is the process for return or replacement of LMH0340SQX/NOPB?
All LMH0340SQX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LMH0340SQX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMH0340SQX/NOPB part is unused and in its original packaging.
Return procedure for LMH0340SQX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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