Texas Instruments LMH0341SQE/NOPB

Overview

LMH0341SQE/NOPB from Texas Instruments is a 3 Gbps SMPTE-compliant SDI deserializer with integrated reclocked serial loopthrough and 5-bit LVDS interface to FPGA. It supports SMPTE 259M-C, 292M, 424M, and DVB-ASI standards, features automatic data-rate detection, no external VCO requirement, and operates across −40°C to +85°C for broadcast video routing in cameras, DVRs, and switchers.

For engineers reviewing the LMH0341SQE/NOPB datasheet, LMH0341SQE/NOPB pinout, LMH0341SQE/NOPB application, or LMH0341SQE/NOPB equivalent, this device delivers jitter-tolerant serial-to-parallel conversion, SMBus-configurable operation, dual-input multiplexing (RXIN0/RXIN1), and loopthrough-enabled signal distribution - critical for HD/3G-SDI infrastructure design requiring deterministic latency and SMPTE compliance.

Technical Context

The LMH0341SQE/NOPB implements a CDR-based architecture with internal PLL for embedded clock recovery from 270 Mbps–2.97 Gbps serial streams, supporting both DVB-ASI (8b10b decode) and SMPTE framing modes. Its dual differential input mux (RXIN0+/−, RXIN1+/−) enables source switching without external hardware.

LVDS outputs (RXCLK±, RX[4:0]±) deliver DDR-aligned parallel data to FPGA logic, while TXOUT± provides SMPTE-compliant reclocked loopthrough at 720–880 mV into 75 Ω. Configuration and status are managed via 3.3V SMBus (SCK/SDA/SMB_CS) with LOCK and RESET pins for real-time control.

Key Specifications

Pinout & Package

LMH0341SQE/NOPB uses a 48-pin WQFN package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad (DAP = GND). Pin mapping is validated per TI SNLS272Q Rev. April 2013.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar SDI deserializer applications.

Compared with LMH0041SQE/NOPB and LMH0071SQE/NOPB, the LMH0341SQE/NOPB uniquely supports full 3G-SDI (2.97 Gbps), SMPTE 424M compliance, DVB-ASI decoding, and integrated loopthrough - making it the sole option among these three for next-generation broadcast infrastructure requiring future-proof bandwidth and protocol flexibility.

Availability

LMH0341SQE/NOPB is available at Aetrix Electronics and suitable for broadcast video cameras, digital video recorders, professional video switchers, and post-production editing systems requiring stable component supply and SMPTE-compliant signal integrity.

Supply support for LMH0341SQE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions for industrial, automotive, and communications markets.

The LMH0341SQE/NOPB belongs to TI's FPGA-Attach SER/DES product line, designed specifically for high-reliability broadcast video infrastructure requiring SMPTE-compliant serial-to-parallel conversion with minimal external components.

FAQ

What video standards does the LMH0341SQE/NOPB support?

The LMH0341SQE/NOPB supports SMPTE 259M-C (SD-SDI), SMPTE 292M (HD-SDI), SMPTE 424M (3G-SDI), and DVB-ASI standards. It automatically detects incoming data rate across 270 Mbps to 2.97 Gbps and configures its CDR and output drivers accordingly. DVB-ASI mode is enabled via the DVB_ASI pin and activates internal 8b10b decoding. The LMH0341SQE/NOPB is validated per Table 1 in SNLS272Q for full SMPTE 424M compliance.

Does the LMH0341SQE/NOPB require an external clock or VCO?

No, the LMH0341SQE/NOPB does not require an external clock or VCO. Its integrated CDR recovers the embedded clock directly from the serial input stream and generates a clean, low-jitter RXCLK± output for FPGA synchronization. The PLL loop bandwidth adapts automatically to the detected data rate, ensuring optimal jitter transfer performance across SD, HD, and 3G-SDI rates. This eliminates board space and BOM cost associated with discrete clock synthesis.

How is the loopthrough function enabled and configured on the LMH0341SQE/NOPB?

The loopthrough function on the LMH0341SQE/NOPB is enabled by driving the Loopthru_EN pin high. When active, the reclocked serial output appears on TXOUT± with SMPTE-compliant amplitude (720–880 mV into 75 Ω). Output swing is set by an external resistor from RSET to GND (7.87 kΩ yields 800 mV). The LMH0341SQE/NOPB also supports loopthrough disable (Loopthru_EN = low) for power savings or when only deserialization is needed.

What is the purpose of the RX_MUX_SEL pin on the LMH0341SQE/NOPB?

The RX_MUX_SEL pin selects between two differential serial inputs: RXIN0± (low) or RXIN1± (high). This enables source switching - for example, between primary and backup camera feeds - without external multiplexers. The selected input is routed to the CDR and loopthrough path. Switching between same-data-rate sources typically causes only brief data corruption (<5 ms lock reacquisition if PLL loses lock), while cross-rate switching requires longer acquisition time. The LMH0341SQE/NOPB validates this behavior per Figure 5 and functional description in SNLS272Q.

Can the LMH0341SQE/NOPB operate in DVB-ASI mode and SMPTE mode simultaneously?

No, the LMH0341SQE/NOPB operates in either DVB-ASI mode or SMPTE mode, selected exclusively by the DVB_ASI pin level. When DVB_ASI = high, the internal 8b10b decoder engages, and RX[3:0] output decoded nibbles with RX4 indicating idle characters. When DVB_ASI = low, the device operates in standard SMPTE framing mode, outputting raw parallelized data. Both modes share the same CDR, LVDS interface, and loopthrough path, but decoding logic is mutually exclusive per TI's functional description in SNLS272Q Section 8.3.