Texas Instruments LMH0346SQ/NOPB
- Part No.:
- LMH0346SQ/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Video Processing
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LMH0346SQ/NOPB.pdf
- Description:
- IC VIDEO RECLOCKER 24WQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LMH0346SQ/NOPB from Texas Instruments is a 3 Gbps HD/SD SDI reclocker IC that retimes serial digital video data per SMPTE 424M, SMPTE 292M, and SMPTE 259M(C) standards at 270 Mbps, 1.483/1.485 Gbps, and 2.967/2.97 Gbps. It features dual differential outputs, automatic data-rate detection, and a selectable second output for either reclocked data or low-jitter serial clock. It is used in digital video routers, format converters, and DVB-ASI equipment.
For engineers reviewing the LMH0346SQ/NOPB datasheet, LMH0346SQ/NOPB pinout, LMH0346SQ/NOPB application, or LMH0346SQ/NOPB equivalent, key selection criteria include jitter suppression performance (≤0.08 UIP-P at 2.97 Gbps), dual-output flexibility (SDO + SCO/SDO2), 3.3 V single-supply operation, industrial temperature range (−40°C to +85°C), and WQFN-24 package compatibility with layout-constrained video signal chains.
Technical Context
The LMH0346SQ/NOPB implements a PLL-based reclocking architecture with adaptive loop bandwidth (275 kHz at 270 Mbps, 2.75 MHz at 2.97 Gbps) to suppress accumulated input jitter while preserving data integrity. It supports both auto-rate detection and manual rate select via RATE0/RATE1 pins, enabling robust operation across SD, HD, and 3G-SDI data streams.
Its differential CML/LVPECL-compatible I/Os interface directly with TI's LMH0344 equalizer and LMH0302 cable driver. The SCO_EN-controlled multiplexed SCO/SDO2 output provides system-level timing flexibility-either a second retimed data path or a phase-aligned, low-jitter serial clock (270 MHz to 2970 MHz) with ≤60% alignment tolerance relative to data interval center.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Serial Data Rates | 270 Mbps, 1.483/1.485 Gbps, 2.967/2.97 Gbps - fully compliant with SMPTE 259M(C), 292M, and 424M standards |
| Output Jitter (Data) | 0.06–0.08 UIP-P at 2.97 Gbps - enables reliable transmission over long coaxial runs and multi-stage routing |
| Supply Voltage | 3.3 V ±5% - single-rail operation simplifies power delivery in dense video PCB layouts |
| Power Consumption | 126 mA typical at 2.97 Gbps (≈370 mW) - thermally manageable in WQFN-24 without forced airflow |
| Operating Temperature | −40°C to +85°C - qualified for industrial and broadcast-grade embedded video systems |
| Differential Output Swing | 750 mVP-P into 100 Ω - meets LVPECL-compatible drive requirements for downstream SDI receivers/drivers |
| Reference Clock | 27 MHz ±50 ppm crystal or LVCMOS input - enables stable PLL lock without external frequency synthesizers |
Pinout & Package
The LMH0346SQ/NOPB is housed in a 5 mm × 4 mm, 24-pin WQFN (NHZ) package with exposed die attach pad (DAP) electrically connected to VEE (ground). The DAP must be soldered to a solid ground plane for thermal dissipation and signal integrity.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 | LF1, LF2 | Loop filter terminals - require 56 nF capacitor between them for stable PLL operation per TI design guidelines |
| 3, 4 | RATE0, RATE1 | Manual data-rate select inputs - internal pulldowns default to Auto-Rate Detect mode (00); enable fixed-rate operation or test modes |
| 5, 6 | SDI, SDI | Differential serial data input - CML/LVPECL compatible, 800 mVP-P min swing, DC-coupled interface recommended |
| 7 | VCC | Core supply (3.3 V) - bypass with 0.1 µF ceramic capacitor near pin |
| 8 | BYPASS/AUTO BYPASS | Reclocker enable control - internal pulldown enables Auto Bypass on unlock; high forces transparent pass-through |
| 9 | OUTPUT MUTE | Active-low output disable - internal pullup enables outputs by default; mutes SDO and SCO/SDO2 simultaneously |
| 10 | XTAL IN/EXT CLK | 27 MHz reference input - accepts parallel-resonant crystal or LVCMOS clock; critical for PLL stability |
| 12, 13 | XTAL OUT, LOCK DET | Oscillator output and PLL lock indicator - LOCK DET is active-high, used for system synchronization or fault reporting |
| 14, 15 | SCO/SDO2, SCO/SDO2 | Multiplexed differential output - function selected by SCO_EN; delivers either second data stream or serial clock |
| 16, 17 | VCCO, VCCO | Output driver supply - separate 3.3 V rail decoupling improves noise isolation for high-speed outputs |
| 18, 19 | SDO, SDO | Primary differential reclocked data output - 750 mVP-P, LVPECL-compatible, drives 100 Ω differential loads |
| 20 | SD/HD | Data-rate indicator - high = SD (270 Mbps), low = HD/3G (≥1.483 Gbps); used to configure downstream drivers like LMH0302 |
| 21 | SCO_EN | SCO/SDO2 function select - internal pulldown defaults to data output mode; high selects serial clock output |
| 22 | RSVD | Reserved - no connection; leave unconnected per TI recommendation |
| 23, 24, DAP | VEE, VEE, VEE | Negative supply / ground - all three pins and DAP connect to system ground; DAP is primary thermal and electrical return path |
Key Features
| Feature | Design Value |
|---|---|
| Dual differential reclocked outputs | SDO (fixed data) + SCO/SDO2 (configurable as data or clock) - eliminates need for external clock fanout or data duplication ICs |
| Auto-rate detection with manual override | Identifies 270/1485/2970 Mbps streams without configuration; RATE0/RATE1 pins allow deterministic mode selection for mixed-rate systems |
| Low-jitter serial clock generation | SCO output delivers 270–2970 MHz clock with ≤3 psRMS jitter - suitable for synchronous sampling in ADC/DAC or FPGA capture interfaces |
| Integrated lock detect and rate indicator | LOCK DET (active-high) and SD/HD (logic level) provide real-time status for firmware monitoring and dynamic system reconfiguration |
| LVPECL-compatible I/O with wide common-mode range | Accepts 200–1600 mVP-P input swing and drives 620–880 mVP-P outputs - interoperable with TI's LMH0344 equalizer and LMH0302 driver without level-shifting |
| Industrial-grade WQFN package | 5 mm × 4 mm footprint with exposed DAP - enables compact, high-density video board layouts while maintaining thermal performance up to +85°C |
Applications
| Video Routers & Switchers | Digital Video Processing Equipment |
|---|---|
Use Scenario: High-density SDI signal distribution in broadcast production trucks and OB vans with >32×32 crosspoint switching. IC Role / Device Role / Timing Role: Reclocker placed after adaptive equalizer (e.g., LMH0344) to restore jitter-degraded signals before fanout to multiple destinations. Use Value: Enables error-free switching of 3G-SDI signals across 10+ cascaded stages by reducing accumulated jitter to <0.08 UIP-P. |
Use Scenario: Real-time color correction and frame-rate conversion in professional editing workstations handling UHD/4K over dual-link 3G-SDI. IC Role / Device Role / Timing Role: Jitter cleanup stage prior to FPGA-based processing, with SCO/SDO2 configured as clock output for synchronous pixel sampling. Use Value: Provides sub-3 psRMS clock for precise timing alignment between video capture and processing logic, minimizing skew-induced artifacts. |
| DVB-ASI Equipment | Video Standards Converters |
Use Scenario: MPEG-2 transport stream regeneration in satellite uplink modulators where ASI data must meet ETSI EN 300 429 jitter limits. IC Role / Device Role / Timing Role: Reclocks 270 Mbps DVB-ASI data recovered from coaxial cable, suppressing cable-induced jitter before modulation. Use Value: Maintains BER <10−12 under 6 UIP-P input jitter - satisfies ASI compliance for mission-critical broadcast infrastructure. |
Use Scenario: Conversion between SMPTE 259M (SD-SDI) and SMPTE 424M (3G-SDI) in studio distribution amplifiers supporting legacy and modern cameras. IC Role / Device Role / Timing Role: Rate-transparent reclocker with SD/HD output driving LMH0302 cable driver edge-rate control to match input standard. Use Value: Eliminates manual reconfiguration; SD/HD pin automatically adjusts driver slew rate for SMPTE-compliant rise/fall times per standard. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SDI reclocking applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMH0346MH/NOPB | Same silicon, HTSSOP-20 package (6.5 × 4.4 mm) - larger footprint, higher θJA (26.6°C/W) | Preferred where board space permits and thermal margin is less constrained; pinout differs from WQFN-24 | Select when legacy HTSSOP layout reuse is required or when manual assembly favors larger pitch. |
| LMH0384SQ/NOPB | Successor device with extended 12G-SDI support (11.88 Gbps), lower power (280 mW), and integrated cable driver - not drop-in compatible | Required for UHD/8K workflows; lacks DVB-ASI mode but adds SMPTE ST 2082-1 compliance | Choose for future-proofing beyond 3G-SDI; requires PCB redesign and firmware updates due to different pinout and control logic. |
Compared with LMH0346MH/NOPB, the LMH0346SQ/NOPB offers 29% smaller footprint and improved thermal resistance (θJA = 33.0°C/W vs. 26.6°C/W is offset by superior DAP grounding), while LMH0384SQ/NOPB introduces architectural upgrades for next-gen video but abandons backward compatibility with DVB-ASI and legacy SDI timing modes.
Availability
LMH0346SQ/NOPB is available at Aetrix Electronics and suitable for broadcast infrastructure, professional video editing systems, and DVB-ASI transmission equipment requiring stable component supply across extended product lifecycles.
Supply support for LMH0346SQ/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and communications markets.
The LMH0346SQ/NOPB belongs to TI's high-speed video interface product line, designed specifically for SMPTE-compliant serial digital video signal conditioning in broadcast, post-production, and professional AV equipment.
FAQ
What video standards does the LMH0346SQ/NOPB support?
The LMH0346SQ/NOPB supports SMPTE 259M(C) for SD-SDI (270 Mbps), SMPTE 292M for HD-SDI (1.483/1.485 Gbps), and SMPTE 424M for 3G-SDI (2.967/2.97 Gbps). It also reclocks DVB-ASI data at 270 Mbps. All modes are implemented in the same LMH0346SQ/NOPB silicon - no variant selection is needed.
How does the LMH0346SQ/NOPB handle data-rate detection and switching?
The LMH0346SQ/NOPB performs automatic rate detection upon power-up or signal acquisition, locking to any supported rate (270/1485/2970 Mbps) without external configuration. RATE0/RATE1 pins allow manual override to fixed-rate mode or test states. Rate changes trigger ≤15 ms acquisition time (TACQ) and update the SD/HD output within one 27 MHz clock cycle.
Can the second output (SCO/SDO2) of the LMH0346SQ/NOPB be used as a clock source for an FPGA?
Yes - when SCO_EN is high, the SCO/SDO2 differential pair outputs a low-jitter serial clock synchronized to the incoming data rate (270 MHz to 2970 MHz). Its ≤3 psRMS jitter and ≤60% alignment tolerance relative to data interval center make it suitable for driving FPGA transceiver reference clocks or sampling logic in video capture subsystems using LMH0346SQ/NOPB.
What is the role of the exposed DAP on the LMH0346SQ/NOPB WQFN package?
The exposed die attach pad (DAP) on the LMH0346SQ/NOPB is electrically connected to VEE (ground) and serves as the primary thermal and electrical return path. TI mandates soldering the DAP to a solid ground plane - it is not optional. This ensures stable operation at +85°C ambient and minimizes ground bounce in high-speed differential signaling paths.
Does the LMH0346SQ/NOPB require external loop filter components?
Yes - the LMH0346SQ/NOPB requires a single 56 nF capacitor connected between LF1 and LF2 pins. TI specifies this exact value for stable PLL operation across all supported data rates; deviation invalidates jitter performance and lock reliability. No resistors or additional capacitors are needed - the loop filter is intentionally simplified to reduce layout sensitivity.
LMH0346SQ/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Reclocker
- Applications:
- Professional Video
- Standards:
- DVB-ASI, SMPTE
- Control Interface:
- Serial
- Voltage - Supply:
- 3.135V ~ 3.465V
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-WQFN (4x5)
LMH0346SQ/NOPB FAQ
1.How can I place an order for LMH0346SQ/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LMH0346SQ/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMH0346SQ/NOPB reliable?
The price and inventory of LMH0346SQ/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMH0346SQ/NOPB is usually 5 days.
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LMH0346SQ/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMH0346SQ/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMH0346SQ/NOPB?
For technical support, including LMH0346SQ/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMH0346SQ/NOPB requirements.
6.How does Aetrix verify that LMH0346SQ/NOPB is sourced from the original manufacturer or authorized distributors?
All LMH0346SQ/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMH0346SQ/NOPB meets industry standards.
7.What is the process for return or replacement of LMH0346SQ/NOPB?
All LMH0346SQ/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LMH0346SQ/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMH0346SQ/NOPB part is unused and in its original packaging.
Return procedure for LMH0346SQ/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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