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Home > Products > Integrated Circuits (ICs) > Linear > Video Processing

Texas Instruments LMH0356SQ-40/NOPB

Name: LMH0356SQ-40/NOPB
Brand: Texas Instruments
SKU: LMH0356SQ-40/NOPB
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: LMH0356SQ-40/NOPB

Manufacturer:: Texas Instruments

Category:: Video Processing

Package:: 40-WFQFN Exposed Pad

Datasheet:: LMH0356SQ-40/NOPB.pdf

Description:: IC VIDEO RECLOCKER 40WQFN

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Product details

Overview

LMH0356SQ-40/NOPB from Texas Instruments is a 3-Gbps HD/SD SDI reclocker with integrated 4:1 input multiplexer, four FR4 equalizers (0–30 inch trace compensation), dual differential LVPECL/CML outputs, and automatic rate detection for SMPTE ST-259/ST-292/ST-424 and DVB-ASI standards. It operates at 270 Mbps, 1.483/1.485 Gbps, and 2.967/2.97 Gbps data rates on a single 3.3-V supply and is used in digital video routers, format converters, and broadcast infrastructure to suppress jitter and restore signal integrity.

For engineers reviewing the LMH0356SQ-40/NOPB datasheet, LMH0356SQ-40/NOPB pinout, LMH0356SQ-40/NOPB application, or LMH0356SQ-40/NOPB equivalent, key selection considerations include its 40-pin WQFN package, auto-bypass behavior on unsupported rates, SCO/SDO2 output mode select via SCO_EN, SD/HD rate indicator timing alignment, and 27-MHz crystal reference interface - all critical for serial digital video retiming system design.

Technical Context

The LMH0356SQ-40/NOPB implements a PLL-based reclocking architecture with VCO and dual loop filters (LF1/LF2) to recover and regenerate low-jitter serial data clocks. Its 4:1 input mux selects among SDI0–SDI3 using SEL0/SEL1, each equipped with an FR4 equalizer that adapts automatically to trace loss without configuration.

Control logic supports both auto-rate detection and manual rate selection (via RATE0/RATE1), while LOCK DETECT asserts high only when PLL lock is achieved on a supported standard. The SCO/SDO2 output toggles between second retimed data and recovered clock based on SCO_EN, with OUTPUT MUTE and BYPASS/AUTO BYPASS enabling fail-safe signal pass-through during loss-of-lock or invalid rates.

Key Specifications

Parameter	Value and Actual Design Meaning
Data Rates	270 Mbps, 1.483/1.485 Gbps, 2.967/2.97 Gbps - supports SMPTE ST-259 (SD), ST-292 (HD), ST-424 (3G), and DVB-ASI without harmonic locking.
Input Equalization	0–30 inches of FR4 trace per channel - compensates interconnect loss without external tuning or firmware.
Output Jitter	0.01–0.09 UI_P-P - meets SMPTE jitter compliance across all supported rates for broadcast-grade signal regeneration.
Supply & Power	Single 3.3-V supply; 130–150 mA typical ICC enabled, 3 mA in disabled state - enables low-power standby in multi-device video chains.
Interface Levels	Differential CML/LVPECL inputs and outputs (750 mV_P-P into 100-Ω); LVCMOS control I/O - ensures interoperability with TI's LMH0344 equalizer and LMH0302 driver families.
Reference Clock	27-MHz crystal or external LVCMOS clock (±50 ppm tolerance) - provides stable timing reference for PLL operation independent of data rate.
Operating Temp	–40°C to +85°C - qualified for industrial and broadcast equipment operating in uncontrolled thermal environments.

Pinout & Package

LMH0356SQ-40/NOPB uses a 40-pin WQFN package (5.00 mm × 5.00 mm) with exposed die attach pad connected to VEE (circuit ground). Pin count and layout differ from the 48-pin variant; NC pins are present at positions 21 and 22.

Pin/Terminal	Circuit Role	Design Meaning
SDI0–SDI3 (True/Complement)	Differential serial data inputs	Four independent CML/LVPECL-compatible inputs with internal 50-Ωtermination; each includes FR4 equalizer for up to 30-inch trace loss compensation.
SDO (True/Complement)	Primary retimed data output	Differential CML output (750 mV_P-P) driving 100-ΩAC/DC-coupled loads; muted when OUTPUT MUTE = low.
SCO/SDO2 (True/Complement)	Secondary output (data or clock)	Configurable via SCO_EN: outputs retimed data (SCO_EN = low) or recovered clock (SCO_EN = high); muted during bypass or OUTPUT MUTE assertion.
SEL0 / SEL1	Input channel select	2-bit binary code selecting one of four SDI inputs; internal pulldowns default to SDI0; no external bias required.
RATE0 / RATE1	Manual data rate select	Selects 270 Mbps, 1.48x/2.97 Gbps, or auto-detect mode; internal pulldowns enable auto-detect by default.
LOCK DETECT	PLL lock status indicator	Active-high open-drain LVCMOS output; remains low during auto-bypass or unsupported rates; used to drive OUTPUT MUTE for fail-safe muting.
OUTPUT MUTE	Output disable control	LVCMOS input (internal pullup); forces SDO and SCO/SDO2 into opposite differential states when low - prevents undefined output transitions.
ENABLE	Global power control	LVCMOS input (internal pullup); disables core circuitry and reduces ICC to 3 mA while preserving XTAL IN/OUT functionality for daisy-chained devices.
XTAL IN/EXT CLK	27-MHz reference input	Accepts parallel-resonant crystal or LVCMOS clock; enables PLL operation independent of incoming data stream.
XTAL OUT	Crystal oscillator output	Drives crystal network; not intended as general-purpose clock source - must be used with XTAL IN in crystal mode.
LF1 / LF2	PLL loop filter connections	External RC networks setting loop bandwidth (275 kHz @ 270 Mbps, 1.5 MHz @ 1485 Mbps, 2.75 MHz @ 2970 Mbps) for optimal jitter transfer.
SD/HD	Data rate range indicator	LVCMOS output (registered); high = SD (270 Mbps), low = HD/3G (≥1.483 Gbps); valid only when LOCK DETECT = high.
BYPASS/AUTO BYPASS	Reclocking enable/disable	LVCMOS input (internal pulldown); high = forced bypass (no reclock), low = auto-bypass on unlock or unsupported rate.

Key Features

Feature	Design Value
Integrated 4:1 input multiplexer	Reduces board space and interconnect complexity in multi-source video switchers without external logic or routing switches.
Per-input FR4 equalization (0–30 inch)	Compensates PCB trace loss across all supported data rates without calibration, eliminating need for rate-specific EQ settings.
Configurable second output (SCO/SDO2)	Enables flexible system architecture: use as second retimed data path or as low-jitter recovered clock for downstream devices like cable drivers.
Auto-bypass on unsupported rates	Prevents system failure by passing through invalid data (e.g., 360 Mbps) instead of generating corrupted output - critical for field-deployed broadcast gear.
Power saver mode (10 mW typical)	Allows dynamic power-down of unused reclockers in modular video processing chassis while maintaining reference clock distribution.

Applications

Digital Video Router Input Stage	HD/SD Format Converter
Use Scenario: Aggregating four independent SDI sources (e.g., camera feeds) into a single switching fabric with jitter-free signal distribution. IC Role / Device Role / Timing Role: Reclocker with 4:1 mux and per-channel FR4 EQ - restores timing integrity after long PCB traces and multiple connectors. Use Value: Enables reliable switching at 3G-SDI rates without manual EQ tuning or rate-specific firmware, reducing integration time by >40%.	Use Scenario: Converting between SD (270 Mbps) and HD (1.485 Gbps) signals in real-time broadcast production systems. IC Role / Device Role / Timing Role: Rate-adaptive reclocker with SD/HD output flag - synchronizes domain-crossing paths and triggers downstream driver configuration. Use Value: Eliminates external rate-detection logic; SD/HD pin directly controls LMH0302 driver pre-emphasis settings for optimal cable drive.
DVB-ASI Equipment Interface	Broadcast-Quality Signal Regenerator
Use Scenario: Retiming MPEG-2 transport streams over coaxial cable in satellite headend and contribution links. IC Role / Device Role / Timing Role: DVB-ASI compliant reclocker operating at 270 Mbps - suppresses accumulated jitter from long-haul ASI links. Use Value: Meets ETSI EN 300 421 BER requirements by reducing output jitter to <0.03 UI_P-P, preventing packet loss in demodulators.	Use Scenario: Restoring signal integrity in master control rooms where SDI signals traverse multiple processing stages and patch panels. IC Role / Device Role / Timing Role: Dual-output reclocker with LOCK DETECT feedback - provides clean data and clock for monitoring and recording subsystems. Use Value: Dual SDO + SCO outputs feed separate monitoring (data) and genlock (clock) paths, eliminating need for external fanout buffers.

Digital Video Router Input Stage

HD/SD Format Converter

Use Scenario: Aggregating four independent SDI sources (e.g., camera feeds) into a single switching fabric with jitter-free signal distribution.

IC Role / Device Role / Timing Role: Reclocker with 4:1 mux and per-channel FR4 EQ - restores timing integrity after long PCB traces and multiple connectors.

Use Value: Enables reliable switching at 3G-SDI rates without manual EQ tuning or rate-specific firmware, reducing integration time by >40%.

Use Scenario: Converting between SD (270 Mbps) and HD (1.485 Gbps) signals in real-time broadcast production systems.

IC Role / Device Role / Timing Role: Rate-adaptive reclocker with SD/HD output flag - synchronizes domain-crossing paths and triggers downstream driver configuration.

Use Value: Eliminates external rate-detection logic; SD/HD pin directly controls LMH0302 driver pre-emphasis settings for optimal cable drive.

DVB-ASI Equipment Interface

Broadcast-Quality Signal Regenerator

Use Scenario: Retiming MPEG-2 transport streams over coaxial cable in satellite headend and contribution links.

IC Role / Device Role / Timing Role: DVB-ASI compliant reclocker operating at 270 Mbps - suppresses accumulated jitter from long-haul ASI links.

Use Value: Meets ETSI EN 300 421 BER requirements by reducing output jitter to <0.03 UI_P-P, preventing packet loss in demodulators.

Use Scenario: Restoring signal integrity in master control rooms where SDI signals traverse multiple processing stages and patch panels.

IC Role / Device Role / Timing Role: Dual-output reclocker with LOCK DETECT feedback - provides clean data and clock for monitoring and recording subsystems.

Use Value: Dual SDO + SCO outputs feed separate monitoring (data) and genlock (clock) paths, eliminating need for external fanout buffers.

Equivalent & Alternatives

The following parts are listed as comparable options for similar SDI reclocking applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
LMH0384SQ/NOPB	Single-input, no mux, no equalizer; supports same data rates but requires external EQ; 48-pin WQFN only.	Suitable for point-to-point reclocking where input trace length is fixed and known; lacks 4:1 flexibility and FR4 compensation.	Select when board space allows external equalization and only one input channel is needed - reduces BOM cost by ~18%.
GS2971-IBE3	Supports ST-2081 (12G-SDI); includes built-in cable driver; requires 1.8-V + 3.3-V supplies; different pinout and control protocol.	Targeted at next-gen 4K/UHD infrastructure; not drop-in compatible due to voltage, interface, and feature set differences.	Choose for future-proof 12G-SDI designs requiring integrated driver; avoid for legacy HD/SD-only systems due to over-spec and cost premium.

Compared with LMH0356SQ-40/NOPB, LMH0384SQ/NOPB offers lower gate count and cost for single-channel use but removes mux and EQ - limiting adaptability in field-deployed gear. GS2971-IBE3 delivers higher bandwidth and integration but introduces supply complexity and non-interchangeable footprint, making it unsuitable for direct replacement in existing 3G-SDI layouts.

Availability

LMH0356SQ-40/NOPB is available at Aetrix Electronics and suitable for digital video routers, broadcast format converters, DVB-ASI equipment, and HD/SD signal regenerators requiring stable component supply across extended production lifecycles.

Supply support for LMH0356SQ-40/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and communications markets.

The LMH0356SQ-40/NOPB belongs to TI's high-speed serial interface product line, designed specifically for broadcast video infrastructure requiring SMPTE-compliant jitter suppression, multi-rate adaptability, and robust FR4 trace equalization in space-constrained WQFN packages.

FAQ

What video standards does the LMH0356SQ-40/NOPB support?

The LMH0356SQ-40/NOPB supports SMPTE ST-259 (270 Mbps SD-SDI), ST-292 (1.483/1.485 Gbps HD-SDI), ST-424 (2.967/2.97 Gbps 3G-SDI), and DVB-ASI at 270 Mbps. It does not lock to harmonics (e.g., 360 Mbps) and enters bypass mode for unsupported rates. All supported standards are explicitly verified in TI's SNLS270L datasheet revision L.

How does the LMH0356SQ-40/NOPB handle unsupported data rates?

When the LMH0356SQ-40/NOPB detects an unsupported data rate (e.g., 360 Mbps or 540 Mbps), it automatically enters bypass mode if BYPASS/AUTO BYPASS is low. In this state, the device passes input data through without reclocking, and LOCK DETECT remains low. This behavior is guaranteed per Section 8.3.1.2 and Table 3 of the LMH0356SQ-40/NOPB datasheet.

What is the function of the SCO_EN pin on the LMH0356SQ-40/NOPB?

The SCO_EN pin on the LMH0356SQ-40/NOPB selects the function of the SCO/SDO2 differential output: when high, it outputs the recovered serial clock; when low (default, due to internal pulldown), it outputs the second retimed serial data stream. This pin is LVCMOS-compatible and directly controls output mode without requiring register writes or external logic.

Does the LMH0356SQ-40/NOPB require external loop filter components?

Yes, the LMH0356SQ-40/NOPB requires external RC networks on LF1 and LF2 pins to set PLL loop bandwidth - 275 kHz for 270 Mbps, 1.5 MHz for 1485 Mbps, and 2.75 MHz for 2970 Mbps. These values are specified in Section 7.6 of the datasheet and must be implemented per Figure 4 in the "Detailed Description" section.

Can the LMH0356SQ-40/NOPB operate with only a 27-MHz crystal, or is an external clock also acceptable?

The LMH0356SQ-40/NOPB accepts either a 27-MHz parallel-resonant crystal connected between XTAL IN/EXT CLK and XTAL OUT, or a 27-MHz LVCMOS-compatible external clock applied to XTAL IN/EXT CLK (with XTAL OUT left unconnected). Both configurations are validated in Section 8.3.2.9 and Figure 4 of the LMH0356SQ-40/NOPB datasheet.

LMH0356SQ-40/NOPB Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: 40-WFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Function:: Reclocker

Applications:: Professional Video

Standards:: DVB-ASI, SMPTE

Control Interface:: Serial

Voltage - Supply:: 3.135V ~ 3.465V

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 40-WQFN (5x5)

LMH0356SQ-40/NOPB FAQ

1.How can I place an order for LMH0356SQ-40/NOPB through Aetrix?

Please submit a Request for Quotation (RFQ) for LMH0356SQ-40/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LMH0356SQ-40/NOPB reliable?

The price and inventory of LMH0356SQ-40/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMH0356SQ-40/NOPB is usually 5 days.

3.What payment methods are accepted for LMH0356SQ-40/NOPB?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMH0356SQ-40/NOPB transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LMH0356SQ-40/NOPB?

LMH0356SQ-40/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LMH0356SQ-40/NOPB order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LMH0356SQ-40/NOPB?

For technical support, including LMH0356SQ-40/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMH0356SQ-40/NOPB requirements.

6.How does Aetrix verify that LMH0356SQ-40/NOPB is sourced from the original manufacturer or authorized distributors?

All LMH0356SQ-40/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMH0356SQ-40/NOPB meets industry standards.

7.What is the process for return or replacement of LMH0356SQ-40/NOPB?

All LMH0356SQ-40/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LMH0356SQ-40/NOPB, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LMH0356SQ-40/NOPB part is unused and in its original packaging.

Return procedure for LMH0356SQ-40/NOPB:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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