Texas Instruments LMH0395SQ/NOPB
- Part No.:
- LMH0395SQ/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Specialized
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LMH0395SQ/NOPB.pdf
- Description:
- IC INTERFACE SPECIALIZED 24WQFN
- Quantity:
- Payment:

- Shipping:

Inventory:980
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LMH0395SQ/NOPB from Texas Instruments is a 3G HD/SD SDI dual-output adaptive cable equalizer IC designed for serial digital video signal restoration over coaxial cable. It supports ST 424 (2.97 Gbps), ST 292 (1.485 Gbps), and ST 259 (270 Mbps) standards, delivers 200 m reach on Belden 1694A at 2.97 Gbps, consumes only 140 mW in dual-output mode, and features programmable LVDS outputs with 700 mVP–P default swing and 1.2 V common-mode voltage - deployed in broadcast video routers and distribution amplifiers.
For engineers reviewing the LMH0395SQ/NOPB datasheet, LMH0395SQ/NOPB pinout, LMH0395SQ/NOPB application, or LMH0395SQ/NOPB equivalent, key selection considerations include adaptive equalization range, dual LVDS output independence, SPI vs. pin-mode configuration, ultra-low power-save mode (17 mW), and MUTEREF-adjustable carrier detect threshold for dynamic cable-length-aware muting.
Technical Context
The LMH0395SQ/NOPB implements a multi-stage adaptive equalizer filter with active sensing circuitry that dynamically adjusts gain and bandwidth based on input signal energy and spectral content. Its DC restoration block fully restores baseline for pathological SD/HD video patterns per SMPTE RP-178 and RP-198, while the AEC+ and AEC− terminals support external loop filter tuning for stability optimization.
It operates in two mutually exclusive modes: pin mode (SPI_EN = GND) using discrete control inputs (BYPASS, AUTO SLEEP, SDO1_DISABLE), or SPI mode (SPI_EN = VCC) enabling daisy-chained register access for output swing (400–800 mVP–P), common-mode voltage (0.8–1.2 V), de-emphasis level, and launch amplitude calibration - all without requiring PCB layout changes between modes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rate Range | 125 Mbps to 2.97 Gbps - supports full SD, HD, 3G-SDI, and DVB-ASI standards in a single device. |
| Equalized Reach | 200 m on Belden 1694A at 2.97 Gbps - enables long-haul routing in broadcast infrastructure without repeaters. |
| Power Consumption | 140 mW (dual output), 115 mW (single output), 17 mW (power-save) - reduces thermal load and system-level power budget. |
| Output Interface | Dual internally terminated 100-Ω LVDS outputs - eliminates need for external termination resistors and simplifies board layout. |
| Supply Voltage | 2.5 V ±62.5 mV - compatible with standard low-voltage logic rails and minimizes noise coupling. |
| Operating Temperature | −40°C to +85°C - qualified for industrial and broadcast equipment operating in uncontrolled environments. |
| Jitter Performance | ≤0.55 UI at 2.97 Gbps over 200 m Belden 1694A - meets SMPTE ST 424 eye mask compliance for 3G-SDI systems. |
Pinout & Package
LMH0395SQ/NOPB is housed in a 24-pin WQFN package (4.00 mm × 4.00 mm) with exposed die attach pad (DAP) connected to VEE. The package supports fine-pitch routing and efficient thermal dissipation via bottom-side thermal pad soldering.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SDI / SDI | Analog differential input | Accepts AC-coupled SDI signal pair; internally biased for 75-Ω single-ended input interface. |
| SDO0 / SDO0, SDO1 / SDO1 | Differential LVDS outputs | Two independent 100-Ω internally terminated outputs; SDO1 can be disabled via SDO1_DISABLE pin. |
| SPI_EN | Mode select control | Drives high for SPI register access; low for pin-mode operation - determines functional interface architecture. |
| MUTEREF | Analog reference input | Sets carrier detect threshold; voltage inversely proportional to max equalizable cable length (e.g., 1.3 V ≈ 200 m). |
| AUTO SLEEP | Power management control | Enables automatic power-down when CD indicates no input signal - reduces idle power to 17 mW typical. |
| CD | Carrier detect output | LVCMOS open-drain output asserting high when no valid SDI signal is present - used for system-level fault detection. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent LVDS outputs | Eliminates need for external fanout buffers; second output can be powered down to save 25 mW. |
| Programmable de-emphasis | Compensates up to 40 inches of FR4 trace loss - maintains signal integrity from equalizer to downstream receiver. |
| Adaptive AEC loop with external filter | External AEC+/AEC− capacitor (1 µF) enables tuning of convergence speed and stability for varying cable types. |
| Digital and analog MUTEREF control | Threshold set either by analog voltage or SPI register 03h - allows flexible integration into both analog and digital control systems. |
| DC restoration for pathological data | Fully restores baseline for SMPTE RP-178 (SD) and RP-198 (HD) worst-case video patterns - prevents clipping and timing errors. |
Applications
| Broadcast Video Router | Distribution Amplifier |
|---|---|
Use Scenario: Central routing of 3G-SDI signals across multiple studios and control rooms with cable runs exceeding 150 m. IC Role / Device Role / Timing Role: Adaptive equalizer restoring signal integrity after long coaxial transmission; provides dual outputs for redundant signal paths. Use Value: Enables error-free switching without manual gain adjustment or repeater insertion - reduces maintenance and improves uptime. |
Use Scenario: Fan-out of a single 2.97-Gbps SDI source to 8+ monitoring displays in OB vans or production trucks. IC Role / Device Role / Timing Role: Dual-output equalizer driving parallel LVDS receivers; one output feeds primary chain, second feeds backup or monitoring path. Use Value: Eliminates need for discrete fanout buffer ICs - saves board space, BOM cost, and power while maintaining SMPTE-compliant jitter. |
| HD/SDI Reclocker Interface | Multi-standard SDI Infrastructure |
Use Scenario: Interfacing LMH0395SQ/NOPB output to LMH0346 reclocker input over 6-inch FR4 traces on broadcast PCBs. IC Role / Device Role / Timing Role: Equalizer with programmable de-emphasis compensating for board trace loss before clock recovery stage. Use Value: Preserves eye opening and reduces jitter accumulation - ensures robust lock and low BER at reclocker input. |
Use Scenario: Unified hardware platform supporting SD (270 Mbps), HD (1.485 Gbps), and 3G (2.97 Gbps) SDI signals in field-deployable gear. IC Role / Device Role / Timing Role: Single adaptive equalizer auto-configuring to input data rate - no firmware or hardware changes required per standard. Use Value: Reduces SKU count and design complexity while guaranteeing compliance across SMPTE ST 259/292/424 and DVB-ASI. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SDI equalizer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMH0384SQ/NOPB | Single-output SDI equalizer; same 2.97-Gbps capability but no SDO1 or SDO1_DISABLE control. | Lacks dual-output flexibility; suitable only where fanout is handled externally or not required. | Select when system requires only one output path and lower power (115 mW single-output) is prioritized over redundancy. |
| MAX9516ETE+ | 3G-SDI equalizer with integrated 75-Ω input termination and fixed 1.2-V CM voltage; no SPI interface or programmable de-emphasis. | Designed for simpler point-to-point links; lacks adaptive AEC tuning and cable-length indicator functionality. | Choose for cost-sensitive, non-reconfigurable designs where fixed performance and minimal external components are critical. |
Compared with LMH0384SQ/NOPB and MAX9516ETE+, the LMH0395SQ/NOPB uniquely combines dual LVDS outputs, SPI-configurable parameters, and analog MUTEREF-based cable-length adaptation - making it optimal for scalable, field-upgradable broadcast infrastructure where flexibility and signal fidelity are paramount.
Availability
LMH0395SQ/NOPB is available at Aetrix Electronics and suitable for broadcast video routers, distribution amplifiers, and SDI reclocker interfaces requiring stable component supply, long-term lifecycle assurance, and SMPTE-compliant signal integrity.
Supply support for LMH0395SQ/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and communications markets.
The LMH0395SQ/NOPB belongs to TI's high-speed interface product line, engineered specifically for SMPTE-compliant serial digital video transport - emphasizing adaptive equalization, ultra-low power, and robust crosstalk immunity in broadcast-grade equipment.
FAQ
What standards does the LMH0395SQ/NOPB support?
The LMH0395SQ/NOPB supports SMPTE ST 424 (3G-SDI, 2.97 Gbps), ST 292 (HD-SDI, 1.485 Gbps), ST 344 (dual-link HD-SDI), ST 259 (SD-SDI, 270 Mbps), and DVB-ASI standards. It automatically adapts to input data rates from 125 Mbps to 2.97 Gbps without mode configuration, ensuring interoperability across legacy and next-generation broadcast video systems. All compliance is verified per applicable SMPTE engineering documents.
How does the LMH0395SQ/NOPB handle pathological video patterns?
The LMH0395SQ/NOPB incorporates a dedicated DC restoration block that fully restores baseline for SMPTE RP-178 (SD) and RP-198 (HD) pathological patterns - including long strings of zeros or ones - preventing signal clipping and timing drift. This ensures consistent eye opening and jitter performance even under worst-case video content, which is essential for reliable broadcast signal distribution.
Can the LMH0395SQ/NOPB operate in both pin mode and SPI mode simultaneously?
No, the LMH0395SQ/NOPB operates exclusively in either pin mode or SPI mode, selected by the logic level on the SPI_EN pin. When SPI_EN is driven low (GND), the device uses discrete control pins (BYPASS, AUTO SLEEP, SDO1_DISABLE); when driven high (VCC), it enables SPI register access via MOSI/MISO/SCK/SS. These modes are mutually exclusive and cannot be mixed on the same device instance.
What is the function of the MUTEREF pin on the LMH0395SQ/NOPB?
The MUTEREF pin on the LMH0395SQ/NOPB sets the carrier detect (CD) threshold voltage, which determines the maximum cable length that can be equalized before the outputs are muted. Applying a higher analog voltage (e.g., 1.8 V) lowers the effective cable-length limit, while leaving MUTEREF unconnected or grounded enables full-range operation (up to 200 m at 2.97 Gbps). It may also be configured digitally via SPI register 03h.
Does the LMH0395SQ/NOPB require external termination resistors on its LVDS outputs?
No, the LMH0395SQ/NOPB features internally terminated 100-Ω LVDS outputs (SDO0/SDO0 and SDO1/SDO1), eliminating the need for external termination resistors. This simplifies PCB layout, reduces component count, and ensures consistent impedance matching. Outputs are DC-coupled and designed to drive standard 100-Ω differential receivers directly - though AC coupling is recommended when interfacing with CML inputs having strong pull-ups.
LMH0395SQ/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Amplifier
- Interface:
- SPI Serial
- Voltage - Supply:
- 2.375V ~ 2.625V
- Supplier Device Package:
- 24-WQFN (4x4)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
LMH0395SQ/NOPB FAQ
1.How can I place an order for LMH0395SQ/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LMH0395SQ/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMH0395SQ/NOPB reliable?
The price and inventory of LMH0395SQ/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMH0395SQ/NOPB is usually 5 days.
3.What payment methods are accepted for LMH0395SQ/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMH0395SQ/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LMH0395SQ/NOPB?
LMH0395SQ/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMH0395SQ/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMH0395SQ/NOPB?
For technical support, including LMH0395SQ/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMH0395SQ/NOPB requirements.
6.How does Aetrix verify that LMH0395SQ/NOPB is sourced from the original manufacturer or authorized distributors?
All LMH0395SQ/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMH0395SQ/NOPB meets industry standards.
7.What is the process for return or replacement of LMH0395SQ/NOPB?
All LMH0395SQ/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LMH0395SQ/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMH0395SQ/NOPB part is unused and in its original packaging.
Return procedure for LMH0395SQ/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LMH0395SQ/NOPB Tags

-
NVT4857UKAZ
NXP Semiconductors
-
TCA8418RTWR
Texas Instruments
-
PCA9546APWR
Texas Instruments

-
MD0100N8-G
Microchip Technology

-
PCA9548APW,118
NXP Semiconductors

-
PCA9540BDP,118
NXP Semiconductors

-
PCA9548APWR
Texas Instruments

-
PCA9546APW,118
NXP Semiconductors

-
PTN3360DBS,518
NXP Semiconductors

-
PCA9546ABS,118
NXP Semiconductors

-
PCA9518PWR
Texas Instruments

-
PCA9545APW,118
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
