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Texas Instruments LMH1982SQ/NOPB

Part No.:
LMH1982SQ/NOPB
Manufacturer:
Texas Instruments
Category:
Video Processing
Package:
32-WFQFN Exposed Pad
Datasheet:
AetrixLMH1982SQ/NOPB.pdf
Description:
IC VIDEO CLOCK GENERATOR 32WQFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,595

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Product details

Overview

LMH1982SQ/NOPB from Texas Instruments is a multi-rate video clock generator IC designed for genlock synchronization in broadcast video systems. It delivers two simultaneous LVDS output clocks (SD_CLK at 27/67.5 MHz and HD_CLK at 74.25/74.176/148.5/148.35 MHz), a programmable Top of Frame (TOF) pulse, and dual reference inputs (REF_A/REF_B) with H/V sync support - enabling precise frame-aligned timing in 3G-SDI SerDes, FPGA-based video capture, and triple-rate SDI equipment.

For engineers reviewing the LMH1982SQ/NOPB datasheet, LMH1982SQ/NOPB pinout, LMH1982SQ/NOPB application, or LMH1982SQ/NOPB equivalent, key selection considerations include its dual PLL architecture (VCXO-based PLL1 + integrated-VCO PLL2–4), sub-50 ps peak-to-peak jitter on HD_CLK outputs, I²C programmability, free-run/holdover behavior on reference loss, and WQFN-32 package compatibility with high-density video PCB layouts.

Technical Context

The LMH1982SQ/NOPB implements a two-stage analog PLL architecture: PLL1 uses an external 27 MHz VCXO and loop filter to achieve low-jitter genlock to H/V sync references, while PLL2–4 use integrated VCOs to generate SD/HD clocks with fixed multiplication ratios (e.g., ×2.75, ×5.5, ×2.5). Its reference decoder supports NTSC, PAL, 720p, 1080i/p, and AES47 sample clock formats via programmable dividers and line/frame counters.

Genlock operation enables cross-locking between input references and output clocks, with configurable lock detection, NO_REF/NO_LOCK status flags, and programmable TOF timing offset (e.g., TOF_OFFSET = 262 for NTSC). Free-run mode relies on the VC_FREERUN analog control voltage to set VCXO frequency accuracy when reference is lost, while holdover maintains short-term phase stability via loop filter charge retention.

Key Specifications

Parameter Value and Actual Design Meaning
Output Clocks Two independent LVDS outputs: SD_CLK (27 MHz or 67.5 MHz) and HD_CLK (74.25 / 74.176 / 148.5 / 148.35 MHz)
TOF Pulse Jitter Programmable timing with ≤2 ns delay variation; supports format-specific offsets (e.g., 262 for NTSC, 312 for PAL)
Peak-to-Peak Jitter As low as 40 ps (TIE) on HD_CLK at 74.25 MHz; 50 ps at 74.176 MHz; 55 ps at 148.5 MHz - meets SMPTE SDI transmitter specs
Reference Inputs Dual LVCMOS ports (REF_A and REF_B) accepting H/V sync signals compliant with SD/HD standards (NTSC, PAL, 1080p, etc.)
Supply Voltages 3.3 V (VDD) and 2.5 V (DVDD); total typical power consumption ≈250 mW
Control Interface I²C (SDA/SCL) with register-mapped configuration; GENLOCK/REF_SEL pins support hardware-mode override
Package 32-pin WQFN (5.0 mm × 5.0 mm); thermal resistance RθJA = 33 °C/W

Pinout & Package

The LMH1982SQ/NOPB is housed in a 5.0 mm × 5.0 mm, 32-pin WQFN package with exposed die attach pad (DAP) connected to GND for thermal and electrical integrity. Pin functions are validated per TI SNLS289D Rev D datasheet.

Pin/Terminal Circuit Role Design Meaning
VC_FREERUN (Pin 1) Analog control input Sets free-run VCXO frequency during reference loss; requires clean bias voltage within VCXO control range
HREF_A / VREF_A (Pins 4–5) Digital reference inputs Accept H/V sync timing from LMH1981 or SDI deserializer; define frame structure for genlock alignment
REF_SEL (Pin 6) Reference selection control Selects REF_A or REF_B via pin logic or I²C; enables failover switching without firmware intervention
GENLOCK (Pin 14) Mode select input Configures genlock vs. free-run operation; can be overridden by I²C register I2C_GNLK = 0
SD_CLK / HD_CLK (Pins 23–24 / 19–20) Differential LVDS outputs Hi-Z capable; drive FPGA SerDes directly; meet SMPTE jitter requirements with <50 ps TIE
TOF (Pin 25) Frame timing pulse LVCMOS output synchronized to top-of-frame; programmable offset and initialization sequence
LPF (Pin 31) Analog loop filter output Drives external RC network for PLL1 bandwidth tuning; determines jitter transfer and lock time
VCXO (Pin 29) VCXO clock input 27 MHz fundamental input; serves as clean reference for all internal PLLs and output generation

Key Features

Feature Design Value
Dual-reference genlock Switches between REF_A and REF_B using hardware pin or I²C; enables seamless reference failover in broadcast infrastructure
Programmable TOF timing Configurable TOF_OFFSET register (e.g., 262 for NTSC, 1124 for 1080p/24) ensures frame-accurate alignment across SD/HD formats
External loop filter control LPF pin drives user-defined RC network to set PLL1 bandwidth (e.g., narrow BW for jitter attenuation, wide BW for fast lock)
Free-run/holdover modes VC_FREERUN pin sets frequency accuracy during reference loss; holdover preserves phase continuity for brief outages
LVDS Hi-Z capability SD_CLK and HD_CLK outputs can be disabled to reduce power and minimize crosstalk in multi-clock systems

Applications

Video Genlock System FPGA-Based SDI SerDes

Use Scenario: Broadcast camera chain requiring frame-synchronous switching between multiple SDI sources.

IC Role / Device Role / Timing Role: Generates genlocked SD_CLK and HD_CLK from analog H/V sync references, aligning TOF pulses across sources for glitch-free transitions.

Use Value: Eliminates frame misalignment artifacts by maintaining sub-microsecond timing coherence across distributed video paths.

Use Scenario: High-speed video processing board using Xilinx Kintex Ultrascale FPGA with integrated SDI transceivers.

IC Role / Device Role / Timing Role: Provides low-jitter 148.5 MHz HD_CLK and 27 MHz TOF signal directly to FPGA SerDes clock inputs and frame sync logic.

Use Value: Enables compliance with SMPTE ST 425-1 jitter limits (<1.5 UI pk-pk) without external jitter cleaners or additional PLL stages.

Triple-Rate SDI Equipment Professional Video Converter

Use Scenario: 3G-SDI distribution amplifier supporting SD/HD/3G rates with automatic format detection.

IC Role / Device Role / Timing Role: Generates rate-specific clocks (27 MHz for SD, 74.25 MHz for HD, 148.5 MHz for 3G) and TOF pulses synchronized to incoming reference.

Use Value: Reduces BOM count by replacing discrete PLLs and crystal oscillators with single-chip solution supporting all major broadcast standards.

Use Scenario: HDMI-to-SDI converter requiring precise frame timing for real-time up/down/cross-conversion.

IC Role / Device Role / Timing Role: Accepts HDMI pixel clock or embedded audio sync as reference, generates SDI-compliant HD_CLK and TOF aligned to source frame boundaries.

Use Value: Ensures zero-frame-delay conversion by locking output TOF to input vertical blanking interval with <2 ns delay uncertainty.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-rate video clock generation applications.

Alternative Part Technical Difference Application Difference Selection Advice
LMH1981 Video sync separator (not clock generator); outputs H/V sync only - no SD/HD clocks or TOF pulse. Used upstream to extract timing from analog video; cannot replace LMH1982SQ/NOPB's clock synthesis function. Select LMH1981 only when needing reference extraction prior to LMH1982SQ/NOPB genlock input.
Si5338A-D-GM Programmable clock generator with four outputs; supports video rates but lacks dedicated H/V sync interface and TOF generation logic. Requires external timing processor for frame alignment; not optimized for broadcast genlock latency or SMPTE jitter compliance. Choose Si5338A-D-GM for general-purpose multi-output clocking where video-specific features are secondary.

Compared with LMH1982SQ/NOPB, LMH1981 provides only reference separation-not clock synthesis-while Si5338A-D-GM offers broader frequency flexibility but no native H/V sync decoding or TOF pulse logic, making LMH1982SQ/NOPB uniquely suited for SMPTE-compliant genlock in broadcast hardware.

Availability

LMH1982SQ/NOPB is available at Aetrix Electronics and suitable for broadcast infrastructure, FPGA-based video SerDes, and triple-rate SDI equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing for production programs.

Supply support for LMH1982SQ/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and communications markets.

The LMH1982SQ/NOPB belongs to TI's broadcast video timing product line, engineered specifically for SMPTE-compliant genlock, frame-accurate TOF generation, and multi-standard SDI clock synthesis in professional video equipment.

FAQ

What video standards does the LMH1982SQ/NOPB support for genlock operation?

The LMH1982SQ/NOPB supports NTSC (525i), PAL (625i), 720p (24–60 Hz), 1080i/p (23.98–60 Hz), and AES47 48 kHz sample clock formats. It decodes H/V sync timing from analog or digital references and configures internal PLL dividers (e.g., REF_DIV_SEL, TOF_LPFM) to match frame/line structures - enabling precise genlock across SD, HD, and 3G-SDI systems without external timing processors.

How does the LMH1982SQ/NOPB handle loss of reference input?

Upon loss of reference, the LMH1982SQ/NOPB enters either Free Run or Holdover mode based on configuration. In Free Run mode, the VC_FREERUN pin voltage sets VCXO frequency accuracy; in Holdover mode, the LPF pin retains charge to maintain short-term phase stability. Both modes preserve output clock continuity while allowing system-level failover to REF_B or backup timing sources - critical for broadcast uptime.

Can the LMH1982SQ/NOPB generate TOF pulses for both SD and HD formats simultaneously?

Yes - the LMH1982SQ/NOPB generates a single TOF pulse synchronized to the selected output format (e.g., NTSC, 1080p/24), but its programmable TOF_CLK, TOF_PPL, and TOF_OFFSET registers allow TOF timing to be derived from either the 27 MHz SD_CLK or native HD_CLK frequencies. This enables frame-accurate TOF alignment across all supported SD/HD formats without hardware changes.

What is the role of the external loop filter connected to the LPF pin on the LMH1982SQ/NOPB?

The LPF pin drives an external RC loop filter that controls PLL1's bandwidth, lock time, and jitter transfer characteristics. A narrow filter bandwidth (e.g., ~10 Hz) attenuates input reference jitter but increases lock time; a wider bandwidth (e.g., ~100 Hz) improves lock speed at the cost of higher jitter transfer. This user-adjustable design allows optimization for specific broadcast system requirements.

Does the LMH1982SQ/NOPB require an external VCXO, and what specifications must it meet?

Yes - the LMH1982SQ/NOPB requires an external 27.0000 MHz VCXO connected to the VCXO pin (Pin 29). The VCXO must support ±100 ppm tuning range and exhibit low phase noise (≤−140 dBc/Hz at 10 kHz offset) to ensure HD_CLK jitter remains below 50 ps peak-to-peak. TI recommends using a 27 MHz VCXO with compatible control voltage range matching the VC_FREERUN input specification.

LMH1982SQ/NOPB Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
32-WFQFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Active
Function:
Generator
Applications:
Professional Video
Standards:
NTSC, PAL, SMPTE
Control Interface:
I2C
Voltage - Supply:
3.135V ~ 3.465V
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-
Supplier Device Package:
32-WQFN (5x5)

LMH1982SQ/NOPB FAQ

1.How can I place an order for LMH1982SQ/NOPB through Aetrix?

Please submit a Request for Quotation (RFQ) for LMH1982SQ/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LMH1982SQ/NOPB reliable?

The price and inventory of LMH1982SQ/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMH1982SQ/NOPB is usually 5 days.

3.What payment methods are accepted for LMH1982SQ/NOPB?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMH1982SQ/NOPB transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LMH1982SQ/NOPB?

LMH1982SQ/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LMH1982SQ/NOPB order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LMH1982SQ/NOPB?

For technical support, including LMH1982SQ/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMH1982SQ/NOPB requirements.

6.How does Aetrix verify that LMH1982SQ/NOPB is sourced from the original manufacturer or authorized distributors?

All LMH1982SQ/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMH1982SQ/NOPB meets industry standards.

7.What is the process for return or replacement of LMH1982SQ/NOPB?

All LMH1982SQ/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LMH1982SQ/NOPB, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LMH1982SQ/NOPB part is unused and in its original packaging.

Return procedure for LMH1982SQ/NOPB:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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