Texas Instruments LMH1983SQX/NOPB

Overview

LMH1983SQX/NOPB from Texas Instruments is a programmable 3G/HD/SD video clock generator IC with four integrated PLLs, generating synchronized 27 MHz, 148.5 MHz, 148.35 MHz, and 24.576 MHz clocks for SDI SerDes, FPGA reference, and audio embed/de-embed applications. It supports genlock to HVF sync inputs and delivers sub-4 ps deterministic jitter on HD video outputs.

For engineers reviewing the LMH1983SQX/NOPB datasheet, LMH1983SQX/NOPB pinout, LMH1983SQX/NOPB application, or LMH1983SQX/NOPB equivalent, key selection criteria include dual-stage PLL architecture (VCXO-based PLL1 + VCO-based PLL2–PLL4), 40-pin WQFN package with exposed thermal pad, LVDS clock outputs, I²C programmability, and digital holdover capability during loss of reference.

Technical Context

The LMH1983SQX/NOPB implements a two-stage analog PLL architecture: PLL1 uses an external 27 MHz VCXO and loop filter (via VC_LPF) for ultra-low-jitter reference generation, while PLL2–PLL4 are on-chip VCO-based PLLs deriving from PLL1's clean output. PLL2 and PLL3 provide fixed-ratio multiplication to 148.5 MHz and 148.35 MHz for SMPTE-compliant HD-SDI; PLL4 generates 24.576 MHz (or 98.304 MHz / 2X) for AES3 audio timing.

It features three independent 2×2 video clock crosspoints, four programmable frame timing outputs (Fout1–Fout4), automatic input format detection (525i/1080p/29.97/59.94 Hz), and real-time status flags (NO_REF, NO_LOCK, NO_ALIGN). All four clock outputs support LVDS differential signaling with <4 ps deterministic jitter at 148.35 MHz and <15 ps at 24.576 MHz.

Key Specifications

Pinout & Package

LMH1983SQX/NOPB is housed in a 40-pin WQFN package (6.0 mm × 6.0 mm, 0.5 mm pitch) with exposed die attach pad (DAP) requiring PCB grounding for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar video clock generation applications.

Compared with LMH1983SQX/NOPB, LMH1982SQX/NOPB reduces system complexity where audio clocking is handled externally, while Si5338A-D-GM offers broader protocol coverage but requires firmware-based sync interpretation - making LMH1983SQX/NOPB uniquely optimized for SMPTE-compliant, hardware-genlocked video infrastructure.

Availability

LMH1983SQX/NOPB is available at Aetrix Electronics and suitable for triple-rate SDI transmitter design, FPGA reference clock cleaning, and broadcast-grade audio embed/de-embed systems requiring stable component supply across long production lifecycles.

Supply support for LMH1983SQX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-reliability signal chain solutions for industrial, automotive, and communications markets.

The LMH1983SQX/NOPB belongs to TI's broadcast video timing product line, engineered specifically for SMPTE-compliant genlock, frame synchronization, and multi-standard A/V clock generation in professional video equipment.

FAQ

What is the primary function of the LMH1983SQX/NOPB in broadcast video systems?

The LMH1983SQX/NOPB serves as a fully integrated video clock generator that produces genlocked 27 MHz, 148.5 MHz, 148.35 MHz, and 24.576 MHz clocks for SDI SerDes, FPGA reference, and AES3 audio timing. Its four PLLs, automatic HVF format detection, and TOF pulse generation make LMH1983SQX/NOPB essential for maintaining frame-accurate synchronization across professional broadcast infrastructure without external jitter cleaners.

How does the LMH1983SQX/NOPB achieve low jitter performance on its HD-SDI outputs?

The LMH1983SQX/NOPB achieves sub-4 ps deterministic jitter on CLKout3 (148.35 MHz) by using a dual-stage PLL architecture: PLL1 locks an external low-noise 27 MHz VCXO to the video reference, providing an ultra-clean base clock; PLL2 and PLL3 then multiply this stable reference with high-bandwidth VCOs. This architecture isolates input jitter and minimizes transfer, ensuring LMH1983SQX/NOPB meets SMPTE ST 424 jitter requirements without additional circuitry.

Can the LMH1983SQX/NOPB operate without an external VCXO?

No - the LMH1983SQX/NOPB requires an external 27 MHz VCXO connected to XOin+ and XOin− (Pins 33–34) for PLL1 operation. However, it supports an alternative "OSCin" mode on Pin 17 (Fout4) where a 27 MHz clock can be applied to bypass PLL1 and directly drive PLL4 for standalone audio clock generation - but video clock genlock functionality remains disabled without the VCXO.

What happens to the LMH1983SQX/NOPB outputs during loss of reference (LOR)?

During loss of reference, the LMH1983SQX/NOPB enters either digital holdover or free-run mode. In holdover, its internal 10-bit DAC holds the VCXO control voltage (via VC_LPF), maintaining output frequency within ±0.5 ppm of the last locked value. In free-run, an external bias sets the VCXO frequency. Both modes assert the NO_REF flag, and LMH1983SQX/NOPB continues outputting stable clocks without interruption - critical for broadcast continuity.

Is the LMH1983SQX/NOPB pin-compatible with other TI video clock generators?

Yes - the LMH1983SQX/NOPB shares the same 40-pin WQFN package, pinout, and power sequencing as the LMH1982SQX/NOPB. The two devices are hardware-compatible; LMH1983SQX/NOPB adds PLL4 and Fout4 functionality while retaining identical footprint, register map structure, and I²C interface behavior - enabling drop-in upgrade paths in existing designs requiring audio clock support.