Texas Instruments LMH6704MF/NOPB

Overview

LMH6704MF/NOPB from Texas Instruments is a 650 MHz current-feedback selectable-gain buffer (SGB) optimized for high-fidelity video and high-speed analog signal routing. It delivers ±90 mA output current, 3000 V/µs slew rate, and <0.02% differential gain distortion at 4.43 MHz - enabling direct drive of multiple 75 Ω video loads in HDTV, RGB, and ADC/DAC interface applications.

For engineers reviewing the LMH6704MF/NOPB datasheet, LMH6704MF/NOPB pinout, LMH6704MF/NOPB application, or LMH6704MF/NOPB equivalent, key selection criteria include its integrated 465 Ω RF/RG resistors for +1/+2/−1 V/V gain selection, TTL-compatible disable pin (DIS), SOT-23-6 package footprint, and guaranteed −62 dBc 2nd-harmonic distortion at 10 MHz with 2 VPP output.

Technical Context

The LMH6704MF/NOPB uses a proprietary current-feedback architecture with on-die 465 Ω feedback and gain-setting resistors, eliminating external resistor matching requirements and minimizing layout sensitivity to parasitic capacitance. Its internal bias circuitry enables stable operation from ±4 V to ±6 V supplies across −40°C to +85°C.

Gain configuration is determined solely by external connections to pins 3 (+IN) and 4 (−IN): AV = +2 requires −IN grounded and +IN driven; AV = +1 connects +IN to signal and leaves −IN open; AV = −1 grounds +IN and drives −IN. The DIS pin (pin 6) controls high-impedance output mode with 10 ns enable/disable timing and <50 mVPP glitch.

Key Specifications

Pinout & Package

SOT-23-6 package (TI package code DBV), 2.9 mm × 1.6 mm footprint, 0.95 mm height, thermal resistance θJA = 187°C/W. Pin 1 marked by dot; pin 6 is DIS; pins 2 and 5 are VS+ and VS−; pins 3 and 4 are +IN and −IN respectively; pin 1 is OUT.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed buffer applications.

Compared with LMH6704MF/NOPB, LMH6702MF/NOPB trades disable capability and 100 MHz bandwidth for lower cost and identical footprint, while THS3201DBVR offers superior speed at the expense of design complexity and power - making LMH6704MF/NOPB the optimal balance for production video routing and ADC/DAC interface systems.

Availability

LMH6704MF/NOPB is available at Aetrix Electronics and suitable for HDTV signal distribution, ADC front-end driving, RGB graphics interfacing, and video multiplexing applications requiring stable component supply, consistent parametric performance, and long-term industrial availability.

Supply support for LMH6704MF/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in high-speed amplifiers and precision signal chain solutions.

The LMH6704MF/NOPB belongs to TI's LMH™ high-speed buffer family, designed specifically for wide-dynamic-range video, instrumentation, and communications systems demanding exceptional signal fidelity, low distortion, and simplified PCB layout.

FAQ

What gain configurations does the LMH6704MF/NOPB support, and how are they selected?

The LMH6704MF/NOPB supports three fixed gain modes: +1 V/V, +2 V/V, and −1 V/V. Selection is accomplished by strapping pins 3 (+IN) and 4 (−IN) per Table 1 in the datasheet: for AV = +2, −IN is grounded and +IN driven; for AV = +1, +IN is driven and −IN left open; for AV = −1, +IN is grounded and −IN driven. Internal 465 Ω resistors ensure ±1% gain accuracy over temperature without external components. The LMH6704MF/NOPB does not support variable or programmable gain.

How does the disable (DIS) pin on the LMH6704MF/NOPB operate, and what is its timing behavior?

The DIS pin (pin 6) places the LMH6704MF/NOPB output in high-impedance state when pulled below 0.8 V; it enables normal operation when ≥2.0 V or left floating. Enable and disable times are both 10 ns typical, with <50 mVPP output glitch during transition. In disabled state, supply current drops to ~0.9 µA, and output leakage remains ≤0.2 µA at ±1.8 V. The LMH6704MF/NOPB's DIS pin is TTL-compatible and requires no external pull-up for default-enable operation.

Can the LMH6704MF/NOPB drive 75 Ω video loads directly, and what layout practices improve stability?

Yes - the LMH6704MF/NOPB delivers ±90 mA and is explicitly characterized for driving dual 75 Ω back-terminated video loads. For optimal stability with capacitive loads (e.g., coaxial cables), TI recommends adding a series output resistor (RISO) between pin 1 (OUT) and the load: 15 Ω for 100 pF, 22 Ω for 47 pF, or 39 Ω for 15 pF. Layout best practices include removing ground/power planes near pins 1, 3, and 4; placing 0.01 µF + 0.1 µF ceramic bypass caps within 2 mm of pins 2 and 5; and using controlled-impedance routing. These measures ensure the LMH6704MF/NOPB maintains full 650 MHz bandwidth and <0.02% differential gain.

What is the thermal performance of the LMH6704MF/NOPB in SOT-23-6 package, and how is maximum power dissipation calculated?

The LMH6704MF/NOPB in SOT-23-6 (DBV) has θJA = 187°C/W and θJC = 120°C/W. Maximum allowable power dissipation at ambient temperature TA is PMAX = (150°C − TA)/187°C/W. At TA = 25°C, PMAX ≈ 0.67 W. Quiescent power is PAMP = ICC × VS = 11.5 mA × 10 V = 115 mW; additional RMS output stage dissipation depends on load voltage/current. Derating is required above 25°C ambient; for example, at 70°C TA, PMAX drops to ~0.43 W. The LMH6704MF/NOPB's thermal design must account for both quiescent and dynamic loading to avoid junction temperatures exceeding 150°C.

Does the LMH6704MF/NOPB require external compensation, and how does it handle unity-gain stability?

No - the LMH6704MF/NOPB is internally compensated for stable operation at AV = +1, +2, and −1 without external components. Its integrated 465 Ω feedback resistors are optimized for unity-gain flatness up to 200 MHz (0.1 dB gain flatness). For enhanced unity-gain response with reduced peaking, TI provides an alternate configuration (Figure 20) using a 6.8 µF capacitor (CSS) between pins 2 and 5, which modifies noise gain without altering closed-loop gain. This method increases output-referred voltage noise by 10% but eliminates frequency response peaking - a verified option included in the LMH6704MF/NOPB's official application guidance.