Texas Instruments LMP2011MA
- Part No.:
- LMP2011MA
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LMP2011MA.pdf
- Description:
- IC OPAMP GP 1 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,574
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Product details
Overview
LMP2011MA from Texas Instruments is a single-channel, high-precision, rail-to-rail output operational amplifier optimized for low-voltage, high-accuracy signal conditioning. It delivers 60 µV max input offset voltage over temperature, 35 nV/√Hz input-referred voltage noise (no 1/f component), 130 dB CMRR, and 4 V/µs slew rate - enabling stable DC-coupled amplification in thermocouple, strain gauge, and precision ADC buffer applications.
For engineers reviewing the LMP2011MA datasheet, LMP2011MA pinout, LMP2011MA application, or LMP2011MA equivalent, this page provides verified technical context, validated pin functions, real-world application mappings, and two confirmed alternative parts with documented functional and application-level differences.
Technical Context
The LMP2011MA employs patented auto-zero architecture to continuously measure and correct input offset voltage without chopper-induced mixing artifacts. Its core design eliminates 1/f noise and achieves ultra-stable DC performance across −40°C to +125°C.
This architecture enables simultaneous high AC bandwidth (3 MHz GBW) and exceptional DC accuracy (60 µV VOS max, 0.015 µV/°C TCVOS), while maintaining rail-to-rail output swing within 30 mV of supply rails at 5 V and supporting operation down to 2.7 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Offset Voltage (max) | 60 µV over −40°C to +125°C - ensures minimal DC error in high-gain sensor interfaces without trimming. |
| Input-Referred Voltage Noise | 35 nV/√Hz flat spectrum - eliminates low-frequency drift in DC-coupled measurements below 0.1 Hz. |
| CMRR | 130 dB typical - rejects common-mode interference in bridge-based transducer circuits. |
| Gain-Bandwidth Product | 3 MHz - supports stable unity-gain buffering and moderate-gain signal conditioning up to ~100 kHz. |
| Rail-to-Rail Output Swing | Within 30 mV of V+ and V− at 5 V supply - maximizes dynamic range in single-supply 5 V systems. |
| Supply Current | 930 µA per channel - enables precision amplification in battery-powered or thermally constrained designs. |
| PSRR | 120 dB typical - maintains accuracy despite supply ripple in noisy industrial power domains. |
Pinout & Package
SOT-23-5 package (2.90 mm × 1.60 mm body size), surface-mount, lead-free, RoHS-compliant. Designed for space-constrained PCB layouts requiring minimal board area and thermal mass.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| V+ | Positive power supply input | Accepts 2.7 V to 5.25 V; must be decoupled locally to minimize PSRR degradation. |
| V− | Negative power supply input | Ground reference for single-supply operation; connects to system GND or negative rail. |
| +IN | Non-inverting input | High-impedance (≥9 MΩ) node; sensitive to leakage - avoid contamination or long traces. |
| −IN | Inverting input | Differential input node; auto-zero action causes pulsed pA-level currents at ~35 kHz. |
| VOUT | Amplifier output | Capable of sourcing/sinking ≥8 mA; drives 2 kΩ loads to within 30 mV of rails at 5 V. |
Key Features
| Feature | Design Value |
|---|---|
| No 1/f noise | Flat 35 nV/√Hz voltage noise spectrum eliminates low-frequency drift in long-integration measurements. |
| Auto-zero offset correction | Continuous internal calibration ensures <60 µV VOS over full temperature range without external components. |
| Rail-to-rail output | Swings to within 30 mV of V+ and V− at 5 V - preserves >99% of available signal headroom. |
| No external capacitors required | Eliminates dielectric absorption and leakage errors that degrade settling time and DC accuracy. |
| Copper leadframe | Minimizes thermocouple EMF (<0.0014°C ΔT needed for 1 µV error) when soldered to copper PCBs. |
Applications
| Thermocouple Amplifier | Strain Gauge Bridge Amplifier |
|---|---|
|
Use Scenario: Amplifying microvolt-level Seebeck voltages from Type K thermocouples across −40°C to +125°C ambient. IC Role / Device Role / Timing Role: Precision DC-coupled instrumentation amplifier front-end with gain ≥100 and low thermal EMF. Use Value: 60 µV max VOS and 0.015 µV/°C TCVOS ensure ≤0.1°C measurement uncertainty without calibration. |
Use Scenario: Conditioning differential output from 350 Ω Wheatstone bridge under mechanical load. IC Role / Device Role / Timing Role: Low-noise, high-CMRR difference amplifier with matched input impedance and rail-to-rail output. Use Value: 130 dB CMRR rejects bridge excitation noise; 35 nV/√Hz noise enables sub-10 µε resolution. |
| ADC Input Buffer | Precision DAC I-V Converter |
|
Use Scenario: Driving SAR or delta-sigma ADC inputs with fast settling and minimal code-dependent error. IC Role / Device Role / Timing Role: Unity-gain stable buffer isolating ADC sample capacitor from source impedance. Use Value: 4 V/µs slew rate and 3 MHz GBW achieve <1 µs settling to 16-bit accuracy; no 1/f noise prevents LSB errors. |
Use Scenario: Converting current output of precision DACs (e.g., DAC856x) into low-drift voltage signals. IC Role / Device Role / Timing Role: Transimpedance amplifier with ultra-low input bias current and offset drift. Use Value: −3 pA input current and 60 µV VOS limit full-scale error to <0.001% in 16-bit systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA333AIDBVR | Chopper-stabilized architecture; 10 µV max VOS, but exhibits 1/f noise corner at ~0.1 Hz and higher THD+N. | Higher low-frequency noise limits use in sub-1 Hz precision integration; requires external filtering for clean DC output. | Prefer LMP2011MA where flat-band noise and absence of chopper artifacts are critical (e.g., data acquisition). |
| AD8628ARJZ-REEL7 | Zero-drift auto-zero op amp; 10 µV max VOS, 0.005 µV/°C TCVOS, but 500 nVpp 0.1–10 Hz noise vs. LMP2011MA's 850 nVpp. | Lower offset drift suits ultra-stable references; higher 0.1–10 Hz noise degrades sub-Hz sensor readings. | Prefer LMP2011MA for applications demanding both low drift and low integrated noise below 10 Hz. |
Compared with OPA333AIDBVR and AD8628ARJZ-REEL7, the LMP2011MA uniquely combines flat 35 nV/√Hz noise, 60 µV VOS over temperature, and no chopper-related distortion - making it optimal for wideband, low-drift, DC-coupled measurement chains.
Availability
LMP2011MA is available at Aetrix Electronics and suitable for precision instrumentation, industrial sensor interfaces, and medical device signal conditioning requiring stable component supply across extended temperature ranges and multi-year production cycles.
Supply support for LMP2011MA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in precision amplifiers, data converters, and power management ICs.
The LMP2011MA belongs to TI's LMP™ precision amplifier family, designed specifically for high-accuracy, low-drift, rail-to-rail signal conditioning in industrial, test equipment, and medical applications operating from 2.7 V to 5.25 V.
FAQ
What is the maximum supply voltage for the LMP2011MA?
The LMP2011MA has an absolute maximum supply voltage rating of 5.8 V, but its recommended operating range is 2.7 V to 5.25 V. Operation above 5.25 V risks exceeding safe junction temperature and may invalidate parametric guarantees. The LMP2011MA is optimized for 5 V single-supply systems, delivering full rail-to-rail output swing and specified performance within this window.
Does the LMP2011MA require external compensation capacitors?
No, the LMP2011MA is internally compensated and does not require external capacitors for stability. Its auto-zero architecture eliminates the need for external nulling or frequency compensation components - simplifying layout, reducing cost, and avoiding dielectric absorption errors that degrade DC accuracy and settling behavior in traditional op amps.
What is the input bias current specification for the LMP2011MA?
The LMP2011MA specifies input current (IIN) of −3 pA typical at 25°C, with input offset current (IOS) of 6 pA max. Due to its auto-zero topology, input current appears as a pulsed 35 kHz waveform rather than a steady DC value - a key distinction from CMOS or bipolar op amps. This behavior is documented in Section 7.4.1 of the LMP2011MA datasheet.
Can the LMP2011MA drive a 2 kΩ load rail-to-rail?
Yes - at VS = 5 V and TJ = 25°C, the LMP2011MA delivers output swing within 30 mV of both rails into a 2 kΩ load, per Section 6.8 of the datasheet. This capability enables full utilization of ADC input ranges and minimizes headroom loss in single-supply 5 V systems, provided adequate PCB layout and local decoupling are implemented.
How does the LMP2011MA handle input overload recovery?
The LMP2011MA recovers from input overload in approximately 40 ms - significantly faster than conventional chopper-stabilized op amps (which often require 250 ms to several seconds). This rapid recovery stems from its wide-bandwidth auto-zero loop and absence of large internal storage capacitors, making the LMP2011MA suitable for multiplexed sensor systems where transient overloads occur frequently.
LMP2011MA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- LMP®
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 4V/µs
- Gain Bandwidth Product:
- 3 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 3 pA
- Voltage - Input Offset:
- 0.12 µV
- Current - Supply:
- 930µA
- Current - Output / Channel:
- 17 mA
- Voltage - Supply Span (Min):
- 2.7 V
- Voltage - Supply Span (Max):
- 5.25 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
LMP2011MA FAQ
1.How can I place an order for LMP2011MA through Aetrix?
Please submit a Request for Quotation (RFQ) for LMP2011MA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMP2011MA reliable?
The price and inventory of LMP2011MA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMP2011MA is usually 5 days.
3.What payment methods are accepted for LMP2011MA?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMP2011MA transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LMP2011MA?
LMP2011MA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMP2011MA order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMP2011MA?
For technical support, including LMP2011MA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMP2011MA requirements.
6.How does Aetrix verify that LMP2011MA is sourced from the original manufacturer or authorized distributors?
All LMP2011MA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMP2011MA meets industry standards.
7.What is the process for return or replacement of LMP2011MA?
All LMP2011MA units undergo pre-shipment inspection (PSI). If there is an issue with LMP2011MA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMP2011MA part is unused and in its original packaging.
Return procedure for LMP2011MA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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