Texas Instruments LMR38020FSDDAR

Overview

LMR38020FSDDAR from Texas Instruments is a 4.2-V to 80-V, 2-A synchronous buck DC/DC converter with 40-µA quiescent current, FPWM mode operation, and integrated spread spectrum for EMI reduction. It delivers regulated output in industrial transport, wireless infrastructure, and factory automation systems where wide-input resilience and low-noise power delivery are critical.

For engineers reviewing the LMR38020FSDDAR datasheet, LMR38020FSDDAR pinout, LMR38020FSDDAR application, or LMR38020FSDDAR equivalent, key selection criteria include its 2-A continuous output, 200-kHz–2.2-MHz adjustable switching frequency, precision enable input (1.1–1.4 V threshold), ±1.0% reference voltage tolerance, and 8-pin HSOIC PowerPAD™ package with >1.5-mm VIN-to-GND creepage.

Technical Context

The LMR38020FSDDAR employs fixed-frequency peak-current mode control with internal compensation, enabling stable regulation across 1-V to 75-V adjustable output ranges. Its FPWM mode ensures constant switching frequency and tight output voltage regulation even at light loads, while integrated synchronous rectification eliminates external diode losses.

It supports frequency synchronization (300 kHz–2.1 MHz) and pseudorandom spread spectrum modulation to reduce conducted and radiated EMI. Protection features include cycle-by-cycle current limiting, hiccup-mode short-circuit response, thermal shutdown (163°C trip), and precision UVLO with 4.2-V startup and 3.8-V operating minimum.

Key Specifications

Pinout & Package

LMR38020FSDDAR is housed in an 8-pin HSOIC (DDA) package with exposed thermal pad (PowerPAD™), measuring 4.89 mm × 3.90 mm. The package supports high-power dissipation via bottom-side thermal conduction to PCB copper.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck converter applications.

Compared with LMR38020SDDAR and LMR38020FDDAR, the LMR38020FSDDAR uniquely combines FPWM and spread spectrum - delivering both tight output regulation *and* reduced peak EMI, making it optimal for next-generation industrial and telecom power designs requiring dual compliance.

Availability

LMR38020FSDDAR is available at Aetrix Electronics and suitable for industrial transport, wireless infrastructure, and factory automation applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for LMR38020FSDDAR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability power conversion ICs.

The LMR38020FSDDAR belongs to TI's SIMPLE SWITCHER® family - engineered for rugged industrial and automotive power applications demanding wide-input operation, low IQ, and integrated protection without external complexity.

FAQ

What is the minimum input voltage required for LMR38020FSDDAR to start up and maintain regulation?

The LMR38020FSDDAR requires a minimum input voltage of 4.2 V to initiate startup and sustain regulation. Once operating, it can function down to 3.8 V input. Its 97% maximum duty cycle allows continued regulation during severe input sags - a key feature for automotive cold-crank and industrial brownout conditions. This behavior is confirmed in the Recommended Operating Conditions table of the official datasheet.

Does LMR38020FSDDAR support synchronization to an external clock, and what is the valid frequency range?

Yes, LMR38020FSDDAR supports external clock synchronization via the RT/SYNC pin. The valid synchronization frequency range is 300 kHz to 2.1 MHz, with timing thresholds defined by VSYNC_HI (≥2 V) and VSYNC_LO (≤0.6 V). The device automatically detects and locks to the external clock, disabling the internal oscillator - enabling precise system-level timing coordination in multi-converter designs.

How does the power-good (PG) flag on LMR38020FSDDAR behave during startup and fault conditions?

The PG pin on LMR38020FSDDAR is an open-drain output that remains low for ~4 ms after EN is asserted, then transitions high when output voltage reaches 92% of target and remains within regulation. It pulls low during faults (overcurrent, thermal shutdown, undervoltage) and during EN deactivation. Built-in glitch filtering (40-µs time constant) rejects transient excursions, ensuring reliable system reset signaling in noisy industrial environments.

Can LMR38020FSDDAR operate with a pre-biased output voltage, and why is this important?

Yes, LMR38020FSDDAR supports start-up into a pre-biased output - meaning it can safely begin switching when VOUT is already charged to a non-zero voltage. This prevents reverse current flow and potential damage to downstream components. It is essential for hot-swap systems, redundant power architectures, and applications where multiple regulators share a common output bus.

What thermal metrics define the thermal performance of LMR38020FSDDAR in its HSOIC package?

LMR38020FSDDAR in the DDA (HSOIC-8) package has a junction-to-ambient thermal resistance (RθJA) of 42.9°C/W on standard PCBs and 29°C/W on TI's evaluation board. Its junction-to-board (RθJB) is 13.6°C/W, and junction-to-case (bottom) is 4.3°C/W - confirming efficient heat transfer through the exposed PowerPAD™ to the PCB copper. These values are measured per JEDEC standards and guide heatsinking and layout decisions for 2-A continuous operation.