Texas Instruments LMS3655NQRNLRQ1
- Part No.:
- LMS3655NQRNLRQ1
- Manufacturer:
- Texas Instruments
- Package:
- 22-PowerVFQFN
- Datasheet:
-
LMS3655NQRNLRQ1.pdf
- Description:
- IC REG BUCK 3.3V 5.5A 22VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,574
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LMS3655NQRNLRQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive synchronous buck converter delivering 5.5-A continuous output at 3.3 V with fixed 400-kHz switching, 36-V max input, and integrated compensation. It operates from –40°C to +125°C ambient, supports external frequency synchronization, and features a built-in open-drain RESET output with 3-ms release timer-used in driver monitoring and surround-view ECU power rails.
For engineers reviewing the LMS3655NQRNLRQ1 datasheet, LMS3655NQRNLRQ1 pinout, LMS3655NQRNLRQ1 application, or LMS3655NQRNLRQ1 equivalent, key selection criteria include its 3.3-V fixed output, spread-spectrum EMI reduction, 18-µA quiescent current at 3.3 VOUT, 3.8-V minimum input for full 5.5-A operation, and wettable-flank 22-pin VQFN (RNL) package for automotive-grade solder joint inspection.
Technical Context
The LMS3655NQRNLRQ1 employs peak current mode control with internal compensation and frequency foldback architecture, enabling stable regulation down to 3.5-V input for 3.3-V output. Its flip-chip construction minimizes switch-node ringing and radiated EMI, while the dual-PVIN/PGND layout and integrated high-side (60–130 mΩ) and low-side (40–80 mΩ) MOSFETs support high-current, low-dropout operation.
It integrates a 3.1-V internal LDO (VCC), bootstrap gate drive (CBOOT), analog ground (AGND) separation, and programmable FPWM mode-allowing seamless transition between automatic light-load (PFM) and forced PWM operation. The RESET output provides filtered system-status indication without external supervision circuitry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.3 V ±1.5% reference tolerance; ensures stable USB and camera rail compliance |
| Max Output Current | 5.5 A continuous; supports high-power imaging and radar subsystems |
| Input Voltage Range | 3.9 V to 36 V (transient tolerant to 42 V); accommodates automotive battery fluctuations |
| Switching Frequency | 400 kHz ±10%; enables compact 2.2-µH inductor and low-profile ceramic capacitors |
| Quiescent Current | 18 µA at 3.3 VOUT, no load; extends battery runtime in always-on vehicle modules |
| Efficiency (12 V → 3.3 V) | 92% at 3.5 A; reduces thermal load in confined ECU enclosures |
| Package | 22-pin VQFN (RNL) with wettable flanks; supports automated optical solder-joint inspection |
| EMI Reduction | Spread-spectrum modulation (±3% span); lowers peak conducted emissions per CISPR 25 Class 5 |
Pinout & Package
Package: 22-pin VQFN (RNL), 4.0 mm × 5.0 mm body size, exposed thermal pad, wettable flanks.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Internal 3.1-V LDO output | Supplies internal control logic; requires 4.7-µF bypass capacitor to AGND |
| CBOOT | Bootstrap capacitor node | Drives high-side MOSFET gate; connects via 470-nF capacitor to SW |
| SYNC | Frequency synchronization input | Accepts 250–500 kHz external clock; rising-edge triggered |
| PVIN1 / PVIN2 | Power input supply pins | Dual high-current VIN paths; must be shorted on PCB for optimal current sharing |
| SW | Switch node | Connects to power inductor; low parasitic inductance due to flip-chip layout |
| PGND1 / PGND2 | Power ground terminals | Low-side MOSFET return; must tie directly to AGND and system ground |
| AVIN | Analog input supply | Bias source for internal analog circuits; connect to PVIN net on PCB |
| FPWM | Mode control input | High = forced PWM; low = automatic light-load (PFM) mode; must not float |
| EN | Enable input | Active-high logic; 1.7–2.0 V threshold; includes 0.5-V hysteresis for noise immunity |
| RESET | Open-drain reset flag | Indicates valid output; 3-ms release delay and 24-µs glitch filter eliminate external supervisor |
| AGND | Analog ground reference | Reference for FB, VREF, and internal error amplifier; star-connected to PGND |
| FB | Feedback input | Monitors regulated 3.3-V output directly; no external divider required |
| BIAS | Auxiliary bias regulator input | Connected to output rail; improves efficiency at light loads and enables low-VIN operation |
Key Features
| Feature | Design Value |
|---|---|
| Integrated high- and low-side MOSFETs | Eliminates external power switches; RDSON ≤ 130 mΩ (HS) and ≤ 80 mΩ (LS) reduce conduction loss |
| Automatic light-load PFM mode | Maintains >85% efficiency at 10-mA load; critical for always-on automotive modules |
| Spread-spectrum frequency modulation | ±3% frequency dithering lowers EMI peaks by up to 10 dB; meets CISPR 25 Class 5 |
| Built-in soft-start and protection | 4-ms soft-start ramp, thermal shutdown (160–185°C), overcurrent (6–9.5 A), and UVLO prevent inrush damage |
| Wettable-flank VQFN package | Enables AOI-based solder-joint verification-required for automotive ASIL-B functional safety compliance |
| RESET output with internal filtering | 3-ms release timer and 24-µs glitch filter replace discrete supervisor ICs, saving board space and BOM cost |
Applications
| Automotive USB Charging | Driver Monitoring System |
|---|---|
Use Scenario: Powering dual-lens infrared cameras and SoCs in cabin-facing driver attention systems. IC Role / Device Role / Timing Role: Primary 3.3-V power rail regulator with fast transient response to handle burst-mode image capture. Use Value: 92% efficiency at 3.5 A and 18-µA quiescent current extend battery life during parked surveillance mode. |
Use Scenario: Supplying image signal processors and eye-tracking sensors in ADAS cockpit domain controllers. IC Role / Device Role / Timing Role: High-current, low-noise 3.3-V source with spread-spectrum EMI control to avoid interference with RF receivers. Use Value: Wettable-flank RNL package enables automated optical inspection for zero-defect automotive manufacturing. |
| Surround-View ECU | Mechanically Scanning LiDAR |
Use Scenario: Providing stable 3.3-V power to four-channel video decoders and FPGA preprocessing units. IC Role / Device Role / Timing Role: Synchronous buck regulator with 400-kHz fixed frequency for predictable EMI filtering design. Use Value: Dual PVIN/PGND pins and low 0.65-V dropout at 5.5 A ensure reliable operation during cold-crank transients. |
Use Scenario: Delivering clean 3.3-V bias to high-speed laser diode drivers and time-of-flight ASICs. IC Role / Device Role / Timing Role: Low-ringing switch-node regulator minimizing electromagnetic coupling into sensitive analog timing circuits. Use Value: Flip-chip layout and integrated compensation reduce layout sensitivity-critical for high-reliability LiDAR modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM61480QRNLRQ1 | 4.5-A output, 2.5-V to 36-V input, 2.1-MHz switching, no spread spectrum | Better suited for space-constrained designs needing higher frequency and smaller magnetics | Select when board area is limited and EMI requirements allow non-spread-spectrum operation |
| TPS54561QRTQRQ1 | 5.5-A output, 3.5-V to 60-V input, 100-kHz to 2.5-MHz adjustable frequency, no integrated compensation | Requires external loop compensation; supports wider input range including 48-V truck systems | Select when input exceeds 36 V or when custom loop tuning is required for dynamic load profiles |
Compared with LM61480QRNLRQ1 and TPS54561QRTQRQ1, the LMS3655NQRNLRQ1 offers superior EMI performance via spread-spectrum modulation and eliminates compensation design effort-making it optimal for production-ready automotive vision systems where schedule and validation risk are critical.
Availability
LMS3655NQRNLRQ1 is available at Aetrix Electronics and suitable for automotive USB charging, driver monitoring systems, surround-view ECUs, mechanically scanning LiDAR, and vehicle-to-vehicle communication modules requiring stable component supply across extended temperature and long product lifecycles.
Supply support for LMS3655NQRNLRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive-grade power management solutions with decades of AEC-Q100 qualification experience.
The LMS3655-Q1 product line delivers high-current, low-EMI synchronous buck regulation for demanding automotive ADAS and infotainment subsystems-designed specifically for vision, sensing, and always-on ECU applications operating up to 150°C junction temperature.
FAQ
What is the minimum input voltage required for LMS3655NQRNLRQ1 to deliver full 5.5-A output at 3.3 V?
The LMS3655NQRNLRQ1 requires a minimum input voltage of 3.8 V after startup to maintain full 5.5-A output current at 3.3 V with ±2% regulation accuracy. Below this, current limit or dropout behavior occurs. This value is validated under TJ = 25°C and accounts for internal MOSFET RDS(on) and inductor DCR losses.
Does LMS3655NQRNLRQ1 support external frequency synchronization, and what is the acceptable SYNC input range?
Yes, LMS3655NQRNLRQ1 supports external frequency synchronization via the SYNC pin. The acceptable input frequency range is 250 kHz to 500 kHz, with rising-edge triggering and 25%–75% duty cycle tolerance. This allows tight system-level clock alignment in multi-rail automotive domains without requiring additional PLL circuitry.
How does the RESET output of LMS3655NQRNLRQ1 function, and what are its timing characteristics?
The LMS3655NQRNLRQ1 RESET output is an open-drain flag that goes low when EN is deasserted or output voltage falls below 94% of nominal 3.3 V. It features a built-in 24-µs glitch filter and 3-ms release timer after fault clearance. The RESET pin sinks up to 10 mA and requires an external pull-up resistor to a valid logic supply.
Is LMS3655NQRNLRQ1 pin-compatible with other devices in the LMS36x5-Q1 family, such as LMS3635NQRNLRQ1?
No, LMS3655NQRNLRQ1 is not pin-compatible with LMS3635NQRNLRQ1 despite identical RNL package and pinout-because their internal current-limit thresholds differ (LMS3655-Q1: 6.7–9.5 A HS limit; LMS3635-Q1: 4.5–7.5 A). Substituting without layout or compensation review risks overcurrent trip or thermal failure under full load.
What is the purpose of the BIAS pin on LMS3655NQRNLRQ1, and how should it be connected?
The BIAS pin on LMS3655NQRNLRQ1 supplies the auxiliary bias regulator that powers internal analog circuitry. For 3.3-V fixed-output operation, it must be connected directly to the output rail. This configuration improves light-load efficiency and enables operation down to 3.5-V input-critical for cold-crank scenarios in automotive applications.
LMS3655NQRNLRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 22-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3.9V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Current - Output:
- 5.5A
- Frequency - Switching:
- 250kHz ~ 500kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 22-VQFN-HR (5x4)
LMS3655NQRNLRQ1 FAQ
1.How can I place an order for LMS3655NQRNLRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for LMS3655NQRNLRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMS3655NQRNLRQ1 reliable?
The price and inventory of LMS3655NQRNLRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMS3655NQRNLRQ1 is usually 5 days.
3.What payment methods are accepted for LMS3655NQRNLRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMS3655NQRNLRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LMS3655NQRNLRQ1?
LMS3655NQRNLRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMS3655NQRNLRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMS3655NQRNLRQ1?
For technical support, including LMS3655NQRNLRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMS3655NQRNLRQ1 requirements.
6.How does Aetrix verify that LMS3655NQRNLRQ1 is sourced from the original manufacturer or authorized distributors?
All LMS3655NQRNLRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMS3655NQRNLRQ1 meets industry standards.
7.What is the process for return or replacement of LMS3655NQRNLRQ1?
All LMS3655NQRNLRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with LMS3655NQRNLRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMS3655NQRNLRQ1 part is unused and in its original packaging.
Return procedure for LMS3655NQRNLRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LMS3655NQRNLRQ1 Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

