Texas Instruments LMS3655NQRNLTQ1
- Part No.:
- LMS3655NQRNLTQ1
- Manufacturer:
- Texas Instruments
- Package:
- 22-PowerVFQFN
- Datasheet:
-
LMS3655NQRNLTQ1.pdf
- Description:
- IC REG BUCK 3.3V 5.5A 22VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LMS3655NQRNLTQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive synchronous buck converter delivering up to 5.5 A continuous output current, fixed 3.3-V output, 400-kHz switching frequency (±10%), and 92% typical efficiency at 13.5-V input/3.3-V output/3.5-A load - deployed in surround view ECU power rails.
For engineers reviewing the LMS3655NQRNLTQ1 datasheet, LMS3655NQRNLTQ1 pinout, LMS3655NQRNLTQ1 application, or LMS3655NQRNLTQ1 equivalent, key selection criteria include its 3.3-V fixed output with ±1.5% reference tolerance, 3.5-V minimum input for full functionality at 5.5-A load, integrated RESET with 3-ms release timer, and wettable-flank VQFN-22 package for automated optical inspection.
Technical Context
The LMS3655NQRNLTQ1 employs peak current mode control with internal compensation and seamless PWM/PFM transition, enabling high efficiency across light to full load. Its flip-chip HotRod™ layout minimizes switch-node ringing and conducted EMI, while frequency foldback allows regulation from as low as 3.5-V input to 3.3-V output.
It integrates a 3.1-V internal LDO (VCC), bootstrap gate driver (CBOOT), open-drain RESET with built-in 24-µs glitch filter and 3-ms release delay, and FPWM mode control for forced continuous conduction - all operating across –40°C to +125°C ambient with 150°C junction rating.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltage | Fixed 3.3 V ±2% regulation over full load and temperature range |
| Max output current | 5.5 A continuous; supports automotive ECU loads without external current boosting |
| Input voltage range | 3.5 V to 36 V; withstands 42-V transients ≤500 ms for robust automotive surge protection |
| Switching frequency | 400 kHz ±10%; enables compact 2.2-µH inductor and low-profile 10-µF ceramic output capacitors |
| Quiescent current | 18 µA at VIN=13.5 V, VOUT=3.3 V, no load - extends battery runtime in always-on modules |
| RESET function | Open-drain output with 105–110% rising / 92–96.5% falling thresholds relative to VOUT and 3-ms release timer |
| Thermal resistance | RθJA = 29.4°C/W on thermally optimized 4-layer PCB - supports 5.5-A operation without forced airflow |
Pinout & Package
Package: 22-pin VQFN (RNL) with wettable flanks, 4.0 mm × 5.0 mm body size, 0.5-mm pitch - optimized for AOI-compatible solder joint inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VCC | Internal 3.1-V LDO output | Power source for internal control circuitry; requires 4.7-µF ceramic capacitor to AGND |
| 2 CBOOT | Bootstrap capacitor node | Drives high-side MOSFET gate; connects via 470-nF capacitor to SW pin |
| 3 SYNC | External clock synchronization input | Accepts 250–500-kHz system clock; rising-edge triggered; enables EMI reduction via frequency alignment |
| 4,14 PVIN1/PVIN2 | Main power input terminals | Parallel-connected 36-V rated inputs; require local ceramic bypassing to PGND pins |
| 5,10 PGND1/PGND2 | Power ground return paths | Low-inductance returns for internal low-side MOSFET; must be tied together and connected to AGND |
| 9 SW | Switch node | Connects to power inductor; high dv/dt node requiring tight layout and minimal trace area |
| 15 AVIN | Analog input supply | Bias source for analog circuits; tied to PVIN on PCB; improves noise immunity of feedback path |
| 16 FPWM | Forced PWM mode control | High = continuous conduction; low = automatic light-load PFM; prevents audible noise in sensitive systems |
| 18 EN | Enable input | Active-high logic; 1.7–2.0-V threshold; hysteresis ensures clean startup/shutdown sequencing |
| 19 RESET | Open-drain system status flag | Indicates valid regulation; eliminates need for external supervisor IC in space-constrained ECUs |
| 20 AGND | Analog ground reference | Reference point for FB, VCC, and internal error amplifier; must be star-connected to PGND |
| 21 FB | Feedback input | Monitors regulated 3.3-V output directly; no external divider required for fixed-output variant |
| 22 BIAS | Auxiliary bias regulator input | Connected to output rail; reduces power loss and improves efficiency at light loads |
Key Features
| Feature | Design Value |
|---|---|
| Integrated RESET with filtering | Eliminates external supervisor IC and saves ≥3 mm² board area in surround-view ECUs |
| Wettable-flank VQFN-22 package | Enables 100% automated optical inspection of solder joints without x-ray, reducing manufacturing QA cost |
| Frequency foldback architecture | Permits stable 3.3-V regulation from input as low as 3.5 V - critical for cold-crank automotive operation |
| Low EMI switch-node waveform | Reduces conducted emissions by >10 dBµV in 150-kHz–30-MHz band versus conventional QFN buck converters |
| Automatic light-load PFM mode | Maintains >85% efficiency at 1-mA load - extends battery life in always-on vehicle-to-vehicle communication modules |
Applications
| Automotive USB Charge | Surround View System ECU |
|---|---|
Use Scenario: Powering dual-port 5-V/3.3-V USB Type-C PD controllers in center console modules. IC Role / Device Role / Timing Role: Primary 3.3-V rail generator for USB controller logic, PHY, and I²C interface. Use Value: 5.5-A capability supports simultaneous charging of two devices; 18-µA quiescent current meets OEM sleep-mode leakage budgets. |
Use Scenario: Supplying image signal processor (ISP), camera interface, and CAN transceiver in 360° camera domain controller. IC Role / Device Role / Timing Role: Main 3.3-V power stage for ISP core and MIPI CSI-2 receiver logic. Use Value: AEC-Q100 Grade 1 qualification ensures reliability at 125°C ambient; RESET output validates rail integrity before ISP boot. |
| Mechanically Scanning LIDAR | Driver Monitoring System |
Use Scenario: Providing stable 3.3-V supply to FPGA-based timing controller and motor driver ICs in rotating LIDAR head assemblies. IC Role / Device Role / Timing Role: High-current DC/DC stage powering FPGA I/O banks and stepper motor gate drivers. Use Value: 400-kHz fixed frequency avoids interference with LIDAR pulse timing; wettable flanks ensure mechanical reliability under vibration. |
Use Scenario: Powering infrared LED driver, CMOS image sensor, and eye-tracking ASIC in A-pillar mounted driver attention module. IC Role / Device Role / Timing Role: Primary 3.3-V source for sensor interface and real-time processing unit. Use Value: 3.5-V minimum input enables operation during engine cranking; ±1.5% reference tolerance maintains ADC accuracy for pupil detection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM61480QRNXTQ1 | 5.5-A, 36-V, 2.1-MHz fixed-frequency; higher switching frequency enables smaller magnetics but higher switching loss at full load | Preferred for space-constrained ADAS domain controllers where inductor height < 1.2 mm is mandatory | Select when board area is constrained and thermal margin allows higher-frequency operation |
| TPS54560QDDARQ1 | 5-A, 60-V max input, 100-kHz–2.5-MHz adjustable frequency; external compensation; no integrated RESET | Suitable for high-input-voltage industrial gateways where 42-V transient immunity is insufficient | Choose when input surges exceed 42 V or when custom loop response tuning is required |
Compared with LM61480QRNXTQ1 and TPS54560QDDARQ1, the LMS3655NQRNLTQ1 delivers superior light-load efficiency via automatic PFM, includes a production-tested RESET output with guaranteed timing, and offers lower EMI through optimized HotRod™ layout - making it optimal for cost-sensitive, safety-critical automotive vision systems.
Availability
LMS3655NQRNLTQ1 is available at Aetrix Electronics and suitable for automotive USB charge, surround view system ECU, and mechanically scanning LIDAR applications requiring stable component supply, AEC-Q100 compliance, and long-term production continuity.
Supply support for LMS3655NQRNLTQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive-grade power management solutions.
The LMS3655NQRNLTQ1 belongs to TI's AEC-Q100-qualified LMS36x5-Q1 family, engineered specifically for high-reliability automotive power rails in ADAS, infotainment, and body electronics where efficiency, EMI, and functional safety are critical.
FAQ
What is the minimum input voltage required for LMS3655NQRNLTQ1 to deliver full 5.5-A output at 3.3 V?
The LMS3655NQRNLTQ1 requires a minimum input voltage of 3.8 V to sustain full 5.5-A output current while maintaining ±2% regulation accuracy at 3.3 V. This is enabled by its frequency foldback architecture, which extends operation below the typical 3.5-V dropout limit observed in standard buck converters. Below 3.8 V, current capability degrades progressively per the datasheet's VIN-MIN curve.
Does LMS3655NQRNLTQ1 support external frequency synchronization, and what is the valid input range?
Yes, the LMS3655NQRNLTQ1 supports external frequency synchronization via the SYNC pin. It accepts a system clock with frequency between 250 kHz and 500 kHz, triggering on the rising edge. The device maintains ±10% tolerance around its nominal 400-kHz switching frequency when synchronized, enabling EMI reduction through spectral spreading or alignment with other system clocks.
How does the RESET output of LMS3655NQRNLTQ1 behave during power-up and fault conditions?
The LMS3655NQRNLTQ1 RESET output is an open-drain flag that remains low until the output reaches 105–110% of nominal 3.3 V and stays high for ≥3 ms after valid regulation is achieved. It asserts low again if VOUT falls below 92–96.5% of 3.3 V or if EN is pulled low. The internal 24-µs glitch filter prevents false triggers from transient noise on the output rail.
Is LMS3655NQRNLTQ1 compatible with standard VQFN-22 reflow profiles, and what is the significance of wettable flanks?
Yes, the LMS3655NQRNLTQ1 uses a standard VQFN-22 (RNL) package compatible with IPC/JEDEC J-STD-020D reflow profiles. Its wettable flanks - vertical sidewalls plated with solderable finish - enable automated optical inspection (AOI) of solder fillets without x-ray equipment, significantly improving first-pass yield and reducing final test escapes in high-volume automotive manufacturing.
What is the role of the BIAS pin on LMS3655NQRNLTQ1, and how should it be connected?
The BIAS pin on LMS3655NQRNLTQ1 supplies the auxiliary bias regulator that powers internal analog circuitry. For the 3.3-V fixed-output variant, it must be connected directly to the 3.3-V output rail. This configuration reduces power loss compared to using the internal VCC LDO alone, improving light-load efficiency and lowering thermal stress on the die - especially critical in thermally constrained ECU enclosures.
LMS3655NQRNLTQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 22-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3.9V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Current - Output:
- 5.5A
- Frequency - Switching:
- 250kHz ~ 500kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 22-VQFN-HR (5x4)
LMS3655NQRNLTQ1 FAQ
1.How can I place an order for LMS3655NQRNLTQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for LMS3655NQRNLTQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMS3655NQRNLTQ1 reliable?
The price and inventory of LMS3655NQRNLTQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMS3655NQRNLTQ1 is usually 5 days.
3.What payment methods are accepted for LMS3655NQRNLTQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMS3655NQRNLTQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LMS3655NQRNLTQ1?
LMS3655NQRNLTQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMS3655NQRNLTQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMS3655NQRNLTQ1?
For technical support, including LMS3655NQRNLTQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMS3655NQRNLTQ1 requirements.
6.How does Aetrix verify that LMS3655NQRNLTQ1 is sourced from the original manufacturer or authorized distributors?
All LMS3655NQRNLTQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMS3655NQRNLTQ1 meets industry standards.
7.What is the process for return or replacement of LMS3655NQRNLTQ1?
All LMS3655NQRNLTQ1 units undergo pre-shipment inspection (PSI). If there is an issue with LMS3655NQRNLTQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMS3655NQRNLTQ1 part is unused and in its original packaging.
Return procedure for LMS3655NQRNLTQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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