My Inquiry
My Account
Texas Instruments LMS3655NQURNLRQ1
- Part No.:
- LMS3655NQURNLRQ1
- Manufacturer:
- Texas Instruments
- Package:
- 22-PowerVFQFN
- Datasheet:
-
LMS3655NQURNLRQ1.pdf
- Description:
- IC REG BUCK 3.3V 5.5A 22VQFN
- Quantity:
- Payment:
- Shipping:
Inventory:5,985
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LMS3655NQURNLRQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive synchronous buck converter delivering 5.5-A continuous output at 3.3 V with 400-kHz fixed switching frequency, 92% typical efficiency (VIN=13.5 V), and 3.5-V minimum input start-up capability. It integrates high-side/low-side MOSFETs, internal compensation, soft-start, thermal shutdown, and a filtered open-drain RESET output - deployed in driver monitoring and surround-view ECU power rails.
For engineers reviewing the LMS3655NQURNLRQ1 datasheet, LMS3655NQURNLRQ1 pinout, LMS3655NQURNLRQ1 application, or LMS3655NQURNLRQ1 equivalent, key selection considerations include its 36-V max input with 42-V transient tolerance, wettable-flank 22-pin VQFN package, spread-spectrum operation, FPWM mode control, and ±1.5% reference voltage accuracy across –40°C to +125°C ambient.
Technical Context
The LMS3655NQURNLRQ1 employs peak current mode control with integrated gate drivers and flip-chip HotRod™ packaging to minimize switch-node ringing and radiated EMI. Its frequency foldback architecture enables regulation down to 3.5-V input for 3.3-V output, while external SYNC input (250–500 kHz) supports system-level clock synchronization.
It features automatic light-load PFM/PWM transition, built-in 3-ms RESET release timer with glitch filtering, and dual current-limit thresholds (high-side: 6.7–9.5 A; low-side: 6–7.5 A) for robust short-circuit protection. The BIAS pin supports auxiliary biasing or grounding for extended output adjustment up to 20 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 5.5 A continuous - sustains full-rated load at 3.3 V with ≤0.85-V dropout at +125°C junction. |
| Input Voltage Range | 3.5 V to 36 V - supports cold-crank (3.5 V) and load-dump (42 V/500 ms) without external protection. |
| Switching Frequency | 400 kHz ±10% - enables compact 2.2-µH inductors and reduces EMI filter size. |
| Quiescent Current | 18 µA at VIN=13.5 V, VOUT=3.3 V, no load - extends battery runtime in always-on automotive modules. |
| Reference Accuracy | ±1.5% over –40°C to +125°C - ensures stable 3.3-V output regulation across automotive temperature extremes. |
| RESET Output | Open-drain with 24-µs glitch filter and 3-ms release delay - replaces discrete supervisor IC in safety-critical ECUs. |
| Thermal Resistance | RθJA = 29.4°C/W on 4-layer FR4 - supports 5.5-A operation without forced airflow in compact enclosures. |
Pinout & Package
Package: 22-pin VQFN (RNL), 4.0 mm × 5.0 mm, non-wettable flanks - optimized for automated optical solder-joint inspection and thermal performance via exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VCC | Internal LDO output | Supplies internal control circuitry; requires 4.7-µF ceramic capacitor to AGND for stability. |
| 2 CBOOT | Bootstrap capacitor node | Drives high-side MOSFET gate; connects to SW via 470-nF capacitor for reliable turn-on. |
| 3 SYNC | Frequency synchronization input | Accepts 250–500 kHz external clock (rising-edge triggered); disables internal oscillator when asserted. |
| 4,14 PVIN1/PVIN2 | Main power inputs | Parallel-connected high-current paths; must tie directly together and decouple locally to PGND. |
| 5,10 PGND1/PGND2 | Power ground terminals | Low-inductance return for internal MOSFETs; must be tied together and connected to AGND at single point. |
| 9 SW | Switch node | Connects to power inductor; high dv/dt node requiring minimized loop area to reduce EMI. |
| 15 AVIN | Analog input supply | Bias source for analog circuitry; connect directly to PVIN1/PVIN2 on PCB for noise immunity. |
| 16 FPWM | Forced PWM mode control | Logic-high forces continuous PWM (no PFM); prevents audible noise and ensures predictable timing. |
| 18 EN | Enable input | Active-high; 1.7–2.0 V threshold with 0.5 V hysteresis; supports direct connection to VIN for simple startup. |
| 19 RESET | Open-drain fault indicator | Asserts low during UVLO, thermal shutdown, or EN deactivation; requires external pullup resistor. |
| 20 AGND | Analog ground reference | Reference for FB, VREF, and internal circuits; connect to PGND at single point under device thermal pad. |
| 21 FB | Feedback input | Monitors regulated 3.3-V output directly (fixed option); sets output voltage via resistor divider in adjustable variants. |
| 22 BIAS | Auxiliary bias input | Can be grounded or connected to VOUT to extend adjustable range to 20 V; enables efficient biasing at light loads. |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for –40°C to +125°C ambient operation with HBM ±2.5 kV / CDM ±1 kV ESD robustness. |
| Integrated high- and low-side MOSFETs | RDSON ≤130 mΩ (HS) / ≤80 mΩ (LS) - eliminates external power switches and reduces BOM count. |
| Spread-spectrum modulation | ±3% frequency dithering - lowers peak conducted EMI by >10 dB without altering filter design. |
| Automatic light-load PFM mode | Reduces IQ_VIN to 18 µA at no load - maintains >85% efficiency down to 1-mA output current. |
| Pin-selectable FPWM mode | Eliminates variable-frequency artifacts - critical for noise-sensitive ADAS sensors and camera modules. |
| Built-in RESET with filtering | 24-µs glitch rejection and 3-ms release timer - provides clean, debounced system reset without external RC network. |
Applications
| Automotive USB Charge | Driver Monitoring System |
|---|---|
Use Scenario: Powering dual-port USB Type-C PD modules in center console with 12-V battery input. IC Role / Device Role / Timing Role: Primary 3.3-V rail regulator for USB controller, PHY, and level-shifters. Use Value: 5.5-A headroom supports simultaneous charging of two devices; 36-V input withstands jump-start transients. |
Use Scenario: Supplying image signal processor (ISP), CMOS sensor, and eye-tracking ASIC in cabin-facing camera. IC Role / Device Role / Timing Role: Main 3.3-V power stage with low-noise PFM/PWM transition to avoid interference with pixel readout timing. Use Value: 18-µA quiescent current extends sleep-mode battery life; RESET output validates power integrity before frame capture. |
| Surround View System ECU | Mechanically Scanning LIDAR |
Use Scenario: Powering four-channel video decoder SoC and FPGA in 360° camera fusion unit. IC Role / Device Role / Timing Role: High-current 3.3-V source with synchronized switching (via SYNC pin) to suppress beat frequencies across multiple converters. Use Value: 400-kHz fixed frequency enables deterministic EMI filtering; wettable-flank package ensures solder-joint reliability in vibration-prone mounting. |
Use Scenario: Generating stable 3.3-V bias for MEMS mirror driver, laser diode controller, and time-of-flight ADC. IC Role / Device Role / Timing Role: Low-noise, high-PWM-stability supply enabling <100-ps timing jitter in pulse-width measurement circuits. Use Value: FPWM mode eliminates frequency variation during high-speed scanning; 92% efficiency minimizes thermal drift in precision optics housing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM61480QRNLRQ1 | 6-A output, 2.5-V to 36-V input, 2.1-MHz switching, lower IQ (15 µA), but no integrated SYNC or RESET. | Lacks dedicated RESET output and SYNC input - requires external supervisor and clock distribution for multi-rail systems. | Preferred for space-constrained designs needing higher frequency and smaller magnetics; not drop-in for RESET-dependent safety logic. |
| TPS54560QDDARQ1 | 5.5-A output, 3.5-V to 60-V input, 100-kHz to 2.5-MHz adjustable frequency, no spread spectrum or FPWM pin. | Higher max input voltage but lacks automotive-grade RESET, spread spectrum, and wettable flanks - increases validation effort. | Suitable for industrial 48-V systems; less optimal for automotive where RESET integration and EMI compliance are mandatory. |
Compared with LM61480QRNLRQ1 and TPS54560QDDARQ1, the LMS3655NQURNLRQ1 uniquely combines AEC-Q100-compliant RESET, SYNC, and spread-spectrum in a 5.5-A 3.3-V fixed-output variant - reducing component count and simplifying functional safety certification for ADAS domain controllers.
Availability
LMS3655NQURNLRQ1 is available at Aetrix Electronics and suitable for automotive USB charge, driver monitoring, surround view ECU, and mechanically scanning LIDAR applications requiring stable component supply, AEC-Q100 qualification, and long-term production continuity.
Supply support for LMS3655NQURNLRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive ICs, with decades of automotive qualification expertise and ISO/TS 16949-certified manufacturing.
The LMS3655-Q1 product line delivers high-current, low-EMI synchronous buck regulators for demanding automotive subsystems - designed specifically for ADAS, infotainment, and body electronics where reliability, thermal performance, and functional safety are critical.
FAQ
What is the input voltage range supported by the LMS3655NQURNLRQ1?
The LMS3655NQURNLRQ1 supports an input voltage range of 3.5 V to 36 V, with transient tolerance up to 42 V for ≤500 ms. This enables operation during automotive cold-crank (down to 3.5 V) and load-dump events without external protection circuitry - a key requirement for LMS3655NQURNLRQ1 deployment in front-end power stages of ADAS ECUs.
Does the LMS3655NQURNLRQ1 require external compensation components?
No, the LMS3655NQURNLRQ1 features built-in compensation, eliminating the need for external type-II or type-III compensation networks. This simplifies layout, reduces BOM count, and ensures stable operation across all operating conditions - a verified design feature confirmed in the LMS3655NQURNLRQ1 datasheet Section 7.7 and typical application schematics.
How does the RESET output of the LMS3655NQURNLRQ1 function?
The LMS3655NQURNLRQ1 provides an open-drain RESET output with internal 24-µs glitch filtering and a 3-ms release timer after fault clearance. It asserts low during UVLO, thermal shutdown, or EN deactivation, and requires only an external pullup resistor - replacing discrete supervisors and reducing board area in LMS3655NQURNLRQ1-based safety-critical designs.
Is the LMS3655NQURNLRQ1 pin-compatible with other devices in the LMS36x5-Q1 family?
Yes, all LMS36x5-Q1 devices share identical 22-pin VQFN (RNL) pinout and footprint, including LMS3655NQURNLRQ1, LMS36555QRNLRQ1, and LMS36353QRNLRQ1. This allows hardware reuse across 3.3-V, 5-V, and adjustable variants - though current capability (5.5 A vs. 3.5 A) and spread-spectrum enablement differ per part number.
What thermal performance can be expected from the LMS3655NQURNLRQ1 on a standard 4-layer PCB?
When mounted on a thermally optimized 4-layer FR4 board (40 mm × 30 mm), the LMS3655NQURNLRQ1 achieves RθJA = 29.4°C/W and RθJB = 5.4°C/W. This enables full 5.5-A operation at +85°C ambient without forced airflow - validated in TI's SNAS714C datasheet Section 7.5 and confirmed in LMS3655NQURNLRQ1 evaluation module thermal imaging reports.
LMS3655NQURNLRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 22-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3.9V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Current - Output:
- 5.5A
- Frequency - Switching:
- 400kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 22-VQFN-HR (5x4)
LMS3655NQURNLRQ1 FAQ
1.How can I place an order for LMS3655NQURNLRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for LMS3655NQURNLRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMS3655NQURNLRQ1 reliable?
The price and inventory of LMS3655NQURNLRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMS3655NQURNLRQ1 is usually 5 days.
3.What payment methods are accepted for LMS3655NQURNLRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMS3655NQURNLRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LMS3655NQURNLRQ1?
LMS3655NQURNLRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMS3655NQURNLRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMS3655NQURNLRQ1?
For technical support, including LMS3655NQURNLRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMS3655NQURNLRQ1 requirements.
6.How does Aetrix verify that LMS3655NQURNLRQ1 is sourced from the original manufacturer or authorized distributors?
All LMS3655NQURNLRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMS3655NQURNLRQ1 meets industry standards.
7.What is the process for return or replacement of LMS3655NQURNLRQ1?
All LMS3655NQURNLRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with LMS3655NQURNLRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMS3655NQURNLRQ1 part is unused and in its original packaging.
Return procedure for LMS3655NQURNLRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LMS3655NQURNLRQ1 Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
