Texas Instruments LMV712LD
- Part No.:
- LMV712LD
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LMV712LD.pdf
- Description:
- IC OPAMP GP 2 CIRCUIT 10WSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LMV712LD from Texas Instruments is a dual rail-to-rail input/output operational amplifier with independent shutdown control per channel, designed for low-voltage portable and RF power amplifier control applications. It delivers 5 MHz gain-bandwidth, 5 V/µs slew rate, 20 nV/√Hz input voltage noise, 1.22 mA/channel supply current, and operates from 2.7 V to 5.5 V.
For engineers reviewing the LMV712LD datasheet, LMV712LD pinout, LMV712LD application, or LMV712LD equivalent, this device is selected for precision analog signal conditioning in space-constrained, battery-powered systems requiring glitch-free turn-on, capacitive load tolerance up to 200 pF, and stable operation across –40°C to 125°C.
Technical Context
The LMV712LD uses parallel NMOS and PMOS input stages to achieve rail-to-rail input operation, with internal logic dynamically allocating bias current across the common-mode range - resulting in a VOS crossover point at ~1.4 V above V−. Its output stage combines PMOS and NPN transistors for true rail-to-rail swing and low-output-impedance drive.
Independent shutdown pins (SDA, SDB) reduce each channel's supply current to <1.5 µA in shutdown mode while holding the output near V−; turnon time is 2.2 µs (typ.) at 5 V with smooth, glitch-free ramping - critical for PA bias control loops where output transients must be avoided.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain-bandwidth product | 5 MHz - supports stable unity-gain and closed-loop configurations up to 5× gain with predictable phase margin. |
| Slew rate | 5 V/µs - enables accurate reproduction of fast-changing signals such as PA envelope tracking waveforms. |
| Input voltage noise | 20 nV/√Hz at 1 kHz - suitable for low-noise sensor interfaces and precision feedback paths in RF front-ends. |
| Supply current per channel | 1.22 mA (typ. at 2.7 V) - enables extended battery life in handheld and IoT devices without sacrificing bandwidth. |
| Rail-to-rail I/O | Inputs operate from V− −0.3 V to V+ +0.3 V; outputs swing within 120 mV of rails (at 10 kΩ load) - maximizes dynamic range in single-supply systems. |
| Shutdown current | 1.5 µA (max. per channel) - allows selective channel disabling to conserve power during idle periods in multi-function circuits. |
| Capacitive load drive | Stable with ≤200 pF in unity-gain - eliminates need for external isolation resistors in many layout-constrained RF detector or filter driver applications. |
Pinout & Package
LMV712LD is packaged in a 10-pin DSBGA (YPA) with 1.75 mm × 2.25 mm body size and bottom-side ball array. The package supports high-density PCB layouts and thermal performance via direct die attach to PCB copper.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1: OUTA | Channel A output | Drives external load or feedback network; rail-to-rail swing enables full utilization of supply headroom. |
| A2: V+ | Positive supply input | Accepts 2.7–5.5 V; decoupling capacitor required near pin for stability under transient load conditions. |
| A3: OUTB | Channel B output | Independent output for dual-path signal processing (e.g., I/Q channel conditioning or dual PA control). |
| B1: –INA | Channel A inverting input | High-impedance node (IB = 5.5 pA typ.) - minimizes loading on precision sensor or divider networks. |
| B3: –INB | Channel B inverting input | Matches –INA electrically; supports matched dual-channel feedback topologies without inter-channel crosstalk. |
| C1: +INA | Channel A noninverting input | Used for unity-gain buffer or active filter input; rail-to-rail common-mode range allows direct connection to ADC references. |
| C3: +INB | Channel B noninverting input | Electrically identical to +INA; enables simultaneous monitoring of two independent analog signals. |
| D1: SDA | Channel A shutdown control | Logic-low (<0.8 V) disables Channel A; must not float - tie to GND or microcontroller GPIO for deterministic control. |
| D2: V− | Negative supply input | Typically connected to ground in single-supply operation; serves as reference for output swing and shutdown state. |
| D3: SDB | Channel B shutdown control | Independent of SDA - allows asymmetric power management (e.g., keep Channel B active while sleeping Channel A). |
Key Features
| Feature | Design Value |
|---|---|
| Glitch-free turnon | 2.2 µs (typ.) output ramp with no overshoot - prevents spurious RF emission during PA enable sequences. |
| Independent shutdown | Two dedicated pins (SDA/SDB) allow per-channel power gating without affecting adjacent circuitry or shared supply rails. |
| Low input offset drift | VOS ≤3.2 mV over –40°C to 85°C - maintains accuracy in temperature-variable environments like cellular handset front-ends. |
| High PSRR/CMRR | 90 dB PSRR and 75 dB CMRR (typ. at 25°C) - rejects supply ripple and common-mode interference in noisy RF subsystems. |
| Small-footprint packaging | 10-pin DSBGA (1.75 × 2.25 mm) - reduces board area by >50% vs. comparable VSSOP solutions while enabling thinner end products. |
Applications
| Power Amplifier Control Loop | Cellular Handset Front-End |
|---|---|
Use Scenario: Closed-loop bias control of GSM/UMTS/LTE power amplifiers to maintain linearity and efficiency across varying output power levels. IC Role / Device Role / Timing Role: Dual op-amp implements error amplifier and envelope follower; one channel regulates DC bias, the other monitors detector output for real-time correction. Use Value: Glitch-free 2.2 µs turnon prevents PA output transients that cause spectral regrowth or TRP degradation during TDD slot transitions. | Use Scenario: Signal conditioning for antenna switch control, RF power detection, and battery-voltage-scaled reference generation in compact smartphones. IC Role / Device Role / Timing Role: Rail-to-rail I/O enables direct interface with 2.7–3.6 V battery rails and 1.8 V logic; dual channels support simultaneous TX/RX path monitoring. Use Value: 1.22 mA/channel supply current extends talk time; DSBGA footprint saves >1.2 mm² vs. VSSOP alternatives in ultra-thin bezel designs. |
| Wireless LAN Transceiver | Portable Medical Sensor Interface |
Use Scenario: Baseband signal amplification and DC offset correction in 2.4 GHz/5 GHz Wi-Fi transceivers operating from single Li-ion cells. IC Role / Device Role / Timing Role: Configured as programmable-gain amplifier and offset-nulling stage prior to ADC sampling; shutdown pins enable duty-cycled operation. Use Value: 20 nV/√Hz noise floor preserves SNR in low-level IF signals; 5 MHz GBW supports OFDM symbol timing recovery without phase lag. | Use Scenario: Amplifying low-amplitude bio-potential signals (ECG, EEG) in wearable health monitors powered by coin-cell batteries. IC Role / Device Role / Timing Role: First-stage instrumentation amplifier front-end with selectable gain and low-noise buffering before analog filtering and digitization. Use Value: 5.5 pA input bias current prevents electrode polarization errors; rail-to-rail output drives SAR ADC reference inputs directly without level-shifting. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMV722IDGKR | No shutdown function; 10-pin VSSOP package; 10 MHz GBW; higher supply current (1.6 mA/ch) | Lacks independent channel disable - unsuitable for dynamic power-gating architectures | Select when higher bandwidth is needed and shutdown is unnecessary; requires larger PCB area than LMV712LD's DSBGA. |
| TLV2772IDR | Single-supply only; 4.8 MHz GBW; 2.5 V/µs slew rate; no shutdown; SOIC-8 package | Lower speed and no per-channel control - limits use in fast envelope-tracking or multi-path systems | Choose for cost-sensitive, non-critical analog functions where DSBGA assembly is unavailable or thermal constraints permit SOIC. |
Compared with LMV712LD, LMV722IDGKR offers higher bandwidth but sacrifices power management flexibility and board-space efficiency, while TLV2772IDR trades performance and feature set for lower cost and broader assembly compatibility - making LMV712LD optimal for space- and power-constrained RF control loops.
Availability
LMV712LD is available at Aetrix Electronics and suitable for cellular handsets, wireless LAN transceivers, and portable medical sensor interfaces requiring stable component supply, guaranteed long-term availability, and automotive-grade reliability validation.
Supply support for LMV712LD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in precision amplifiers, power management, and high-reliability signal chain solutions.
The LMV712LD belongs to TI's low-power, rail-to-rail op-amp product line, engineered specifically for battery-operated RF and portable electronics where minimal quiescent current, fast turnon, and small form factor are essential design requirements.
FAQ
What is the maximum capacitive load the LMV712LD can drive without external compensation?
The LMV712LD is specified to remain stable with up to 200 pF of capacitive load in unity-gain configuration. This capability eliminates the need for series isolation resistors in many RF detector, filter, or cable-driver applications. For loads exceeding 200 pF, TI recommends adding an isolation resistor (RISO) between the LMV712LD output and the capacitive load, as shown in Figure 32 of the LMV712-N datasheet. The LMV712LD itself does not require external compensation under the 200 pF limit.
Does the LMV712LD support true rail-to-rail input and output operation?
Yes, the LMV712LD supports rail-to-rail input operation from V− −0.3 V to V+ +0.3 V and rail-to-rail output swing within 120 mV of both supply rails (at 10 kΩ load). This is achieved through parallel NMOS/PMOS input pairs and a complementary PMOS/NPN output stage. The input stage includes internal logic to manage bias current across the full common-mode range, though users should avoid the VOS crossover region (~1.4 V above V−) in high-accuracy applications.
How does the shutdown functionality work on the LMV712LD?
The LMV712LD features two independent shutdown pins: SDA controls Channel A and SDB controls Channel B. Driving either pin below 0.8 V (typ.) places the corresponding amplifier into shutdown mode, reducing its supply current to ≤1.5 µA and pulling its output to V−. To enable the channel, the shutdown pin must be pulled high - ≥2.4 V at 2.7 V supply or ≥4.5 V at 5 V supply. The output ramps up smoothly with no glitch upon exit from shutdown, with typical turnon time of 2.2 µs at 5 V.
What is the operating temperature range for the LMV712LD?
The LMV712LD is rated for operation from –40°C to 85°C, consistent with the LMV712-N commercial-grade specification. It is not the automotive-qualified LMV712-N-Q1 variant (which extends to 125°C), nor is it rated for military or extended industrial temperature ranges. All electrical characteristics - including input offset voltage, supply current, and output swing - are ensured across this –40°C to 85°C range per the datasheet's Recommended Operating Conditions table.
Which package type corresponds to the LMV712LD part number?
The LMV712LD is the 10-pin DSBGA (Die Size Ball Grid Array) package variant of the LMV712-N family, identified by Texas Instruments' YPA package code. Its nominal body size is 1.75 mm × 2.25 mm with a 0.5 mm ball pitch. This package provides superior thermal performance and minimal PCB footprint compared to the 10-pin WSON (NGY) and 10-pin VSSOP (DGS) variants - making it ideal for ultra-compact portable and RF applications where space and thermal dissipation are critical.
LMV712LD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- LMV®
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 2
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 5V/µs
- Gain Bandwidth Product:
- 5 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 5.5 pA
- Voltage - Input Offset:
- 400 µV
- Current - Supply:
- 1.22mA (x2 Channels)
- Current - Output / Channel:
- 50 mA
- Voltage - Supply Span (Min):
- 2.7 V
- Voltage - Supply Span (Max):
- 5.5 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-WSON (3x3)
LMV712LD FAQ
1.How can I place an order for LMV712LD through Aetrix?
Please submit a Request for Quotation (RFQ) for LMV712LD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LMV712LD reliable?
The price and inventory of LMV712LD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LMV712LD is usually 5 days.
3.What payment methods are accepted for LMV712LD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LMV712LD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LMV712LD?
LMV712LD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LMV712LD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LMV712LD?
For technical support, including LMV712LD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LMV712LD requirements.
6.How does Aetrix verify that LMV712LD is sourced from the original manufacturer or authorized distributors?
All LMV712LD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LMV712LD meets industry standards.
7.What is the process for return or replacement of LMV712LD?
All LMV712LD units undergo pre-shipment inspection (PSI). If there is an issue with LMV712LD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMV712LD part is unused and in its original packaging.
Return procedure for LMV712LD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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