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Texas Instruments LOG100JP

Part No.:
LOG100JP
Manufacturer:
Texas Instruments
Category:
Instrumentation, Op Amps, Buffer Amps
Package:
14-CDIP (0.300", 7.62mm)
Datasheet:
AetrixLOG100JP.pdf
Description:
IC LOG/LOG 1 CIRCUIT 14CDIP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,283

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Product details

Overview

LOG100JP from Texas Instruments (formerly Burr-Brown) is a precision logarithmic and log ratio amplifier IC designed for optical power monitoring, laser diode control, and EDFA subsystems. It delivers 0.37% FSO total error over six decades (1nA–1mA), ±10V output swing, and pin-selectable scale factors (1/3/5 V/decade) with internal laser-trimmed thin-film resistors.

For engineers reviewing the LOG100JP datasheet, LOG100JP pinout, LOG100JP application, or LOG100JP equivalent, this page provides verified technical context, real-world use cases in optical density measurement and absorbance computation, confirmed pin-level design meaning, and validated alternative options for log-ratio signal conditioning in telecom and instrumentation systems.

Technical Context

The LOG100JP implements a matched bipolar transistor pair-based log ratio architecture with FET-input amplifiers (1pA typical bias current) to support accurate current-mode operation down to 1nA. Its transfer function VOUT = K·log(I₁/I₂) is temperature-compensated via integrated thin-film resistors with positive TC matching VT drift.

Frequency compensation is externally set via capacitor between pins 7 and 14, with bandwidth ranging from 0.11 kHz (I₂ = 1nA) to 45 kHz (I₂ = 1mA). Input currents flow into pins 1 (I₁) and 14 (I₂); output appears at pin 9 with rail-to-rail ±10V capability and ±5mA drive strength.

Key Specifications

ParameterValue and Actual Design Meaning
Input Range1nA to 1mA - supports six-decade dynamic range without external gain-setting resistors
Total Error±37 mV max at 1nA input - guarantees 0.37% FSO accuracy across full operating range
Log Conformity0.1% max over 5 decades - defines nonlinearity of VOUT vs log(I₁/I₂) curve
Scale Factor Options1 V/decade (pin 3), 3 V/decade (pin 4), 5 V/decade (pin 5) - selectable via direct pin connection, no external components
Supply Voltage±15 VDC rated - operates from ±12 V to ±18 V with derated performance
Output Swing±10 V into ±5 mA load - enables direct interface with 12-bit ADCs and analog processing stages
Input Bias Current1 pA typical - permits accurate low-current sensing in photodiode and TIA front-ends

Pinout & Package

LOG100JP is housed in a 14-pin hermetic ceramic DIP package with metal lid internally connected to common (pin 10). The package provides high reliability for optical networking and industrial environments requiring long-term stability and moisture resistance.

Pin/TerminalCircuit RoleDesign Meaning
1I₁ InputNumerator current input terminal; accepts 1nA–1mA conventional current flow into device
2Scale TrimAdjustment node for fine-tuning scale factor using external resistor network per datasheet Figure 8
3K = 1 SelectConnects internal 39kΩ resistor to set 1 V/decade output scaling
4K = 3 SelectConnects internal 24kΩ resistor to set 3 V/decade output scaling
5K = 5 SelectConnects internal 7.5kΩ resistor to set 5 V/decade output scaling
6+VCCPositive supply pin; requires ±15 VDC with local 10µF + 1000pF bypassing
7CompensationConnection point for frequency compensation capacitor (CC) to pin 14; value depends on I₁/I₂ range
9VOUTDifferential output terminal; delivers ±10 V with 0.05 Ω output impedance
10ComCommon reference; metal lid internally bonded to this pin for EMI shielding
14I₂ InputDenominator current input terminal; forms log ratio with I₁ for ratiometric rejection of source drift

Key Features

FeatureDesign Value
Laser-trimmed thin-film resistorsEliminates need for user calibration while enabling guaranteed 0.37% FSO accuracy over temperature
FET-input amplifiers1 pA typical bias current allows stable operation with photodiode signals as low as 1nA
Pin-selectable scale factorThree discrete gains (1/3/5 V/decade) implemented via hardwired internal resistors-no external components required
Hermetic ceramic DIP packagingEnsures long-term parameter stability in humid or thermally cycling optical amplifier modules
Log conformity optimization0.1% max deviation over 5 decades makes it suitable for high-precision absorbance and optical density measurements

Applications

Absorbance MeasurementOptical Power Monitoring

Use Scenario: Measuring light attenuation through biological or chemical samples using dual-wavelength photodiodes.

IC Role / Device Role / Timing Role: LOG100JP computes log ratio of reference and sample channel photocurrents to directly output absorbance A = log(Iref/Isample).

Use Value: Eliminates need for microcontroller-based computation and reduces system noise by performing analog log-ratio before digitization.

Use Scenario: Real-time monitoring of pump laser output and signal gain in Erbium-Doped Fiber Amplifiers (EDFAs).

IC Role / Device Role / Timing Role: LOG100JP compares photodiode currents from input and output taps to generate voltage proportional to optical gain in dB.

Use Value: Enables closed-loop laser diode bias control with <100 µs response time and immunity to supply ripple affecting absolute current levels.

Laser Diode ControlData Compression Interface

Use Scenario: Stabilizing output power of telecom pump lasers against temperature-induced drift.

IC Role / Device Role / Timing Role: LOG100JP serves as feedback element in analog AGC loop, converting monitored photocurrent into precise control voltage for laser driver IC.

Use Value: Achieves ±0.1 dB gain stability over 0–70°C using only one IC-no software calibration or lookup tables required.

Use Scenario: Preconditioning wide-dynamic-range sensor outputs (e.g., RF power detectors, radiation sensors) for 8-bit ADCs.

IC Role / Device Role / Timing Role: LOG100JP compresses 6-decade input range into linear ±10V output, effectively extending ADC resolution to ~20 bits.

Use Value: Reduces BOM cost by replacing expensive high-resolution ADCs while maintaining SNR > 90 dB across full input span.

Equivalent & Alternatives

The following parts are listed as comparable options for similar logarithmic computation applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
ADL5513ACPZ-R7RF log detector (100 MHz–4 GHz), 65 dB range, voltage output, no I₁/I₂ ratio capabilityDesigned for RF power measurement-not suitable for DC/low-frequency optical current ratiosSelect when measuring RF envelope amplitude; not a functional substitute for LOG100JP's dual-current log-ratio function
LM13700NOTA-based programmable transconductance amplifier; requires external log transistor and trimming for log behaviorDelivers basic log functionality only after extensive external circuitry and calibrationChoose only if ultra-low-cost prototyping is prioritized over accuracy, temperature stability, or time-to-market

Compared with ADL5513ACPZ-R7 and LM13700N, LOG100JP uniquely integrates matched logging transistors, laser-trimmed resistors, and dual current inputs in a single hermetic package-enabling out-of-the-box 0.37% FSO accuracy for optical density and EDFA gain control without external components or firmware.

Availability

LOG100JP is available at Aetrix Electronics and suitable for optical networking infrastructure, laser diode control loops, and EDFA subsystems requiring stable component supply with long-lifecycle assurance.

Supply support for LOG100JP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments acquired Burr-Brown in 2000 and maintains legacy high-precision analog product lines including the LOG100 series. TI specializes in high-reliability signal conditioning ICs for test, measurement, and industrial applications.

The LOG100 product line was engineered specifically for analog logarithmic computation in optical and analytical instrumentation-prioritizing guaranteed accuracy, low bias current, and ratiometric stability over general-purpose op-amp flexibility.

FAQ

What is the guaranteed total error specification for LOG100JP across its full input range?

The LOG100JP guarantees ±37 mV maximum total error at 1nA input, scaling linearly with scale factor K (e.g., ±111 mV at K = 3). This corresponds to 0.37% of full-scale output (±10 V) and is specified over the entire six-decade range (1nA to 1mA) at +25°C with ±15 V supplies after 15-minute warm-up. Temperature drift adds ±1.26 mV/°C at 1nA, contributing to worst-case error envelopes shown in the datasheet's Typical Performance Curves.

Can LOG100JP be used with voltage inputs instead of current inputs?

Yes, LOG100JP supports voltage inputs via external series resistors, but performance is limited to approximately three decades of dynamic range due to input offset voltage and noise effects. The transfer function becomes VOUT = K·log(V₁/R₁ ÷ V₂/R₂), requiring matched precision resistors. For best accuracy, current-mode operation using photodiodes or transimpedance amplifiers is strongly preferred-LOG100JP's 1 pA bias current and laser-trimmed resistors are optimized for that configuration.

How does LOG100JP achieve temperature-stable logarithmic performance?

LOG100JP achieves temperature stability through monolithic integration of matched bipolar logging transistors and thin-film resistors with precisely tailored positive temperature coefficients. These resistors compensate for the inherent VT = kT/q drift in the base-emitter junctions. The result is a log conformity temperature coefficient of just 0.001%/°C over six decades, enabling stable optical gain measurement in uncontrolled ambient environments without active oven control or digital correction.

What is the purpose of pin 2 (Scale Factor Trim) on LOG100JP?

Pin 2 on LOG100JP provides access to the internal scaling resistor network for fine adjustment of the K factor beyond the standard 1/3/5 V/decade selections. As shown in the datasheet's Figure 8, adding series or parallel resistors between pin 2 and pins 3/4/5 allows continuous K tuning-for example, achieving 2.2 V/decade for custom optical density calibration curves. This trim capability preserves the LOG100JP's guaranteed accuracy while enabling application-specific scaling without redesigning the signal chain.

Is LOG100JP suitable for driving capacitive loads such as ADC input capacitors?

LOG100JP maintains stable operation with capacitive loads up to 100 pF. For larger loads-including successive-approximation ADC input capacitances exceeding 100 pF-a 22 Ω carbon composition resistor must be placed in series with pin 9 (VOUT) to isolate the output stage. This series resistor prevents peaking or oscillation while introducing negligible gain error (<0.1%) given the LOG100JP's 0.05 Ω output impedance and typical ADC input impedances >1 MΩ.

LOG100JP Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
14-CDIP (0.300", 7.62mm)
Packaging:
Tube
Product Status:
Obsolete
Amplifier Type:
Logarithmic and Log Ratio
Number of Circuits:
1
Output Type:
-
Slew Rate:
-
Gain Bandwidth Product:
-
-3db Bandwidth:
45 kHz
Current - Input Bias:
1 pA
Voltage - Input Offset:
700 µV
Current - Supply:
7mA
Current - Output / Channel:
5 mA
Voltage - Supply Span (Min):
24 V
Voltage - Supply Span (Max):
36 V
Operating Temperature:
0°C ~ 70°C
Grade:
-
Qualification:
-
Mounting Type:
Through Hole
Supplier Device Package:
14-CDIP

LOG100JP FAQ

1.How can I place an order for LOG100JP through Aetrix?

Please submit a Request for Quotation (RFQ) for LOG100JP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LOG100JP reliable?

The price and inventory of LOG100JP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LOG100JP is usually 5 days.

3.What payment methods are accepted for LOG100JP?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LOG100JP transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LOG100JP?

LOG100JP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LOG100JP order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LOG100JP?

For technical support, including LOG100JP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LOG100JP requirements.

6.How does Aetrix verify that LOG100JP is sourced from the original manufacturer or authorized distributors?

All LOG100JP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LOG100JP meets industry standards.

7.What is the process for return or replacement of LOG100JP?

All LOG100JP units undergo pre-shipment inspection (PSI). If there is an issue with LOG100JP, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LOG100JP part is unused and in its original packaging.

Return procedure for LOG100JP:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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